linux-stable/drivers/clk/microchip/Kconfig

# SPDX-License-Identifier: GPL-2.0

config COMMON_CLK_PIC32
	def_bool COMMON_CLK && MACH_PIC32

config MCHP_CLK_MPFS
	bool "Clk driver for PolarFire SoC"
	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
	default ARCH_MICROCHIP_POLARFIRE
	select AUXILIARY_BUS
	help
	  Supports Clock Configuration for PolarFire SoC
clk: microchip: Add driver for Microchip PolarFire SoC Add support for clock configuration on Microchip PolarFire SoC Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Co-developed-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220222121143.3316880-2-conor.dooley@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> 2022-02-22 12:11:44 +00:00			`# SPDX-License-Identifier: GPL-2.0`

			`config COMMON_CLK_PIC32`
			`def_bool COMMON_CLK && MACH_PIC32`

			`config MCHP_CLK_MPFS`
			`bool "Clk driver for PolarFire SoC"`
clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE As part of converting RISC-V SOC_FOO symbols to ARCH_FOO to match the use of such symbols on other architectures, convert the Microchip FPGA clock drivers to use the new symbol. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230309204452.969574-2-conor@kernel.org 2023-03-09 20:44:48 +00:00			`depends on ARCH_MICROCHIP_POLARFIRE \|\| COMPILE_TEST`
			`default ARCH_MICROCHIP_POLARFIRE`
clk: microchip: mpfs: add reset controller Add a reset controller to PolarFire SoC's clock driver. This reset controller is registered as an aux device and read/write functions exported to the drivers namespace so that the reset controller can access the peripheral device reset register. Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220909123123.2699583-5-conor.dooley@microchip.com 2022-09-09 12:31:13 +00:00			`select AUXILIARY_BUS`
clk: microchip: Add driver for Microchip PolarFire SoC Add support for clock configuration on Microchip PolarFire SoC Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Co-developed-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220222121143.3316880-2-conor.dooley@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> 2022-02-22 12:11:44 +00:00			`help`
			`Supports Clock Configuration for PolarFire SoC`