2021-02-13 22:37:56 +00:00
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/* SPDX-License-Identifier: GPL-2.0
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* Copyright 2019-2021 NXP Semiconductors
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*/
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#ifndef _NET_DSA_TAG_OCELOT_H
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#define _NET_DSA_TAG_OCELOT_H
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#include <linux/packing.h>
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#define OCELOT_TAG_LEN 16
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#define OCELOT_SHORT_PREFIX_LEN 4
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#define OCELOT_LONG_PREFIX_LEN 16
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#define OCELOT_TOTAL_TAG_LEN (OCELOT_SHORT_PREFIX_LEN + OCELOT_TAG_LEN)
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/* The CPU injection header and the CPU extraction header can have 3 types of
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* prefixes: long, short and no prefix. The format of the header itself is the
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* same in all 3 cases.
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*
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* Extraction with long prefix:
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*
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* +-------------------+-------------------+------+------+------------+-------+
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* | ff:ff:ff:ff:ff:ff | fe:ff:ff:ff:ff:ff | 8880 | 000a | extraction | frame |
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* | | | | | header | |
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* +-------------------+-------------------+------+------+------------+-------+
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* 48 bits 48 bits 16 bits 16 bits 128 bits
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*
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* Extraction with short prefix:
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*
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* +------+------+------------+-------+
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* | 8880 | 000a | extraction | frame |
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* | | | header | |
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* +------+------+------------+-------+
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* 16 bits 16 bits 128 bits
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*
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* Extraction with no prefix:
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*
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* +------------+-------+
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* | extraction | frame |
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* | header | |
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* +------------+-------+
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* 128 bits
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*
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*
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* Injection with long prefix:
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*
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* +-------------------+-------------------+------+------+------------+-------+
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* | any dmac | any smac | 8880 | 000a | injection | frame |
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* | | | | | header | |
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* +-------------------+-------------------+------+------+------------+-------+
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* 48 bits 48 bits 16 bits 16 bits 128 bits
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*
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* Injection with short prefix:
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*
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* +------+------+------------+-------+
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* | 8880 | 000a | injection | frame |
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* | | | header | |
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* +------+------+------------+-------+
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* 16 bits 16 bits 128 bits
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*
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* Injection with no prefix:
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*
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* +------------+-------+
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* | injection | frame |
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* | header | |
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* +------------+-------+
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* 128 bits
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*
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* The injection header looks like this (network byte order, bit 127
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* is part of lowest address byte in memory, bit 0 is part of highest
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* address byte):
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*
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* +------+------+------+------+------+------+------+------+
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* 127:120 |BYPASS| MASQ | MASQ_PORT |REW_OP|REW_OP|
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* +------+------+------+------+------+------+------+------+
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* 119:112 | REW_OP |
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* +------+------+------+------+------+------+------+------+
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* 111:104 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 103: 96 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 95: 88 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 87: 80 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 79: 72 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 71: 64 | RSV | DEST |
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* +------+------+------+------+------+------+------+------+
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* 63: 56 | DEST |
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* +------+------+------+------+------+------+------+------+
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* 55: 48 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 47: 40 | RSV | SRC_PORT | RSV |TFRM_TIMER|
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* +------+------+------+------+------+------+------+------+
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* 39: 32 | TFRM_TIMER | RSV |
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* +------+------+------+------+------+------+------+------+
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* 31: 24 | RSV | DP | POP_CNT | CPUQ |
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* +------+------+------+------+------+------+------+------+
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* 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE|
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* +------+------+------+------+------+------+------+------+
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* 15: 8 | PCP | DEI | VID |
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* +------+------+------+------+------+------+------+------+
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* 7: 0 | VID |
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* +------+------+------+------+------+------+------+------+
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*
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* And the extraction header looks like this:
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*
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* +------+------+------+------+------+------+------+------+
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* 127:120 | RSV | REW_OP |
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* +------+------+------+------+------+------+------+------+
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* 119:112 | REW_OP | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 111:104 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 103: 96 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 95: 88 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 87: 80 | REW_VAL | LLEN |
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* +------+------+------+------+------+------+------+------+
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* 79: 72 | LLEN | WLEN |
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* +------+------+------+------+------+------+------+------+
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* 71: 64 | WLEN | RSV |
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* +------+------+------+------+------+------+------+------+
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* 63: 56 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 55: 48 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 47: 40 | RSV | SRC_PORT | ACL_ID |
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* +------+------+------+------+------+------+------+------+
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* 39: 32 | ACL_ID | RSV | SFLOW_ID |
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* +------+------+------+------+------+------+------+------+
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* 31: 24 |ACL_HIT| DP | LRN_FLAGS | CPUQ |
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* +------+------+------+------+------+------+------+------+
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* 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE|
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* +------+------+------+------+------+------+------+------+
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* 15: 8 | PCP | DEI | VID |
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* +------+------+------+------+------+------+------+------+
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* 7: 0 | VID |
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* +------+------+------+------+------+------+------+------+
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*/
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static inline void ocelot_xfh_get_rew_val(void *extraction, u64 *rew_val)
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{
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packing(extraction, rew_val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0);
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}
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static inline void ocelot_xfh_get_len(void *extraction, u64 *len)
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{
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u64 llen, wlen;
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packing(extraction, &llen, 84, 79, OCELOT_TAG_LEN, UNPACK, 0);
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packing(extraction, &wlen, 78, 71, OCELOT_TAG_LEN, UNPACK, 0);
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*len = 60 * wlen + llen - 80;
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}
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static inline void ocelot_xfh_get_src_port(void *extraction, u64 *src_port)
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{
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packing(extraction, src_port, 46, 43, OCELOT_TAG_LEN, UNPACK, 0);
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}
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static inline void ocelot_xfh_get_qos_class(void *extraction, u64 *qos_class)
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{
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packing(extraction, qos_class, 19, 17, OCELOT_TAG_LEN, UNPACK, 0);
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}
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static inline void ocelot_xfh_get_tag_type(void *extraction, u64 *tag_type)
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{
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packing(extraction, tag_type, 16, 16, OCELOT_TAG_LEN, UNPACK, 0);
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}
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static inline void ocelot_xfh_get_vlan_tci(void *extraction, u64 *vlan_tci)
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{
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packing(extraction, vlan_tci, 15, 0, OCELOT_TAG_LEN, UNPACK, 0);
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}
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static inline void ocelot_ifh_set_bypass(void *injection, u64 bypass)
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{
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packing(injection, &bypass, 127, 127, OCELOT_TAG_LEN, PACK, 0);
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}
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static inline void ocelot_ifh_set_rew_op(void *injection, u64 rew_op)
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{
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packing(injection, &rew_op, 125, 117, OCELOT_TAG_LEN, PACK, 0);
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}
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static inline void ocelot_ifh_set_dest(void *injection, u64 dest)
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{
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packing(injection, &dest, 67, 56, OCELOT_TAG_LEN, PACK, 0);
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}
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static inline void ocelot_ifh_set_qos_class(void *injection, u64 qos_class)
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{
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packing(injection, &qos_class, 19, 17, OCELOT_TAG_LEN, PACK, 0);
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}
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net: dsa: tag_ocelot: create separate tagger for Seville
The ocelot tagger is a hot mess currently, it relies on memory
initialized by the attached driver for basic frame transmission.
This is against all that DSA tagging protocols stand for, which is that
the transmission and reception of a DSA-tagged frame, the data path,
should be independent from the switch control path, because the tag
protocol is in principle hot-pluggable and reusable across switches
(even if in practice it wasn't until very recently). But if another
driver like dsa_loop wants to make use of tag_ocelot, it couldn't.
This was done to have common code between Felix and Ocelot, which have
one bit difference in the frame header format. Quoting from commit
67c2404922c2 ("net: dsa: felix: create a template for the DSA tags on
xmit"):
Other alternatives have been analyzed, such as:
- Create a separate tag_seville.c: too much code duplication for just 1
bit field difference.
- Create a separate DSA_TAG_PROTO_SEVILLE under tag_ocelot.c, just like
tag_brcm.c, which would have a separate .xmit function. Again, too
much code duplication for just 1 bit field difference.
- Allocate the template from the init function of the tag_ocelot.c
module, instead of from the driver: couldn't figure out a method of
accessing the correct port template corresponding to the correct
tagger in the .xmit function.
The really interesting part is that Seville should have had its own
tagging protocol defined - it is not compatible on the wire with Ocelot,
even for that single bit. In principle, a packet generated by
DSA_TAG_PROTO_OCELOT when booted on NXP LS1028A would look in a certain
way, but when booted on NXP T1040 it would look differently. The reverse
is also true: a packet generated by a Seville switch would be
interpreted incorrectly by Wireshark if it was told it was generated by
an Ocelot switch.
Actually things are a bit more nuanced. If we concentrate only on the
DSA tag, what I said above is true, but Ocelot/Seville also support an
optional DSA tag prefix, which can be short or long, and it is possible
to distinguish the two taggers based on an integer constant put in that
prefix. Nonetheless, creating a separate tagger is still justified,
since the tag prefix is optional, and without it, there is again no way
to distinguish.
Claiming backwards binary compatibility is a bit more tough, since I've
already changed the format of tag_ocelot once, in commit 5124197ce58b
("net: dsa: tag_ocelot: use a short prefix on both ingress and egress").
Therefore I am not very concerned with treating this as a bugfix and
backporting it to stable kernels (which would be another mess due to the
fact that there would be lots of conflicts with the other DSA_TAG_PROTO*
definitions). It's just simpler to say that the string values of the
taggers have ABI value starting with kernel 5.12, which will be when the
changing of tag protocol via /sys/class/net/<dsa-master>/dsa/tagging
goes live.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-13 22:37:58 +00:00
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static inline void seville_ifh_set_dest(void *injection, u64 dest)
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{
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packing(injection, &dest, 67, 57, OCELOT_TAG_LEN, PACK, 0);
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}
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static inline void ocelot_ifh_set_src(void *injection, u64 src)
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{
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packing(injection, &src, 46, 43, OCELOT_TAG_LEN, PACK, 0);
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}
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2021-02-13 22:37:56 +00:00
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static inline void ocelot_ifh_set_tag_type(void *injection, u64 tag_type)
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{
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packing(injection, &tag_type, 16, 16, OCELOT_TAG_LEN, PACK, 0);
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}
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static inline void ocelot_ifh_set_vid(void *injection, u64 vid)
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{
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packing(injection, &vid, 11, 0, OCELOT_TAG_LEN, PACK, 0);
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}
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#endif
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