2019-06-20 16:28:46 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2005-04-16 22:20:36 +00:00
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/*
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* Watchdog driver for the SA11x0/PXA2xx
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*
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2009-03-18 08:35:09 +00:00
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* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
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* Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
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2005-04-16 22:20:36 +00:00
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*
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* Neither Oleg Drokin nor iXcelerator.com admit liability nor provide
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* warranty for any of this software. This material is provided
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* "AS-IS" and at no charge.
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*
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* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
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*
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2009-03-18 08:35:09 +00:00
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* 27/11/2000 Initial release
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2005-04-16 22:20:36 +00:00
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*/
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2012-02-15 23:06:19 +00:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2005-04-16 22:20:36 +00:00
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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2016-09-19 19:12:14 +00:00
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#include <linux/clk.h>
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2005-04-16 22:20:36 +00:00
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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2019-09-08 20:33:51 +00:00
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#include <linux/platform_device.h>
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2005-04-16 22:20:36 +00:00
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/init.h>
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2012-03-20 19:33:19 +00:00
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#include <linux/io.h>
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2007-10-19 06:40:25 +00:00
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#include <linux/bitops.h>
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2008-05-19 13:08:05 +00:00
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#include <linux/uaccess.h>
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2008-11-29 17:35:51 +00:00
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#include <linux/timex.h>
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2005-04-16 22:20:36 +00:00
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2019-09-08 20:33:51 +00:00
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#define REG_OSMR0 0x0000 /* OS timer Match Reg. 0 */
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#define REG_OSMR1 0x0004 /* OS timer Match Reg. 1 */
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#define REG_OSMR2 0x0008 /* OS timer Match Reg. 2 */
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#define REG_OSMR3 0x000c /* OS timer Match Reg. 3 */
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#define REG_OSCR 0x0010 /* OS timer Counter Reg. */
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#define REG_OSSR 0x0014 /* OS timer Status Reg. */
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#define REG_OWER 0x0018 /* OS timer Watch-dog Enable Reg. */
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#define REG_OIER 0x001C /* OS timer Interrupt Enable Reg. */
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2005-04-16 22:20:36 +00:00
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2019-09-08 20:33:51 +00:00
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#define OSSR_M3 (1 << 3) /* Match status channel 3 */
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#define OSSR_M2 (1 << 2) /* Match status channel 2 */
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#define OSSR_M1 (1 << 1) /* Match status channel 1 */
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#define OSSR_M0 (1 << 0) /* Match status channel 0 */
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#define OWER_WME (1 << 0) /* Watchdog Match Enable */
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#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */
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#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */
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#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */
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#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */
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2005-04-16 22:20:36 +00:00
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2008-12-24 03:32:45 +00:00
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static unsigned long oscr_freq;
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2005-04-16 22:20:36 +00:00
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static unsigned long sa1100wdt_users;
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2009-06-29 17:56:52 +00:00
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static unsigned int pre_margin;
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2005-04-16 22:20:36 +00:00
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static int boot_status;
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2019-09-08 20:33:51 +00:00
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static void __iomem *reg_base;
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static inline void sa1100_wr(u32 val, u32 offset)
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{
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writel_relaxed(val, reg_base + offset);
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}
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static inline u32 sa1100_rd(u32 offset)
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{
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return readl_relaxed(reg_base + offset);
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}
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2005-04-16 22:20:36 +00:00
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/*
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* Allow only one person to hold it open
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*/
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static int sa1100dog_open(struct inode *inode, struct file *file)
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{
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2008-05-19 13:08:05 +00:00
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if (test_and_set_bit(1, &sa1100wdt_users))
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2005-04-16 22:20:36 +00:00
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return -EBUSY;
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/* Activate SA1100 Watchdog timer */
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2019-09-08 20:33:51 +00:00
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sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
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sa1100_wr(OSSR_M3, REG_OSSR);
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sa1100_wr(OWER_WME, REG_OWER);
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sa1100_wr(sa1100_rd(REG_OIER) | OIER_E3, REG_OIER);
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2019-03-26 20:51:19 +00:00
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return stream_open(inode, file);
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2005-04-16 22:20:36 +00:00
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}
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/*
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2005-08-03 19:34:52 +00:00
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* The watchdog cannot be disabled.
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*
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* Previous comments suggested that turning off the interrupt by
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2019-09-08 20:33:51 +00:00
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* clearing REG_OIER[E3] would prevent the watchdog timing out but this
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2005-08-03 19:34:52 +00:00
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* does not appear to be true (at least on the PXA255).
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2005-04-16 22:20:36 +00:00
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*/
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static int sa1100dog_release(struct inode *inode, struct file *file)
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{
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2012-02-15 23:06:19 +00:00
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pr_crit("Device closed - timer will not stop\n");
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2005-04-16 22:20:36 +00:00
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clear_bit(1, &sa1100wdt_users);
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return 0;
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}
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2008-05-19 13:08:05 +00:00
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static ssize_t sa1100dog_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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2005-04-16 22:20:36 +00:00
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{
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2005-08-03 19:34:52 +00:00
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if (len)
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2005-04-16 22:20:36 +00:00
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/* Refresh OSMR3 timer. */
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2019-09-08 20:33:51 +00:00
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sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
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2005-04-16 22:20:36 +00:00
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return len;
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}
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2008-05-19 13:08:05 +00:00
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static const struct watchdog_info ident = {
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.options = WDIOF_CARDRESET | WDIOF_SETTIMEOUT
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| WDIOF_KEEPALIVEPING,
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2005-08-03 19:34:52 +00:00
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.identity = "SA1100/PXA255 Watchdog",
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2009-06-29 17:56:52 +00:00
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.firmware_version = 1,
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2005-04-16 22:20:36 +00:00
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};
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2008-05-19 13:08:05 +00:00
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static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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2005-04-16 22:20:36 +00:00
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{
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2006-09-09 15:34:31 +00:00
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int ret = -ENOTTY;
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2005-04-16 22:20:36 +00:00
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int time;
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2005-11-07 10:21:24 +00:00
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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2005-04-16 22:20:36 +00:00
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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2005-11-07 10:21:24 +00:00
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ret = copy_to_user(argp, &ident,
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2005-04-16 22:20:36 +00:00
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sizeof(ident)) ? -EFAULT : 0;
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break;
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case WDIOC_GETSTATUS:
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2005-11-07 10:21:24 +00:00
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ret = put_user(0, p);
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2005-04-16 22:20:36 +00:00
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break;
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case WDIOC_GETBOOTSTATUS:
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2005-11-07 10:21:24 +00:00
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ret = put_user(boot_status, p);
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2005-04-16 22:20:36 +00:00
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break;
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2008-07-18 11:41:17 +00:00
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case WDIOC_KEEPALIVE:
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2019-09-08 20:33:51 +00:00
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sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
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2008-07-18 11:41:17 +00:00
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ret = 0;
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break;
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2005-04-16 22:20:36 +00:00
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case WDIOC_SETTIMEOUT:
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2005-11-07 10:21:24 +00:00
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ret = get_user(time, p);
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2005-04-16 22:20:36 +00:00
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if (ret)
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break;
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2009-06-29 17:56:52 +00:00
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if (time <= 0 || (oscr_freq * (long long)time >= 0xffffffff)) {
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2005-04-16 22:20:36 +00:00
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ret = -EINVAL;
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break;
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}
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2008-12-24 03:32:45 +00:00
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pre_margin = oscr_freq * time;
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2019-09-08 20:33:51 +00:00
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sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
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2020-07-07 17:11:21 +00:00
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fallthrough;
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2005-04-16 22:20:36 +00:00
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case WDIOC_GETTIMEOUT:
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2008-12-24 03:32:45 +00:00
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ret = put_user(pre_margin / oscr_freq, p);
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2005-04-16 22:20:36 +00:00
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break;
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}
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return ret;
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}
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2008-05-19 13:08:05 +00:00
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static const struct file_operations sa1100dog_fops = {
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2005-04-16 22:20:36 +00:00
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.owner = THIS_MODULE,
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.write = sa1100dog_write,
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2008-05-19 13:08:05 +00:00
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.unlocked_ioctl = sa1100dog_ioctl,
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2019-06-03 12:23:09 +00:00
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.compat_ioctl = compat_ptr_ioctl,
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2005-04-16 22:20:36 +00:00
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.open = sa1100dog_open,
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.release = sa1100dog_release,
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};
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2008-05-19 13:08:05 +00:00
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static struct miscdevice sa1100dog_miscdev = {
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2005-04-16 22:20:36 +00:00
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.minor = WATCHDOG_MINOR,
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2005-08-03 19:34:52 +00:00
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.name = "watchdog",
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2005-04-16 22:20:36 +00:00
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.fops = &sa1100dog_fops,
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};
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2019-09-08 20:33:51 +00:00
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static int margin = 60; /* (secs) Default is 1 minute */
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2016-09-19 19:12:14 +00:00
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static struct clk *clk;
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2005-04-16 22:20:36 +00:00
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2019-09-08 20:33:51 +00:00
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static int sa1100dog_probe(struct platform_device *pdev)
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2005-04-16 22:20:36 +00:00
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{
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int ret;
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2019-09-08 20:33:51 +00:00
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int *platform_data;
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENXIO;
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reg_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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2024-04-26 07:58:08 +00:00
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if (!reg_base)
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return -ENOMEM;
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2005-04-16 22:20:36 +00:00
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2016-09-19 19:12:14 +00:00
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clk = clk_get(NULL, "OSTIMER0");
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if (IS_ERR(clk)) {
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pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n",
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(int) PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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ret = clk_prepare_enable(clk);
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if (ret) {
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pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n",
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ret);
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goto err;
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}
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oscr_freq = clk_get_rate(clk);
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2008-12-24 03:32:45 +00:00
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2019-09-08 20:33:51 +00:00
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platform_data = pdev->dev.platform_data;
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if (platform_data && *platform_data)
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boot_status = WDIOF_CARDRESET;
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2008-12-24 03:32:45 +00:00
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pre_margin = oscr_freq * margin;
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2005-04-16 22:20:36 +00:00
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ret = misc_register(&sa1100dog_miscdev);
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2016-12-21 01:18:16 +00:00
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if (ret == 0) {
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2012-02-15 23:06:19 +00:00
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pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
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margin);
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2016-12-21 01:18:16 +00:00
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return 0;
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}
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2016-09-19 19:12:14 +00:00
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clk_disable_unprepare(clk);
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2016-12-21 01:18:16 +00:00
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err:
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2016-09-19 19:12:14 +00:00
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clk_put(clk);
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return ret;
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2005-04-16 22:20:36 +00:00
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}
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2023-03-03 21:37:11 +00:00
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static void sa1100dog_remove(struct platform_device *pdev)
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2005-04-16 22:20:36 +00:00
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{
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misc_deregister(&sa1100dog_miscdev);
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2016-09-19 19:12:14 +00:00
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clk_disable_unprepare(clk);
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clk_put(clk);
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2005-04-16 22:20:36 +00:00
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}
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2022-08-26 08:52:43 +00:00
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static struct platform_driver sa1100dog_driver = {
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2019-09-08 20:33:51 +00:00
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.driver.name = "sa1100_wdt",
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2024-10-10 20:36:22 +00:00
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.probe = sa1100dog_probe,
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.remove = sa1100dog_remove,
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2019-09-08 20:33:51 +00:00
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};
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module_platform_driver(sa1100dog_driver);
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2005-04-16 22:20:36 +00:00
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MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
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MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");
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module_param(margin, int, 0);
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MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
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MODULE_LICENSE("GPL");
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