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ASoC: SOF: Intel: mtl: factor interrupt enable/disable interrupt functions
The offsets and sequences are identical for interrupt enabling and disabling, we can refactor the code with a single routine and a boolean. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20221111042653.45520-4-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -134,112 +134,72 @@ static void mtl_disable_ipc_interrupts(struct snd_sof_dev *sdev)
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MTL_DSP_REG_HFIPCXCTL_BUSY | MTL_DSP_REG_HFIPCXCTL_DONE, 0);
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}
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static int mtl_enable_interrupts(struct snd_sof_dev *sdev)
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static int mtl_enable_interrupts(struct snd_sof_dev *sdev, bool enable)
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{
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u32 hfintipptr;
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u32 irqinten;
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u32 host_ipc;
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u32 hipcie;
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u32 mask;
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u32 val;
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int ret;
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/* read Interrupt IP Pointer */
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hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK;
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/* Enable Host IPC and SOUNDWIRE */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, hfintipptr,
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MTL_IRQ_INTEN_L_HOST_IPC_MASK | MTL_IRQ_INTEN_L_SOUNDWIRE_MASK,
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MTL_IRQ_INTEN_L_HOST_IPC_MASK | MTL_IRQ_INTEN_L_SOUNDWIRE_MASK);
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/* Enable/Disable Host IPC and SOUNDWIRE */
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mask = MTL_IRQ_INTEN_L_HOST_IPC_MASK | MTL_IRQ_INTEN_L_SOUNDWIRE_MASK;
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if (enable)
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val = mask;
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else
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val = 0;
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, hfintipptr, mask, val);
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/* check if operation was successful */
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host_ipc = MTL_IRQ_INTEN_L_HOST_IPC_MASK | MTL_IRQ_INTEN_L_SOUNDWIRE_MASK;
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ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, hfintipptr, irqinten,
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(irqinten & host_ipc) == host_ipc,
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(irqinten & mask) == val,
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HDA_DSP_REG_POLL_INTERVAL_US, HDA_DSP_RESET_TIMEOUT_US);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable Host IPC and/or SOUNDWIRE\n");
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dev_err(sdev->dev, "failed to %s Host IPC and/or SOUNDWIRE\n",
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enable ? "enable" : "disable");
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return ret;
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}
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/* Set Host IPC interrupt enable */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE,
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MTL_DSP_REG_HfHIPCIE_IE_MASK, MTL_DSP_REG_HfHIPCIE_IE_MASK);
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/* Enable/Disable Host IPC interrupt*/
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mask = MTL_DSP_REG_HfHIPCIE_IE_MASK;
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if (enable)
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val = mask;
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else
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val = 0;
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE, mask, val);
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/* check if operation was successful */
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host_ipc = MTL_DSP_REG_HfHIPCIE_IE_MASK;
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ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE, hipcie,
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(hipcie & host_ipc) == host_ipc,
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(hipcie & mask) == val,
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HDA_DSP_REG_POLL_INTERVAL_US, HDA_DSP_RESET_TIMEOUT_US);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to set Host IPC interrupt enable\n");
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dev_err(sdev->dev, "failed to set Host IPC interrupt %s\n",
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enable ? "enable" : "disable");
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return ret;
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}
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE,
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MTL_DSP_REG_HfSNDWIE_IE_MASK, MTL_DSP_REG_HfSNDWIE_IE_MASK);
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host_ipc = MTL_DSP_REG_HfSNDWIE_IE_MASK;
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/* Enable/Disable SoundWire interrupt */
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mask = MTL_DSP_REG_HfSNDWIE_IE_MASK;
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if (enable)
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val = mask;
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else
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val = 0;
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE, mask, val);
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/* check if operation was successful */
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ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE, hipcie,
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(hipcie & host_ipc) == host_ipc,
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(hipcie & mask) == val,
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HDA_DSP_REG_POLL_INTERVAL_US, HDA_DSP_RESET_TIMEOUT_US);
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if (ret < 0)
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dev_err(sdev->dev, "failed to set SoundWire IPC interrupt enable\n");
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return ret;
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}
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static int mtl_disable_interrupts(struct snd_sof_dev *sdev)
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{
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u32 hfintipptr;
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u32 irqinten;
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u32 host_ipc;
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u32 hipcie;
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int ret1;
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int ret;
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/* read Interrupt IP Pointer */
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hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK;
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/* Disable Host IPC and SOUNDWIRE */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, hfintipptr,
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MTL_IRQ_INTEN_L_HOST_IPC_MASK | MTL_IRQ_INTEN_L_SOUNDWIRE_MASK, 0);
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/* check if operation was successful */
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host_ipc = MTL_IRQ_INTEN_L_HOST_IPC_MASK | MTL_IRQ_INTEN_L_SOUNDWIRE_MASK;
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ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, hfintipptr, irqinten,
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(irqinten & host_ipc) == 0,
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HDA_DSP_REG_POLL_INTERVAL_US, HDA_DSP_RESET_TIMEOUT_US);
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/* Continue to disable other interrupts when error happens */
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if (ret < 0)
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dev_err(sdev->dev, "failed to disable Host IPC and SoundWire\n");
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/* Set Host IPC interrupt disable */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE,
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MTL_DSP_REG_HfHIPCIE_IE_MASK, 0);
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/* check if operation was successful */
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host_ipc = MTL_DSP_REG_HfHIPCIE_IE_MASK;
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ret1 = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE, hipcie,
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(hipcie & host_ipc) == 0,
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HDA_DSP_REG_POLL_INTERVAL_US,
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HDA_DSP_RESET_TIMEOUT_US);
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if (ret1 < 0) {
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dev_err(sdev->dev, "failed to set Host IPC interrupt disable\n");
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if (!ret)
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ret = ret1;
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}
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/* Set SoundWire IPC interrupt disable */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE,
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MTL_DSP_REG_HfSNDWIE_IE_MASK, 0);
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host_ipc = MTL_DSP_REG_HfSNDWIE_IE_MASK;
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ret1 = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE, hipcie,
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(hipcie & host_ipc) == 0,
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HDA_DSP_REG_POLL_INTERVAL_US,
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HDA_DSP_RESET_TIMEOUT_US);
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if (ret1 < 0) {
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dev_err(sdev->dev, "failed to set SoundWire IPC interrupt disable\n");
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if (!ret)
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ret = ret1;
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}
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dev_err(sdev->dev, "failed to set SoundWire IPC interrupt %s\n",
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enable ? "enable" : "disable");
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return ret;
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}
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@ -473,7 +433,7 @@ static int mtl_dsp_cl_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_bo
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chip->ipc_ack_mask);
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/* step 4: enable interrupts */
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ret = mtl_enable_interrupts(sdev);
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ret = mtl_enable_interrupts(sdev, true);
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if (ret < 0) {
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if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
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dev_err(sdev->dev, "%s: failed to enable interrupts\n", __func__);
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@ -609,7 +569,7 @@ static void mtl_ipc_dump(struct snd_sof_dev *sdev)
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static int mtl_dsp_disable_interrupts(struct snd_sof_dev *sdev)
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{
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mtl_disable_ipc_interrupts(sdev);
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return mtl_disable_interrupts(sdev);
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return mtl_enable_interrupts(sdev, false);
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}
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/* Meteorlake ops */
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