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PCI: imx6: Simplify reset handling by using *_FLAG_HAS_*_RESET
Refactor the reset handling logic in the imx6 PCI driver by adding IMX6_PCIE_FLAG_HAS_*_RESET bitmask define for drvdata::flags. The drvdata::flags and bitmask ensure a cleaner and more scalable switch-case structure for handling reset. Link: https://lore.kernel.org/r/20240220161924.3871774-4-Frank.Li@nxp.com Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Frank Li
Lorenzo Pieralisi
parent
4e37c2f487
commit
0c9651c21f
@ -61,6 +61,8 @@ enum imx6_pcie_variants {
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#define IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE BIT(1)
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#define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2)
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#define IMX6_PCIE_FLAG_HAS_PHYDRV BIT(3)
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#define IMX6_PCIE_FLAG_HAS_APP_RESET BIT(4)
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#define IMX6_PCIE_FLAG_HAS_PHY_RESET BIT(5)
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#define imx6_check_flag(pci, val) (pci->drvdata->flags & val)
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@ -661,18 +663,10 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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{
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reset_control_assert(imx6_pcie->pciephy_reset);
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reset_control_assert(imx6_pcie->apps_reset);
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switch (imx6_pcie->drvdata->variant) {
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case IMX7D:
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case IMX8MQ:
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case IMX8MQ_EP:
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reset_control_assert(imx6_pcie->pciephy_reset);
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fallthrough;
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case IMX8MM:
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case IMX8MM_EP:
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case IMX8MP:
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case IMX8MP_EP:
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reset_control_assert(imx6_pcie->apps_reset);
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break;
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case IMX6SX:
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
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@ -693,6 +687,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
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IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
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break;
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default:
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break;
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}
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/* Some boards don't have PCIe reset GPIO. */
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@ -706,14 +702,10 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
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struct dw_pcie *pci = imx6_pcie->pci;
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struct device *dev = pci->dev;
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switch (imx6_pcie->drvdata->variant) {
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case IMX8MQ:
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case IMX8MQ_EP:
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reset_control_deassert(imx6_pcie->pciephy_reset);
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break;
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case IMX7D:
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reset_control_deassert(imx6_pcie->pciephy_reset);
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reset_control_deassert(imx6_pcie->pciephy_reset);
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switch (imx6_pcie->drvdata->variant) {
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case IMX7D:
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/* Workaround for ERR010728, failure of PCI-e PLL VCO to
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* oscillate, especially when cold. This turns off "Duty-cycle
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* Corrector" and other mysterious undocumented things.
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@ -745,11 +737,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
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usleep_range(200, 500);
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break;
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case IMX6Q: /* Nothing to do */
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case IMX8MM:
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case IMX8MM_EP:
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case IMX8MP:
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case IMX8MP_EP:
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default:
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break;
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}
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@ -796,16 +784,11 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
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IMX6Q_GPR12_PCIE_CTL_2,
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IMX6Q_GPR12_PCIE_CTL_2);
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break;
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case IMX7D:
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX8MM:
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case IMX8MM_EP:
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case IMX8MP:
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case IMX8MP_EP:
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reset_control_deassert(imx6_pcie->apps_reset);
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default:
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break;
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}
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reset_control_deassert(imx6_pcie->apps_reset);
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}
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static void imx6_pcie_ltssm_disable(struct device *dev)
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@ -819,16 +802,11 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX6Q_GPR12_PCIE_CTL_2, 0);
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break;
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case IMX7D:
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX8MM:
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case IMX8MM_EP:
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case IMX8MP:
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case IMX8MP_EP:
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reset_control_assert(imx6_pcie->apps_reset);
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default:
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break;
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}
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reset_control_assert(imx6_pcie->apps_reset);
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}
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static int imx6_pcie_start_link(struct dw_pcie *pci)
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@ -1287,37 +1265,26 @@ static int imx6_pcie_probe(struct platform_device *pdev)
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"failed to get pcie phy\n");
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}
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if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_APP_RESET)) {
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imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev, "apps");
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if (IS_ERR(imx6_pcie->apps_reset))
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return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset),
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"failed to get pcie apps reset control\n");
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}
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if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_PHY_RESET)) {
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imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, "pciephy");
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if (IS_ERR(imx6_pcie->pciephy_reset))
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return dev_err_probe(dev, PTR_ERR(imx6_pcie->pciephy_reset),
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"Failed to get PCIEPHY reset control\n");
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}
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switch (imx6_pcie->drvdata->variant) {
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case IMX8MQ:
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case IMX8MQ_EP:
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case IMX7D:
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if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR)
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imx6_pcie->controller_id = 1;
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imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev,
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"pciephy");
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if (IS_ERR(imx6_pcie->pciephy_reset)) {
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dev_err(dev, "Failed to get PCIEPHY reset control\n");
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return PTR_ERR(imx6_pcie->pciephy_reset);
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}
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imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev,
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"apps");
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if (IS_ERR(imx6_pcie->apps_reset)) {
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dev_err(dev, "Failed to get PCIE APPS reset control\n");
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return PTR_ERR(imx6_pcie->apps_reset);
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}
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break;
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case IMX8MM:
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case IMX8MM_EP:
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case IMX8MP:
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case IMX8MP_EP:
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imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev,
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"apps");
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if (IS_ERR(imx6_pcie->apps_reset))
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return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset),
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"failed to get pcie apps reset control\n");
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break;
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default:
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break;
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@ -1448,13 +1415,17 @@ static const struct imx6_pcie_drvdata drvdata[] = {
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},
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[IMX7D] = {
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.variant = IMX7D,
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.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
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.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
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IMX6_PCIE_FLAG_HAS_APP_RESET |
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IMX6_PCIE_FLAG_HAS_PHY_RESET,
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.gpr = "fsl,imx7d-iomuxc-gpr",
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.clk_names = imx6q_clks,
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.clks_cnt = ARRAY_SIZE(imx6q_clks),
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},
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[IMX8MQ] = {
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.variant = IMX8MQ,
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.flags = IMX6_PCIE_FLAG_HAS_APP_RESET |
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IMX6_PCIE_FLAG_HAS_PHY_RESET,
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.gpr = "fsl,imx8mq-iomuxc-gpr",
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.clk_names = imx8mq_clks,
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.clks_cnt = ARRAY_SIZE(imx8mq_clks),
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@ -1471,13 +1442,16 @@ static const struct imx6_pcie_drvdata drvdata[] = {
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[IMX8MP] = {
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.variant = IMX8MP,
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.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
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IMX6_PCIE_FLAG_HAS_PHYDRV,
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IMX6_PCIE_FLAG_HAS_PHYDRV |
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IMX6_PCIE_FLAG_HAS_APP_RESET,
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.gpr = "fsl,imx8mp-iomuxc-gpr",
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.clk_names = imx8mm_clks,
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.clks_cnt = ARRAY_SIZE(imx8mm_clks),
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},
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[IMX8MQ_EP] = {
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.variant = IMX8MQ_EP,
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.flags = IMX6_PCIE_FLAG_HAS_APP_RESET |
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IMX6_PCIE_FLAG_HAS_PHY_RESET,
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.mode = DW_PCIE_EP_TYPE,
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.gpr = "fsl,imx8mq-iomuxc-gpr",
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.clk_names = imx8mq_clks,
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