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clk: samsung: exynos7885: Update CLKS_NR_FSYS after bindings fix
Update CLKS_NR_FSYS to the proper value after a fix in DT bindings.
This should always be the last clock in a CMU + 1.
Fixes: cd268e309c
("dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS")
Cc: stable@vger.kernel.org
Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20240806121157.479212-5-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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@ -20,7 +20,7 @@
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#define CLKS_NR_TOP (CLK_GOUT_FSYS_USB30DRD + 1)
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#define CLKS_NR_CORE (CLK_GOUT_TREX_P_CORE_PCLK_P_CORE + 1)
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#define CLKS_NR_PERI (CLK_GOUT_WDT1_PCLK + 1)
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#define CLKS_NR_FSYS (CLK_GOUT_MMC_SDIO_SDCLKIN + 1)
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#define CLKS_NR_FSYS (CLK_MOUT_FSYS_USB30DRD_USER + 1)
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/* ---- CMU_TOP ------------------------------------------------------------- */
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