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clk: mediatek: mt6765: use mtk_clk_simple_probe to simplify driver

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mtk_clk_simple_probe was added by Chun-Jie to simply common flow
of MediaTek clock drivers and ChenYu enhanced the error path of
mtk_clk_simple_probe and added mtk_clk_simple_remove.

Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other
MediaTek clock drivers as well.

Signed-off-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220922091841.4099-4-miles.chen@mediatek.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
This commit is contained in:
Miles Chen 2022-09-22 17:18:31 +08:00 committed by Chen-Yu Tsai
parent f3e4e7350e
commit 2b74c1f6ef
6 changed files with 72 additions and 129 deletions
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34
drivers/clk/mediatek/clk-mt6765-audio.c
View File

@ -64,33 +64,23 @@ static const struct mtk_gate audio_clks[] = {
"audio_ck", 7),
};
static int clk_mt6765_audio_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
int r;
struct device_node *node = pdev->dev.of_node;
clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
mtk_clk_register_gates(node, audio_clks,
ARRAY_SIZE(audio_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
return r;
}
static const struct mtk_clk_desc audio_desc = {
.clks = audio_clks,
.num_clks = ARRAY_SIZE(audio_clks),
};
static const struct of_device_id of_match_clk_mt6765_audio[] = {
{ .compatible = "mediatek,mt6765-audsys", },
{}
{
.compatible = "mediatek,mt6765-audsys",
.data = &audio_desc,
}, {
/* sentinel */
}
};
static struct platform_driver clk_mt6765_audio_drv = {
.probe = clk_mt6765_audio_probe,
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt6765-audio",
.of_match_table = of_match_clk_mt6765_audio,

33
drivers/clk/mediatek/clk-mt6765-cam.c
View File

@ -39,32 +39,23 @@ static const struct mtk_gate cam_clks[] = {
GATE_CAM(CLK_CAM_CCU, "cam_ccu", "mm_ck", 12),
};
static int clk_mt6765_cam_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
int r;
struct device_node *node = pdev->dev.of_node;
clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
return r;
}
static const struct mtk_clk_desc cam_desc = {
.clks = cam_clks,
.num_clks = ARRAY_SIZE(cam_clks),
};
static const struct of_device_id of_match_clk_mt6765_cam[] = {
{ .compatible = "mediatek,mt6765-camsys", },
{}
{
.compatible = "mediatek,mt6765-camsys",
.data = &cam_desc,
}, {
/* sentinel */
}
};
static struct platform_driver clk_mt6765_cam_drv = {
.probe = clk_mt6765_cam_probe,
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt6765-cam",
.of_match_table = of_match_clk_mt6765_cam,

33
drivers/clk/mediatek/clk-mt6765-img.c
View File

@ -35,32 +35,23 @@ static const struct mtk_gate img_clks[] = {
GATE_IMG(CLK_IMG_RSC, "img_rsc", "mm_ck", 5),
};
static int clk_mt6765_img_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
int r;
struct device_node *node = pdev->dev.of_node;
clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
return r;
}
static const struct mtk_clk_desc img_desc = {
.clks = img_clks,
.num_clks = ARRAY_SIZE(img_clks),
};
static const struct of_device_id of_match_clk_mt6765_img[] = {
{ .compatible = "mediatek,mt6765-imgsys", },
{}
{
.compatible = "mediatek,mt6765-imgsys",
.data = &img_desc,
}, {
/* sentinel */
}
};
static struct platform_driver clk_mt6765_img_drv = {
.probe = clk_mt6765_img_probe,
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt6765-img",
.of_match_table = of_match_clk_mt6765_img,

34
drivers/clk/mediatek/clk-mt6765-mipi0a.c
View File

@ -32,33 +32,23 @@ static const struct mtk_gate mipi0a_clks[] = {
"mipi0a_csr_0a", "f_fseninf_ck", 1),
};
static int clk_mt6765_mipi0a_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
int r;
struct device_node *node = pdev->dev.of_node;
clk_data = mtk_alloc_clk_data(CLK_MIPI0A_NR_CLK);
mtk_clk_register_gates(node, mipi0a_clks,
ARRAY_SIZE(mipi0a_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
return r;
}
static const struct mtk_clk_desc mipi0a_desc = {
.clks = mipi0a_clks,
.num_clks = ARRAY_SIZE(mipi0a_clks),
};
static const struct of_device_id of_match_clk_mt6765_mipi0a[] = {
{ .compatible = "mediatek,mt6765-mipi0a", },
{}
{
.compatible = "mediatek,mt6765-mipi0a",
.data = &mipi0a_desc,
}, {
/* sentinel */
}
};
static struct platform_driver clk_mt6765_mipi0a_drv = {
.probe = clk_mt6765_mipi0a_probe,
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt6765-mipi0a",
.of_match_table = of_match_clk_mt6765_mipi0a,

33
drivers/clk/mediatek/clk-mt6765-mm.c
View File

@ -61,32 +61,23 @@ static const struct mtk_gate mm_clks[] = {
GATE_MM(CLK_MM_F26M_HRTWT, "mm_hrtwt", "f_f26m_ck", 29),
};
static int clk_mt6765_mm_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
int r;
struct device_node *node = pdev->dev.of_node;
clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
return r;
}
static const struct mtk_clk_desc mm_desc = {
.clks = mm_clks,
.num_clks = ARRAY_SIZE(mm_clks),
};
static const struct of_device_id of_match_clk_mt6765_mm[] = {
{ .compatible = "mediatek,mt6765-mmsys", },
{}
{
.compatible = "mediatek,mt6765-mmsys",
.data = &mm_desc,
}, {
/* sentinel */
}
};
static struct platform_driver clk_mt6765_mm_drv = {
.probe = clk_mt6765_mm_probe,
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt6765-mm",
.of_match_table = of_match_clk_mt6765_mm,

34
drivers/clk/mediatek/clk-mt6765-vcodec.c
View File

@ -34,33 +34,23 @@ static const struct mtk_gate venc_clks[] = {
GATE_VENC(CLK_VENC_SET3_VDEC, "venc_set3_vdec", "mm_ck", 12),
};
static int clk_mt6765_vcodec_probe(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
int r;
struct device_node *node = pdev->dev.of_node;
clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
mtk_clk_register_gates(node, venc_clks,
ARRAY_SIZE(venc_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
return r;
}
static const struct mtk_clk_desc venc_desc = {
.clks = venc_clks,
.num_clks = ARRAY_SIZE(venc_clks),
};
static const struct of_device_id of_match_clk_mt6765_vcodec[] = {
{ .compatible = "mediatek,mt6765-vcodecsys", },
{}
{
.compatible = "mediatek,mt6765-vcodecsys",
.data = &venc_desc,
}, {
/* sentinel */
}
};
static struct platform_driver clk_mt6765_vcodec_drv = {
.probe = clk_mt6765_vcodec_probe,
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt6765-vcodec",
.of_match_table = of_match_clk_mt6765_vcodec,