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[WATCHDOG] davinci: convert to ioremap() + io[read|write]
Remove davinci platform-specific IO accessor macros in favor of standard ioremap + io[read|write]* functions. Also, convert printk(KERN_ERR ....) into dev_err(...) Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -24,7 +24,7 @@
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <linux/device.h>
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#define MODULE_NAME "DAVINCI-WDT: "
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@ -75,9 +75,9 @@ static void wdt_service(void)
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spin_lock(&io_lock);
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/* put watchdog in service state */
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davinci_writel(WDKEY_SEQ0, wdt_base + WDTCR);
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iowrite32(WDKEY_SEQ0, wdt_base + WDTCR);
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/* put watchdog in active state */
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davinci_writel(WDKEY_SEQ1, wdt_base + WDTCR);
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iowrite32(WDKEY_SEQ1, wdt_base + WDTCR);
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spin_unlock(&io_lock);
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}
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@ -90,29 +90,29 @@ static void wdt_enable(void)
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spin_lock(&io_lock);
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/* disable, internal clock source */
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davinci_writel(0, wdt_base + TCR);
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iowrite32(0, wdt_base + TCR);
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/* reset timer, set mode to 64-bit watchdog, and unreset */
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davinci_writel(0, wdt_base + TGCR);
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iowrite32(0, wdt_base + TGCR);
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tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET;
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davinci_writel(tgcr, wdt_base + TGCR);
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iowrite32(tgcr, wdt_base + TGCR);
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/* clear counter regs */
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davinci_writel(0, wdt_base + TIM12);
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davinci_writel(0, wdt_base + TIM34);
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iowrite32(0, wdt_base + TIM12);
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iowrite32(0, wdt_base + TIM34);
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/* set timeout period */
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timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff);
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davinci_writel(timer_margin, wdt_base + PRD12);
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iowrite32(timer_margin, wdt_base + PRD12);
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timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32);
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davinci_writel(timer_margin, wdt_base + PRD34);
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iowrite32(timer_margin, wdt_base + PRD34);
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/* enable run continuously */
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davinci_writel(ENAMODE12_PERIODIC, wdt_base + TCR);
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iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR);
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/* Once the WDT is in pre-active state write to
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* TIM12, TIM34, PRD12, PRD34, TCR, TGCR, WDTCR are
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* write protected (except for the WDKEY field)
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*/
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/* put watchdog in pre-active state */
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davinci_writel(WDKEY_SEQ0 | WDEN, wdt_base + WDTCR);
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iowrite32(WDKEY_SEQ0 | WDEN, wdt_base + WDTCR);
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/* put watchdog in active state */
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davinci_writel(WDKEY_SEQ1 | WDEN, wdt_base + WDTCR);
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iowrite32(WDKEY_SEQ1 | WDEN, wdt_base + WDTCR);
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spin_unlock(&io_lock);
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}
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@ -197,17 +197,16 @@ static int davinci_wdt_probe(struct platform_device *pdev)
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{
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int ret = 0, size;
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struct resource *res;
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struct device *dev = &pdev->dev;
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if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
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heartbeat = DEFAULT_HEARTBEAT;
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printk(KERN_INFO MODULE_NAME
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"DaVinci Watchdog Timer: heartbeat %d sec\n", heartbeat);
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dev_info(dev, "heartbeat %d sec\n", heartbeat);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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printk(KERN_INFO MODULE_NAME
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"failed to get memory region resource\n");
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dev_err(dev, "failed to get memory region resource\n");
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return -ENOENT;
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}
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@ -215,20 +214,26 @@ static int davinci_wdt_probe(struct platform_device *pdev)
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wdt_mem = request_mem_region(res->start, size, pdev->name);
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if (wdt_mem == NULL) {
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printk(KERN_INFO MODULE_NAME "failed to get memory region\n");
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dev_err(dev, "failed to get memory region\n");
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return -ENOENT;
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}
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wdt_base = (void __iomem *)(res->start);
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wdt_base = ioremap(res->start, size);
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if (!wdt_base) {
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dev_err(dev, "failed to map memory region\n");
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return -ENOMEM;
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}
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ret = misc_register(&davinci_wdt_miscdev);
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if (ret < 0) {
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printk(KERN_ERR MODULE_NAME "cannot register misc device\n");
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dev_err(dev, "cannot register misc device\n");
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release_resource(wdt_mem);
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kfree(wdt_mem);
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} else {
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set_bit(WDT_DEVICE_INITED, &wdt_status);
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}
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iounmap(wdt_base);
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return ret;
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}
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