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ARC fixes for 6.13-r32 or rc4
- Sundry build and miscll fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEOXpuCuR6hedrdLCJadfx3eKKwl4FAmdfQAcACgkQadfx3eKK wl6lZA//QoPtf7KpQAnBKMwX+hVJZmHPnM4PPMXl6vdPC8whVvAccw4/6pzzkMrb w2hn6CW7A3ZuJ22BEstfMiUhRadL7BKbfp/R3ODzV4ta66cW1ziTl4i4RPSGS5xE 5vPWg6OSRm/gtGByFeXYL2G6YooWs4oVbK5V/7G8eyUXeyCQpJPxg2bDOBYplDVa nL84yA31Q8UIFL6guQl4E0y3stJzuIg1jnL6ZB2H1+IRE0krQ3pF9zvPO3DdSWEZ UPN3vsuXlOt0VSqird0T+9v1hr2gMKoWYECJZemN8wX2mrCBL/qqeQERSp3Acb/c DLrxNlT9lTrmWecmfAH/Xe6NteYZFojqOw0dSZT1sKR43pjAPysfk0f3LeaynQ+0 kB7DE9XOKWVOsa+FhtlC19UyvW0UFAuknPxFkFiDMpUf70kWn8mXZ5DDyAotDeGk 62HQT4TLhWWb4qcLdYmJ5ZQH5PhN9/kp4kxNHNzpChjuQnByZURpFIm+Bln/IUyQ E7Ac3sZLMoPMzOqj7ENJ3YhiDFKu2prKvhjCxAN62DvGCNxa+twSBCINXsCnZ7/e wjHKNqhcg4xd3LcJHAsKl+KHSgwU/pQ4ne17KSlqb0fml7Xo6epkq7Esgsy2bVsg Ubm1xAufcumxSXYxxti0e8yMr+VyEYrSlG43yfGFAbnwga6VINk= =YFuZ -----END PGP SIGNATURE----- Merge tag 'arc-6.13-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: - Sundry build and misc fixes * tag 'arc-6.13-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: build: Try to guess GCC variant of cross compiler ARC: bpf: Correct conditional check in 'check_jmp_32' ARC: dts: Replace deprecated snps,nr-gpios property for snps,dw-apb-gpio-port devices ARC: build: Use __force to suppress per-CPU cmpxchg warnings ARC: fix reference of dependency for PAE40 config ARC: build: disallow invalid PAE40 + 4K page config arc: rename aux.h to arc_aux.h
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commit
42a19aa170
@ -297,7 +297,6 @@ config ARC_PAGE_SIZE_16K
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config ARC_PAGE_SIZE_4K
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config ARC_PAGE_SIZE_4K
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bool "4KB"
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bool "4KB"
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select HAVE_PAGE_SIZE_4KB
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select HAVE_PAGE_SIZE_4KB
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depends on ARC_MMU_V3 || ARC_MMU_V4
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endchoice
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endchoice
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@ -474,7 +473,8 @@ config HIGHMEM
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config ARC_HAS_PAE40
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config ARC_HAS_PAE40
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bool "Support for the 40-bit Physical Address Extension"
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bool "Support for the 40-bit Physical Address Extension"
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depends on ISA_ARCV2
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depends on ARC_MMU_V4
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depends on !ARC_PAGE_SIZE_4K
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select HIGHMEM
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select HIGHMEM
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select PHYS_ADDR_T_64BIT
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select PHYS_ADDR_T_64BIT
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help
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help
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@ -6,7 +6,7 @@
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KBUILD_DEFCONFIG := haps_hs_smp_defconfig
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KBUILD_DEFCONFIG := haps_hs_smp_defconfig
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ifeq ($(CROSS_COMPILE),)
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ifeq ($(CROSS_COMPILE),)
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CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-)
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CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux- arc-linux-gnu-)
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endif
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endif
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cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
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cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
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@ -54,7 +54,7 @@ ictl_intc: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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ngpios = <30>;
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reg = <0>;
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reg = <0>;
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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@ -62,7 +62,7 @@ ictl_intc: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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ngpios = <30>;
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reg = <0>;
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reg = <0>;
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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@ -69,7 +69,7 @@ ictl_intc: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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ngpios = <30>;
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reg = <0>;
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reg = <0>;
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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@ -250,7 +250,7 @@ gpio0_banka: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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ngpios = <32>;
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reg = <0>;
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reg = <0>;
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};
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};
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@ -258,7 +258,7 @@ gpio0_bankb: gpio-controller@1 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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ngpios = <8>;
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reg = <1>;
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reg = <1>;
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};
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};
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@ -266,7 +266,7 @@ gpio0_bankc: gpio-controller@2 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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ngpios = <8>;
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reg = <2>;
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reg = <2>;
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};
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};
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};
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};
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@ -281,7 +281,7 @@ gpio1_banka: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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ngpios = <30>;
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reg = <0>;
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reg = <0>;
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};
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};
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@ -289,7 +289,7 @@ gpio1_bankb: gpio-controller@1 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <10>;
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ngpios = <10>;
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reg = <1>;
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reg = <1>;
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};
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};
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@ -297,7 +297,7 @@ gpio1_bankc: gpio-controller@2 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <8>;
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ngpios = <8>;
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reg = <2>;
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reg = <2>;
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};
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};
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};
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};
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@ -308,7 +308,7 @@ gpio_port_a: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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snps,nr-gpios = <24>;
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ngpios = <24>;
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reg = <0>;
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reg = <0>;
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};
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};
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};
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};
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@ -146,7 +146,7 @@
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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#include <soc/arc/aux.h>
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#include <soc/arc/arc_aux.h>
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/* Helpers */
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/* Helpers */
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#define TO_KB(bytes) ((bytes) >> 10)
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#define TO_KB(bytes) ((bytes) >> 10)
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@ -48,7 +48,7 @@
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\
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\
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switch(sizeof((_p_))) { \
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switch(sizeof((_p_))) { \
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case 1: \
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case 1: \
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_prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, (uintptr_t)_n_); \
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_prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *__force)_p_, (uintptr_t)_o_, (uintptr_t)_n_); \
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break; \
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break; \
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case 4: \
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case 4: \
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_prev_ = __cmpxchg(_p_, _o_, _n_); \
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_prev_ = __cmpxchg(_p_, _o_, _n_); \
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@ -9,7 +9,7 @@
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#ifndef _ASM_ARC_MMU_ARCV2_H
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#ifndef _ASM_ARC_MMU_ARCV2_H
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#define _ASM_ARC_MMU_ARCV2_H
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#define _ASM_ARC_MMU_ARCV2_H
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#include <soc/arc/aux.h>
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#include <soc/arc/arc_aux.h>
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/*
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/*
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* TLB Management regs
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* TLB Management regs
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@ -2916,7 +2916,7 @@ bool check_jmp_32(u32 curr_off, u32 targ_off, u8 cond)
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addendum = (cond == ARC_CC_AL) ? 0 : INSN_len_normal;
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addendum = (cond == ARC_CC_AL) ? 0 : INSN_len_normal;
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disp = get_displacement(curr_off + addendum, targ_off);
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disp = get_displacement(curr_off + addendum, targ_off);
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if (ARC_CC_AL)
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if (cond == ARC_CC_AL)
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return is_valid_far_disp(disp);
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return is_valid_far_disp(disp);
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else
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else
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return is_valid_near_disp(disp);
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return is_valid_near_disp(disp);
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@ -8,7 +8,7 @@
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#ifndef __SOC_ARC_MCIP_H
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#ifndef __SOC_ARC_MCIP_H
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#define __SOC_ARC_MCIP_H
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#define __SOC_ARC_MCIP_H
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#include <soc/arc/aux.h>
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#include <soc/arc/arc_aux.h>
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#define ARC_REG_MCIP_BCR 0x0d0
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#define ARC_REG_MCIP_BCR 0x0d0
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#define ARC_REG_MCIP_IDU_BCR 0x0D5
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#define ARC_REG_MCIP_IDU_BCR 0x0D5
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@ -6,7 +6,7 @@
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#ifndef __SOC_ARC_TIMERS_H
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#ifndef __SOC_ARC_TIMERS_H
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#define __SOC_ARC_TIMERS_H
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#define __SOC_ARC_TIMERS_H
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#include <soc/arc/aux.h>
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#include <soc/arc/arc_aux.h>
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/* Timer related Aux registers */
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/* Timer related Aux registers */
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#define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
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#define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
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