mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-12-28 16:56:26 +00:00
Updates for time and clocksources:
- A fix for the idle and iowait time accounting vs. CPU hotplug. The time is reset on CPU hotplug which makes the accumulated systemwide time jump backwards. - Assorted fixes and improvements for clocksource/event drivers -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmWtTLgTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoUXiD/4uN4Ntps8TwxSdg1X11M6++rizg9q9 EmIfwWcfQQJDM5Ss5FE88ye55NxIOwJ1brYo08+yTAXjnnZ/yNP1BBegHbMNiGil NCHye7tYKZle25+hErdgfBB9n6brPz7dPOvV04/wRRWW+9p2ejt/5nEvojkyco9Y S9KgBCxkvUqScMbdKKFW1UsThWh2euxwQXRGiWhTPPkbKcVynPvQJjvVyRxn01NS eEhTn8YUNcAPT+1YApouGXrSCxo/IzBJ36CxOoCoUfaXcJ6FG1LLeAjNxKZ26Dfs Ah0e3Hhyv6KOsBvBNwwabXDwryd6L8rZd8yL2KakI1vIC51uS2wneFy8GCieDVGh xmy3U/tfkS0L7pmN+dQW2l4k9PHRNrwvbISKhs0UAHSOgGIMHZcjE6aFbYKru5i4 1W+dEjiktlceZ94mrEHbLpKmxWH2z5P8m0BzUs4kt3nkaOf6CTUKqa/qdAiU5dv+ lovKT26L8HBrMXf48I70UpgW/bYzOUGk55sR6hiLTXAelz1z02D1uYHFkshc0NCO /O4wvHcgvMM46CtWVbim42AlRcyyWCr+FrY+jvfiG2icOcHPLqc81iHL8EKj7pJl IxLgyPHVckgnE5gx+GQ8aDkg/qwCZnj4rFWgub8QMYtjI+pO+9T9kPAYPCxFhP7J gmcJxZAB2RnKXA== =RD6E -----END PGP SIGNATURE----- Merge tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer updates from Thomas Gleixner: "Updates for time and clocksources: - A fix for the idle and iowait time accounting vs CPU hotplug. The time is reset on CPU hotplug which makes the accumulated systemwide time jump backwards. - Assorted fixes and improvements for clocksource/event drivers" * tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: tick-sched: Fix idle and iowait sleeptime accounting vs CPU hotplug clocksource/drivers/ep93xx: Fix error handling during probe clocksource/drivers/cadence-ttc: Fix some kernel-doc warnings clocksource/drivers/timer-ti-dm: Fix make W=n kerneldoc warnings clocksource/timer-riscv: Add riscv_clock_shutdown callback dt-bindings: timer: Add StarFive JH8100 clint dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs
This commit is contained in:
commit
4fbbed7872
@ -33,6 +33,7 @@ properties:
|
||||
- sifive,fu540-c000-clint # SiFive FU540
|
||||
- starfive,jh7100-clint # StarFive JH7100
|
||||
- starfive,jh7110-clint # StarFive JH7110
|
||||
- starfive,jh8100-clint # StarFive JH8100
|
||||
- const: sifive,clint0 # SiFive CLINT v0 IP block
|
||||
- items:
|
||||
- enum:
|
||||
|
@ -17,7 +17,12 @@ properties:
|
||||
- const: thead,c900-aclint-mtimer
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
items:
|
||||
- description: MTIMECMP Registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: mtimecmp
|
||||
|
||||
interrupts-extended:
|
||||
minItems: 1
|
||||
@ -28,6 +33,7 @@ additionalProperties: false
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts-extended
|
||||
|
||||
examples:
|
||||
@ -39,5 +45,6 @@ examples:
|
||||
<&cpu3intc 7>,
|
||||
<&cpu4intc 7>;
|
||||
reg = <0xac000000 0x00010000>;
|
||||
reg-names = "mtimecmp";
|
||||
};
|
||||
...
|
||||
|
@ -69,7 +69,7 @@
|
||||
* @base_addr: Base address of timer
|
||||
* @freq: Timer input clock frequency
|
||||
* @clk: Associated clock source
|
||||
* @clk_rate_change_nb Notifier block for clock rate changes
|
||||
* @clk_rate_change_nb: Notifier block for clock rate changes
|
||||
*/
|
||||
struct ttc_timer {
|
||||
void __iomem *base_addr;
|
||||
@ -134,7 +134,7 @@ static void ttc_set_interval(struct ttc_timer *timer,
|
||||
* @irq: IRQ number of the Timer
|
||||
* @dev_id: void pointer to the ttc_timer instance
|
||||
*
|
||||
* returns: Always IRQ_HANDLED - success
|
||||
* Returns: Always IRQ_HANDLED - success
|
||||
**/
|
||||
static irqreturn_t ttc_clock_event_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
@ -151,8 +151,9 @@ static irqreturn_t ttc_clock_event_interrupt(int irq, void *dev_id)
|
||||
|
||||
/**
|
||||
* __ttc_clocksource_read - Reads the timer counter register
|
||||
* @cs: &clocksource to read from
|
||||
*
|
||||
* returns: Current timer counter register value
|
||||
* Returns: Current timer counter register value
|
||||
**/
|
||||
static u64 __ttc_clocksource_read(struct clocksource *cs)
|
||||
{
|
||||
@ -173,7 +174,7 @@ static u64 notrace ttc_sched_clock_read(void)
|
||||
* @cycles: Timer interval ticks
|
||||
* @evt: Address of clock event instance
|
||||
*
|
||||
* returns: Always 0 - success
|
||||
* Returns: Always %0 - success
|
||||
**/
|
||||
static int ttc_set_next_event(unsigned long cycles,
|
||||
struct clock_event_device *evt)
|
||||
@ -186,9 +187,12 @@ static int ttc_set_next_event(unsigned long cycles,
|
||||
}
|
||||
|
||||
/**
|
||||
* ttc_set_{shutdown|oneshot|periodic} - Sets the state of timer
|
||||
*
|
||||
* ttc_shutdown - Sets the state of timer
|
||||
* @evt: Address of clock event instance
|
||||
*
|
||||
* Used for shutdown or oneshot.
|
||||
*
|
||||
* Returns: Always %0 - success
|
||||
**/
|
||||
static int ttc_shutdown(struct clock_event_device *evt)
|
||||
{
|
||||
@ -202,6 +206,12 @@ static int ttc_shutdown(struct clock_event_device *evt)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ttc_set_periodic - Sets the state of timer
|
||||
* @evt: Address of clock event instance
|
||||
*
|
||||
* Returns: Always %0 - success
|
||||
*/
|
||||
static int ttc_set_periodic(struct clock_event_device *evt)
|
||||
{
|
||||
struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
|
||||
|
@ -155,9 +155,8 @@ static int __init ep93xx_timer_of_init(struct device_node *np)
|
||||
ep93xx_tcu = tcu;
|
||||
|
||||
irq = irq_of_parse_and_map(np, 0);
|
||||
if (irq == 0)
|
||||
irq = -EINVAL;
|
||||
if (irq < 0) {
|
||||
if (!irq) {
|
||||
ret = -EINVAL;
|
||||
pr_err("EP93XX Timer Can't parse IRQ %d", irq);
|
||||
goto out_free;
|
||||
}
|
||||
|
@ -61,12 +61,19 @@ static int riscv_clock_next_event(unsigned long delta,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int riscv_clock_shutdown(struct clock_event_device *evt)
|
||||
{
|
||||
riscv_clock_event_stop();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int riscv_clock_event_irq;
|
||||
static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
|
||||
.name = "riscv_timer_clockevent",
|
||||
.features = CLOCK_EVT_FEAT_ONESHOT,
|
||||
.rating = 100,
|
||||
.set_next_event = riscv_clock_next_event,
|
||||
.set_state_shutdown = riscv_clock_shutdown,
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -183,7 +183,7 @@ static inline u32 dmtimer_read(struct dmtimer *timer, u32 reg)
|
||||
* dmtimer_write - write timer registers in posted and non-posted mode
|
||||
* @timer: timer pointer over which write operation is to perform
|
||||
* @reg: lowest byte holds the register offset
|
||||
* @value: data to write into the register
|
||||
* @val: data to write into the register
|
||||
*
|
||||
* The posted mode bit is encoded in reg. Note that in posted mode, the write
|
||||
* pending bit must be checked. Otherwise a write on a register which has a
|
||||
@ -949,7 +949,7 @@ static int omap_dm_timer_set_int_enable(struct omap_dm_timer *cookie,
|
||||
|
||||
/**
|
||||
* omap_dm_timer_set_int_disable - disable timer interrupts
|
||||
* @timer: pointer to timer handle
|
||||
* @cookie: pointer to timer cookie
|
||||
* @mask: bit mask of interrupts to be disabled
|
||||
*
|
||||
* Disables the specified timer interrupts for a timer.
|
||||
|
@ -1576,13 +1576,18 @@ void tick_setup_sched_timer(void)
|
||||
void tick_cancel_sched_timer(int cpu)
|
||||
{
|
||||
struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
|
||||
ktime_t idle_sleeptime, iowait_sleeptime;
|
||||
|
||||
# ifdef CONFIG_HIGH_RES_TIMERS
|
||||
if (ts->sched_timer.base)
|
||||
hrtimer_cancel(&ts->sched_timer);
|
||||
# endif
|
||||
|
||||
idle_sleeptime = ts->idle_sleeptime;
|
||||
iowait_sleeptime = ts->iowait_sleeptime;
|
||||
memset(ts, 0, sizeof(*ts));
|
||||
ts->idle_sleeptime = idle_sleeptime;
|
||||
ts->iowait_sleeptime = iowait_sleeptime;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user