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Updates for time and clocksources:
- A fix for the idle and iowait time accounting vs. CPU hotplug.
The time is reset on CPU hotplug which makes the accumulated
systemwide time jump backwards.
- Assorted fixes and improvements for clocksource/event drivers
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Merge tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
"Updates for time and clocksources:
- A fix for the idle and iowait time accounting vs CPU hotplug.
The time is reset on CPU hotplug which makes the accumulated
systemwide time jump backwards.
- Assorted fixes and improvements for clocksource/event drivers"
* tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
tick-sched: Fix idle and iowait sleeptime accounting vs CPU hotplug
clocksource/drivers/ep93xx: Fix error handling during probe
clocksource/drivers/cadence-ttc: Fix some kernel-doc warnings
clocksource/drivers/timer-ti-dm: Fix make W=n kerneldoc warnings
clocksource/timer-riscv: Add riscv_clock_shutdown callback
dt-bindings: timer: Add StarFive JH8100 clint
dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs
This commit is contained in:
Linus Torvalds
commit
4fbbed7872
@ -33,6 +33,7 @@ properties:
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- sifive,fu540-c000-clint # SiFive FU540
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- starfive,jh7100-clint # StarFive JH7100
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- starfive,jh7110-clint # StarFive JH7110
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- starfive,jh8100-clint # StarFive JH8100
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- const: sifive,clint0 # SiFive CLINT v0 IP block
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- items:
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- enum:
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@ -17,7 +17,12 @@ properties:
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- const: thead,c900-aclint-mtimer
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reg:
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maxItems: 1
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items:
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- description: MTIMECMP Registers
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reg-names:
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items:
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- const: mtimecmp
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interrupts-extended:
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minItems: 1
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@ -28,6 +33,7 @@ additionalProperties: false
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required:
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- compatible
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- reg
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- reg-names
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- interrupts-extended
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examples:
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@ -39,5 +45,6 @@ examples:
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<&cpu3intc 7>,
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<&cpu4intc 7>;
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reg = <0xac000000 0x00010000>;
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reg-names = "mtimecmp";
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};
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...
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@ -69,7 +69,7 @@
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* @base_addr: Base address of timer
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* @freq: Timer input clock frequency
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* @clk: Associated clock source
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* @clk_rate_change_nb Notifier block for clock rate changes
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* @clk_rate_change_nb: Notifier block for clock rate changes
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*/
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struct ttc_timer {
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void __iomem *base_addr;
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@ -134,7 +134,7 @@ static void ttc_set_interval(struct ttc_timer *timer,
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* @irq: IRQ number of the Timer
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* @dev_id: void pointer to the ttc_timer instance
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*
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* returns: Always IRQ_HANDLED - success
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* Returns: Always IRQ_HANDLED - success
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**/
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static irqreturn_t ttc_clock_event_interrupt(int irq, void *dev_id)
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{
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@ -151,8 +151,9 @@ static irqreturn_t ttc_clock_event_interrupt(int irq, void *dev_id)
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/**
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* __ttc_clocksource_read - Reads the timer counter register
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* @cs: &clocksource to read from
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*
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* returns: Current timer counter register value
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* Returns: Current timer counter register value
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**/
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static u64 __ttc_clocksource_read(struct clocksource *cs)
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{
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@ -173,7 +174,7 @@ static u64 notrace ttc_sched_clock_read(void)
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* @cycles: Timer interval ticks
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* @evt: Address of clock event instance
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*
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* returns: Always 0 - success
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* Returns: Always %0 - success
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**/
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static int ttc_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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@ -186,9 +187,12 @@ static int ttc_set_next_event(unsigned long cycles,
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}
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/**
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* ttc_set_{shutdown|oneshot|periodic} - Sets the state of timer
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*
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* ttc_shutdown - Sets the state of timer
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* @evt: Address of clock event instance
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*
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* Used for shutdown or oneshot.
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*
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* Returns: Always %0 - success
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**/
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static int ttc_shutdown(struct clock_event_device *evt)
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{
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@ -202,6 +206,12 @@ static int ttc_shutdown(struct clock_event_device *evt)
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return 0;
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}
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/**
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* ttc_set_periodic - Sets the state of timer
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* @evt: Address of clock event instance
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*
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* Returns: Always %0 - success
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*/
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static int ttc_set_periodic(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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@ -155,9 +155,8 @@ static int __init ep93xx_timer_of_init(struct device_node *np)
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ep93xx_tcu = tcu;
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irq = irq_of_parse_and_map(np, 0);
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if (irq == 0)
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irq = -EINVAL;
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if (irq < 0) {
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if (!irq) {
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ret = -EINVAL;
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pr_err("EP93XX Timer Can't parse IRQ %d", irq);
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goto out_free;
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}
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@ -61,12 +61,19 @@ static int riscv_clock_next_event(unsigned long delta,
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return 0;
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}
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static int riscv_clock_shutdown(struct clock_event_device *evt)
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{
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riscv_clock_event_stop();
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return 0;
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}
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static unsigned int riscv_clock_event_irq;
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static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
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.name = "riscv_timer_clockevent",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.rating = 100,
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.set_next_event = riscv_clock_next_event,
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.set_state_shutdown = riscv_clock_shutdown,
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};
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/*
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@ -183,7 +183,7 @@ static inline u32 dmtimer_read(struct dmtimer *timer, u32 reg)
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* dmtimer_write - write timer registers in posted and non-posted mode
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* @timer: timer pointer over which write operation is to perform
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* @reg: lowest byte holds the register offset
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* @value: data to write into the register
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* @val: data to write into the register
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*
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* The posted mode bit is encoded in reg. Note that in posted mode, the write
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* pending bit must be checked. Otherwise a write on a register which has a
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@ -949,7 +949,7 @@ static int omap_dm_timer_set_int_enable(struct omap_dm_timer *cookie,
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/**
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* omap_dm_timer_set_int_disable - disable timer interrupts
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* @timer: pointer to timer handle
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* @cookie: pointer to timer cookie
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* @mask: bit mask of interrupts to be disabled
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*
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* Disables the specified timer interrupts for a timer.
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@ -1576,13 +1576,18 @@ void tick_setup_sched_timer(void)
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void tick_cancel_sched_timer(int cpu)
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{
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struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
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ktime_t idle_sleeptime, iowait_sleeptime;
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# ifdef CONFIG_HIGH_RES_TIMERS
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if (ts->sched_timer.base)
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hrtimer_cancel(&ts->sched_timer);
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# endif
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idle_sleeptime = ts->idle_sleeptime;
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iowait_sleeptime = ts->iowait_sleeptime;
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memset(ts, 0, sizeof(*ts));
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ts->idle_sleeptime = idle_sleeptime;
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ts->iowait_sleeptime = iowait_sleeptime;
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}
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#endif
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