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arm64: TLB maintenance functionality
This patch adds the TLB maintenance functions. There is no distinction made between the I and D TLBs. TLB maintenance operations are automatically broadcast between CPUs in hardware. The inner-shareable operations are always present, even on UP systems. NOTE: Large part of this patch to be dropped once Peter Z's generic mmu_gather patches are merged. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Catalin Marinas
parent
f1a0c4aa09
commit
58d0ba578b
190
arch/arm64/include/asm/tlb.h
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190
arch/arm64/include/asm/tlb.h
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@ -0,0 +1,190 @@
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/*
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* Based on arch/arm/include/asm/tlb.h
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*
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* Copyright (C) 2002 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_TLB_H
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#define __ASM_TLB_H
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#include <linux/pagemap.h>
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#include <linux/swap.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#define MMU_GATHER_BUNDLE 8
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/*
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* TLB handling. This allows us to remove pages from the page
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* tables, and efficiently handle the TLB issues.
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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unsigned int fullmm;
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struct vm_area_struct *vma;
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unsigned long range_start;
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unsigned long range_end;
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unsigned int nr;
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unsigned int max;
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struct page **pages;
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struct page *local[MMU_GATHER_BUNDLE];
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};
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/*
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* This is unnecessarily complex. There's three ways the TLB shootdown
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* code is used:
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* 1. Unmapping a range of vmas. See zap_page_range(), unmap_region().
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* tlb->fullmm = 0, and tlb_start_vma/tlb_end_vma will be called.
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* tlb->vma will be non-NULL.
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* 2. Unmapping all vmas. See exit_mmap().
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* tlb->fullmm = 1, and tlb_start_vma/tlb_end_vma will be called.
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* tlb->vma will be non-NULL. Additionally, page tables will be freed.
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* 3. Unmapping argument pages. See shift_arg_pages().
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* tlb->fullmm = 0, but tlb_start_vma/tlb_end_vma will not be called.
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* tlb->vma will be NULL.
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*/
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static inline void tlb_flush(struct mmu_gather *tlb)
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{
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if (tlb->fullmm || !tlb->vma)
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flush_tlb_mm(tlb->mm);
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else if (tlb->range_end > 0) {
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flush_tlb_range(tlb->vma, tlb->range_start, tlb->range_end);
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tlb->range_start = TASK_SIZE;
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tlb->range_end = 0;
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}
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}
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static inline void tlb_add_flush(struct mmu_gather *tlb, unsigned long addr)
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{
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if (!tlb->fullmm) {
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if (addr < tlb->range_start)
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tlb->range_start = addr;
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if (addr + PAGE_SIZE > tlb->range_end)
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tlb->range_end = addr + PAGE_SIZE;
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}
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}
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static inline void __tlb_alloc_page(struct mmu_gather *tlb)
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{
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unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0);
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if (addr) {
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tlb->pages = (void *)addr;
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tlb->max = PAGE_SIZE / sizeof(struct page *);
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}
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}
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static inline void tlb_flush_mmu(struct mmu_gather *tlb)
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{
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tlb_flush(tlb);
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free_pages_and_swap_cache(tlb->pages, tlb->nr);
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tlb->nr = 0;
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if (tlb->pages == tlb->local)
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__tlb_alloc_page(tlb);
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}
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static inline void
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tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned int fullmm)
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{
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tlb->mm = mm;
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tlb->fullmm = fullmm;
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tlb->vma = NULL;
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tlb->max = ARRAY_SIZE(tlb->local);
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tlb->pages = tlb->local;
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tlb->nr = 0;
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__tlb_alloc_page(tlb);
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}
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static inline void
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tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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tlb_flush_mmu(tlb);
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/* keep the page table cache within bounds */
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check_pgt_cache();
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if (tlb->pages != tlb->local)
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free_pages((unsigned long)tlb->pages, 0);
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}
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/*
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* Memorize the range for the TLB flush.
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*/
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static inline void
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tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr)
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{
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tlb_add_flush(tlb, addr);
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}
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/*
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* In the case of tlb vma handling, we can optimise these away in the
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* case where we're doing a full MM flush. When we're doing a munmap,
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* the vmas are adjusted to only cover the region to be torn down.
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*/
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static inline void
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tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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if (!tlb->fullmm) {
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tlb->vma = vma;
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tlb->range_start = TASK_SIZE;
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tlb->range_end = 0;
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}
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}
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static inline void
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tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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if (!tlb->fullmm)
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tlb_flush(tlb);
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}
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static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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tlb->pages[tlb->nr++] = page;
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VM_BUG_ON(tlb->nr > tlb->max);
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return tlb->max - tlb->nr;
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}
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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if (!__tlb_remove_page(tlb, page))
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tlb_flush_mmu(tlb);
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}
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static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
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unsigned long addr)
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{
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pgtable_page_dtor(pte);
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tlb_add_flush(tlb, addr);
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tlb_remove_page(tlb, pte);
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}
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#ifndef CONFIG_ARM64_64K_PAGES
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static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
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unsigned long addr)
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{
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tlb_add_flush(tlb, addr);
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tlb_remove_page(tlb, virt_to_page(pmdp));
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}
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#endif
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#define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr)
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#define pmd_free_tlb(tlb, pmdp, addr) __pmd_free_tlb(tlb, pmdp, addr)
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#define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp)
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#define tlb_migrate_finish(mm) do { } while (0)
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#endif
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122
arch/arm64/include/asm/tlbflush.h
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122
arch/arm64/include/asm/tlbflush.h
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@ -0,0 +1,122 @@
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/*
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* Based on arch/arm/include/asm/tlbflush.h
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*
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* Copyright (C) 1999-2003 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_TLBFLUSH_H
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#define __ASM_TLBFLUSH_H
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#ifndef __ASSEMBLY__
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#include <linux/sched.h>
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#include <asm/cputype.h>
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extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *);
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extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long);
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extern struct cpu_tlb_fns cpu_tlb;
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/*
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* TLB Management
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* ==============
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*
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* The arch/arm64/mm/tlb.S files implement these methods.
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*
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* The TLB specific code is expected to perform whatever tests it needs
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* to determine if it should invalidate the TLB for each call. Start
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* addresses are inclusive and end addresses are exclusive; it is safe to
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* round these addresses down.
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*
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* flush_tlb_all()
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*
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* Invalidate the entire TLB.
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*
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* flush_tlb_mm(mm)
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*
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* Invalidate all TLB entries in a particular address space.
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* - mm - mm_struct describing address space
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*
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* flush_tlb_range(mm,start,end)
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*
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* Invalidate a range of TLB entries in the specified address
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* space.
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* - mm - mm_struct describing address space
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* - start - start address (may not be aligned)
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* - end - end address (exclusive, may not be aligned)
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*
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* flush_tlb_page(vaddr,vma)
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*
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* Invalidate the specified page in the specified address range.
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* - vaddr - virtual address (may not be aligned)
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* - vma - vma_struct describing address range
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*
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* flush_kern_tlb_page(kaddr)
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*
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* Invalidate the TLB entry for the specified page. The address
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* will be in the kernels virtual memory space. Current uses
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* only require the D-TLB to be invalidated.
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* - kaddr - Kernel virtual memory address
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*/
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static inline void flush_tlb_all(void)
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{
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dsb();
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asm("tlbi vmalle1is");
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dsb();
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isb();
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}
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static inline void flush_tlb_mm(struct mm_struct *mm)
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{
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unsigned long asid = (unsigned long)ASID(mm) << 48;
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dsb();
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asm("tlbi aside1is, %0" : : "r" (asid));
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dsb();
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}
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static inline void flush_tlb_page(struct vm_area_struct *vma,
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unsigned long uaddr)
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{
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unsigned long addr = uaddr >> 12 |
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((unsigned long)ASID(vma->vm_mm) << 48);
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dsb();
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asm("tlbi vae1is, %0" : : "r" (addr));
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dsb();
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}
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/*
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* Convert calls to our calling convention.
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*/
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#define flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma)
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#define flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e)
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/*
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* On AArch64, the cache coherency is handled via the set_pte_at() function.
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*/
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static inline void update_mmu_cache(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep)
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{
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/*
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* set_pte() does not have a DSB, so make sure that the page table
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* write is visible.
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*/
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dsb();
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}
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#endif
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#endif
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71
arch/arm64/mm/tlb.S
Normal file
71
arch/arm64/mm/tlb.S
Normal file
@ -0,0 +1,71 @@
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/*
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* Based on arch/arm/mm/tlb.S
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*
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* Copyright (C) 1997-2002 Russell King
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* Copyright (C) 2012 ARM Ltd.
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* Written by Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
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|
*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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#include <asm/page.h>
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#include <asm/tlbflush.h>
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#include "proc-macros.S"
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/*
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* __cpu_flush_user_tlb_range(start, end, vma)
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*
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* Invalidate a range of TLB entries in the specified address space.
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*
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* - start - start address (may not be aligned)
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* - end - end address (exclusive, may not be aligned)
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* - vma - vma_struct describing address range
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*/
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ENTRY(__cpu_flush_user_tlb_range)
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vma_vm_mm x3, x2 // get vma->vm_mm
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mmid x3, x3 // get vm_mm->context.id
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dsb sy
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lsr x0, x0, #12 // align address
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lsr x1, x1, #12
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bfi x0, x3, #48, #16 // start VA and ASID
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bfi x1, x3, #48, #16 // end VA and ASID
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1: tlbi vae1is, x0 // TLB invalidate by address and ASID
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add x0, x0, #1
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cmp x0, x1
|
||||||
|
b.lo 1b
|
||||||
|
dsb sy
|
||||||
|
ret
|
||||||
|
ENDPROC(__cpu_flush_user_tlb_range)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* __cpu_flush_kern_tlb_range(start,end)
|
||||||
|
*
|
||||||
|
* Invalidate a range of kernel TLB entries.
|
||||||
|
*
|
||||||
|
* - start - start address (may not be aligned)
|
||||||
|
* - end - end address (exclusive, may not be aligned)
|
||||||
|
*/
|
||||||
|
ENTRY(__cpu_flush_kern_tlb_range)
|
||||||
|
dsb sy
|
||||||
|
lsr x0, x0, #12 // align address
|
||||||
|
lsr x1, x1, #12
|
||||||
|
1: tlbi vaae1is, x0 // TLB invalidate by address
|
||||||
|
add x0, x0, #1
|
||||||
|
cmp x0, x1
|
||||||
|
b.lo 1b
|
||||||
|
dsb sy
|
||||||
|
isb
|
||||||
|
ret
|
||||||
|
ENDPROC(__cpu_flush_kern_tlb_range)
|
||||||
Loading…
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Reference in New Issue
Block a user