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gpio: sifive: Make the irqchip immutable

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Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the sifive driver:

    gpio gpiochip1: (38001000.gpio-controller): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the sifive driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
This commit is contained in:
Geert Uytterhoeven 2022-05-20 12:24:16 +02:00 committed by Bartosz Golaszewski
parent 718b972d32
commit 5a7cb9f397
1 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpio/gpio-sifive.c
View File

@ -75,10 +75,12 @@ static void sifive_gpio_irq_enable(struct irq_data *d)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct sifive_gpio *chip = gpiochip_get_data(gc); struct sifive_gpio *chip = gpiochip_get_data(gc);
int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX; irq_hw_number_t hwirq = irqd_to_hwirq(d);
int offset = hwirq % SIFIVE_GPIO_MAX;
u32 bit = BIT(offset); u32 bit = BIT(offset);
unsigned long flags; unsigned long flags;
gpiochip_enable_irq(gc, hwirq);
irq_chip_enable_parent(d); irq_chip_enable_parent(d);
/* Switch to input */ /* Switch to input */
@ -101,11 +103,13 @@ static void sifive_gpio_irq_disable(struct irq_data *d)
{ {
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct sifive_gpio *chip = gpiochip_get_data(gc); struct sifive_gpio *chip = gpiochip_get_data(gc);
int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX; irq_hw_number_t hwirq = irqd_to_hwirq(d);
int offset = hwirq % SIFIVE_GPIO_MAX;
assign_bit(offset, &chip->irq_state, 0); assign_bit(offset, &chip->irq_state, 0);
sifive_gpio_set_ie(chip, offset); sifive_gpio_set_ie(chip, offset);
irq_chip_disable_parent(d); irq_chip_disable_parent(d);
gpiochip_disable_irq(gc, hwirq);
} }
static void sifive_gpio_irq_eoi(struct irq_data *d) static void sifive_gpio_irq_eoi(struct irq_data *d)
@ -137,7 +141,7 @@ static int sifive_gpio_irq_set_affinity(struct irq_data *data,
return -EINVAL; return -EINVAL;
} }
static struct irq_chip sifive_gpio_irqchip = { static const struct irq_chip sifive_gpio_irqchip = {
.name = "sifive-gpio", .name = "sifive-gpio",
.irq_set_type = sifive_gpio_irq_set_type, .irq_set_type = sifive_gpio_irq_set_type,
.irq_mask = irq_chip_mask_parent, .irq_mask = irq_chip_mask_parent,
@ -146,6 +150,8 @@ static struct irq_chip sifive_gpio_irqchip = {
.irq_disable = sifive_gpio_irq_disable, .irq_disable = sifive_gpio_irq_disable,
.irq_eoi = sifive_gpio_irq_eoi, .irq_eoi = sifive_gpio_irq_eoi,
.irq_set_affinity = sifive_gpio_irq_set_affinity, .irq_set_affinity = sifive_gpio_irq_set_affinity,
.flags = IRQCHIP_IMMUTABLE,
GPIOCHIP_IRQ_RESOURCE_HELPERS,
}; };
static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc, static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
@ -242,7 +248,7 @@ static int sifive_gpio_probe(struct platform_device *pdev)
chip->gc.parent = dev; chip->gc.parent = dev;
chip->gc.owner = THIS_MODULE; chip->gc.owner = THIS_MODULE;
girq = &chip->gc.irq; girq = &chip->gc.irq;
girq->chip = &sifive_gpio_irqchip; gpio_irq_chip_set_chip(girq, &sifive_gpio_irqchip);
girq->fwnode = of_node_to_fwnode(node); girq->fwnode = of_node_to_fwnode(node);
girq->parent_domain = parent; girq->parent_domain = parent;
girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq; girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq;