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remoteproc updates for v5.20

Browse Source 
This introduces support for the remoteproc on Mediatek MT8188, and
 enables caches for MT8186 SCP. It adds support for PRU cores found on
 the TI K3 AM62x SoCs.
 
 It moves the recovery work after a firmware crash to an unbound
 workqueue, to allow recovery to happen in parallel.
 
 A new DMA API is introduced to release dma_mem for a device.
 
 It adds support a panic handler for the Qualcomm modem remoteproc, with
 the goal of having caches flushed in memory dumps for post-mortem
 debugging and it introduces a mechanism to wait for the modem firmware
 on SM8450 to decrypt part of its memory for post-mortem debugging.
 
 Qualcomm sysmon is restricted to only inform remote processors about
 peers that are actually running, to avoid a race where Linux tries to
 notify a recovering remote processor about its peers new state. A
 mechanism for waiting for the sysmon connection to be established is also
 introduced, to avoid out-of-sync updates for rapidly restarting remote
 processors.
 
 A number of Devicetree binding cleanups and conversions to YAML are
 introduced, to facilitate Devicetree validation. Lastly it introduces a
 number of smaller fixes and cleanups in the core and a few different
 drivers.
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Merge tag 'rproc-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:
 "This introduces support for the remoteproc on Mediatek MT8188, and
  enables caches for MT8186 SCP. It adds support for PRU cores found on
  the TI K3 AM62x SoCs.

  It moves the recovery work after a firmware crash to an unbound
  workqueue, to allow recovery to happen in parallel.

  A new DMA API is introduced to release dma_mem for a device.

  It adds support a panic handler for the Qualcomm modem remoteproc,
  with the goal of having caches flushed in memory dumps for post-mortem
  debugging and it introduces a mechanism to wait for the modem firmware
  on SM8450 to decrypt part of its memory for post-mortem debugging.

  Qualcomm sysmon is restricted to only inform remote processors about
  peers that are actually running, to avoid a race where Linux tries to
  notify a recovering remote processor about its peers new state. A
  mechanism for waiting for the sysmon connection to be established is
  also introduced, to avoid out-of-sync updates for rapidly restarting
  remote processors.

  A number of Devicetree binding cleanups and conversions to YAML are
  introduced, to facilitate Devicetree validation. Lastly it introduces
  a number of smaller fixes and cleanups in the core and a few different
  drivers"

* tag 'rproc-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (42 commits)
  remoteproc: qcom_q6v5_pas: Do not fail if regulators are not found
  drivers/remoteproc: fix repeated words in comments
  remoteproc: Directly use ida_alloc()/free()
  remoteproc: Use unbounded workqueue for recovery work
  remoteproc: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
  remoteproc: qcom_q6v5_pas: Deal silently with optional px and cx regulators
  remoteproc: sysmon: Send sysmon state only for running rprocs
  remoteproc: sysmon: Wait for SSCTL service to come up
  remoteproc: qcom: q6v5: Set q6 state to offline on receiving wdog irq
  remoteproc: qcom: pas: Check if coredump is enabled
  remoteproc: qcom: pas: Mark devices as wakeup capable
  remoteproc: qcom: pas: Mark va as io memory
  remoteproc: qcom: pas: Add decrypt shutdown support for modem
  remoteproc: qcom: q6v5-mss: add powerdomains to MSM8996 config
  remoteproc: qcom_q6v5: Introduce panic handler for MSS
  remoteproc: qcom_q6v5_mss: Update MBA log info
  remoteproc: qcom: correct kerneldoc
  remoteproc: qcom_q6v5_mss: map/unmap metadata region before/after use
  remoteproc: qcom: using pm_runtime_resume_and_get to simplify the code
  remoteproc: mediatek: Support MT8188 SCP
  ...
This commit is contained in:
Linus Torvalds 2022-08-08 15:16:29 -07:00
commit 5d5d353bed
28 changed files with 959 additions and 228 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
View File

@ -18,6 +18,7 @@ properties:
enum:
- mediatek,mt8183-scp
- mediatek,mt8186-scp
- mediatek,mt8188-scp
- mediatek,mt8192-scp
- mediatek,mt8195-scp
@ -80,6 +81,7 @@ allOf:
enum:
- mediatek,mt8183-scp
- mediatek,mt8186-scp
- mediatek,mt8188-scp
then:
properties:
reg:

74
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
View File

@ -67,13 +67,28 @@ properties:
minItems: 1
maxItems: 8
interconnects:
maxItems: 1
interrupts:
minItems: 5
maxItems: 6
items:
- description: Watchdog interrupt
- description: Fatal interrupt
- description: Ready interrupt
- description: Handover interrupt
- description: Stop acknowledge interrupt
- description: Shutdown acknowledge interrupt
interrupt-names:
minItems: 5
maxItems: 6
items:
- const: wdog
- const: fatal
- const: ready
- const: handover
- const: stop-ack
- const: shutdown-ack
resets:
minItems: 1
@ -116,7 +131,6 @@ properties:
- description: Stop the modem
qcom,smem-state-names:
$ref: /schemas/types.yaml#/definitions/string-array
description: The names of the state bits used for SMP2P output
items:
- const: stop
@ -134,13 +148,13 @@ properties:
three offsets within syscon for q6, modem and nc halt registers.
smd-edge:
type: object
$ref: /schemas/remoteproc/qcom,smd-edge.yaml#
description:
Qualcomm Shared Memory subnode which represents communication edge,
channels and devices related to the ADSP.
glink-edge:
type: object
$ref: /schemas/remoteproc/qcom,glink-edge.yaml#
description:
Qualcomm G-Link subnode which represents communication edge, channels
and devices related to the ADSP.
@ -315,19 +329,9 @@ allOf:
then:
properties:
interrupts:
items:
- description: Watchdog interrupt
- description: Fatal interrupt
- description: Ready interrupt
- description: Handover interrupt
- description: Stop acknowledge interrupt
maxItems: 5
interrupt-names:
items:
- const: wdog
- const: fatal
- const: ready
- const: handover
- const: stop-ack
maxItems: 5
- if:
properties:
@ -345,21 +349,9 @@ allOf:
then:
properties:
interrupts:
items:
- description: Watchdog interrupt
- description: Fatal interrupt
- description: Ready interrupt
- description: Handover interrupt
- description: Stop acknowledge interrupt
- description: Shutdown acknowledge interrupt
minItems: 6
interrupt-names:
items:
- const: wdog
- const: fatal
- const: ready
- const: handover
- const: stop-ack
- const: shutdown-ack
minItems: 6
- if:
properties:
@ -379,6 +371,8 @@ allOf:
- qcom,msm8226-adsp-pil
- qcom,msm8996-adsp-pil
- qcom,msm8998-adsp-pas
- qcom,sm8150-adsp-pas
- qcom,sm8150-cdsp-pas
then:
properties:
power-domains:
@ -442,19 +436,6 @@ allOf:
- const: cx
- const: mx
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8150-adsp-pas
- qcom,sm8150-cdsp-pas
then:
properties:
power-domains:
items:
- description: CX power domain
- if:
properties:
compatible:
@ -594,11 +575,12 @@ allOf:
examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
adsp {
compatible = "qcom,msm8974-adsp-pil";
interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>,
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
@ -620,7 +602,7 @@ examples:
qcom,smem-state-names = "stop";
smd-edge {
interrupts = <0 156 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 8>;
qcom,smd-edge = <1>;

72
Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml Normal file
View File

@ -0,0 +1,72 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,glink-edge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm G-Link Edge communication channel nodes
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description:
Qualcomm G-Link subnode represents communication edge, channels and devices
related to the remote processor.
properties:
$nodename:
const: "glink-edge"
apr:
$ref: /schemas/soc/qcom/qcom,apr.yaml#
description:
Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
fastrpc:
type: object
description:
See Documentation/devicetree/bindings/misc/qcom,fastrpc.txt
interrupts:
maxItems: 1
label:
description: The names of the state bits used for SMP2P output
mboxes:
maxItems: 1
qcom,remote-pid:
$ref: /schemas/types.yaml#/definitions/uint32
description:
ID of the shared memory used by GLINK for communication with remote
processor.
required:
- interrupts
- label
- mboxes
- qcom,remote-pid
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
remoteproc@8a00000 {
reg = <0x08a00000 0x10000>;
// ...
glink-edge {
interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc IPCC_CLIENT_WPSS
IPCC_MPROC_SIGNAL_GLINK_QMP>;
label = "wpss";
qcom,remote-pid = <13>;
};
};

88
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
View File

@ -14,8 +14,6 @@ on the Qualcomm Hexagon core.
"qcom,msm8974-mss-pil"
"qcom,msm8996-mss-pil"
"qcom,msm8998-mss-pil"
"qcom,sc7180-mss-pil"
"qcom,sc7280-mss-pil"
"qcom,sdm845-mss-pil"
- reg:
@ -47,8 +45,6 @@ on the Qualcomm Hexagon core.
must be "wdog", "fatal", "ready", "handover", "stop-ack"
qcom,msm8996-mss-pil:
qcom,msm8998-mss-pil:
qcom,sc7180-mss-pil:
qcom,sc7280-mss-pil:
qcom,sdm845-mss-pil:
must be "wdog", "fatal", "ready", "handover", "stop-ack",
"shutdown-ack"
@ -86,11 +82,6 @@ on the Qualcomm Hexagon core.
qcom,msm8998-mss-pil:
must be "iface", "bus", "mem", "xo", "gpll0_mss",
"snoc_axi", "mnoc_axi", "qdss"
qcom,sc7180-mss-pil:
must be "iface", "bus", "xo", "snoc_axi", "mnoc_axi",
"nav"
qcom,sc7280-mss-pil:
must be "iface", "xo", "snoc_axi", "offline", "pka"
qcom,sdm845-mss-pil:
must be "iface", "bus", "mem", "xo", "gpll0_mss",
"snoc_axi", "mnoc_axi", "prng"
@ -102,7 +93,7 @@ on the Qualcomm Hexagon core.
reference to the list of 3 reset-controllers for the
wcss sub-system
reference to the list of 2 reset-controllers for the modem
sub-system on SC7180, SC7280, SDM845 SoCs
sub-system on SDM845 SoCs
- reset-names:
Usage: required
@ -111,7 +102,7 @@ on the Qualcomm Hexagon core.
must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"
for the wcss sub-system
must be "mss_restart", "pdc_reset" for the modem
sub-system on SC7180, SC7280, SDM845 SoCs
sub-system on SDM845 SoCs
For devices where the mba and mpss sub-nodes are not specified, mba/mpss region
should be referenced as follows:
@ -176,10 +167,6 @@ For the compatible string below the following supplies are required:
qcom,msm8996-mss-pil:
qcom,msm8998-mss-pil:
must be "cx", "mx"
qcom,sc7180-mss-pil:
must be "cx", "mx", "mss"
qcom,sc7280-mss-pil:
must be "cx", "mss"
qcom,sdm845-mss-pil:
must be "cx", "mx", "mss"
@ -205,36 +192,6 @@ For the compatible string below the following supplies are required:
Definition: a phandle reference to a syscon representing TCSR followed
by the three offsets within syscon for q6, modem and nc
halt registers.
a phandle reference to a syscon representing TCSR followed
by the four offsets within syscon for q6, modem, nc and vq6
halt registers on SC7280 SoCs.
For the compatible strings below the following phandle references are required:
"qcom,sc7180-mss-pil"
- qcom,spare-regs:
Usage: required
Value type: <prop-encoded-array>
Definition: a phandle reference to a syscon representing TCSR followed
by the offset within syscon for conn_box_spare0 register
used by the modem sub-system running on SC7180 SoC.
For the compatible strings below the following phandle references are required:
"qcom,sc7280-mss-pil"
- qcom,ext-regs:
Usage: required
Value type: <prop-encoded-array>
Definition: two phandle references to syscons representing TCSR_REG and
TCSR register space followed by the two offsets within the syscon
to force_clk_en/rscc_disable and axim1_clk_off/crypto_clk_off
registers respectively.
- qcom,qaccept-regs:
Usage: required
Value type: <prop-encoded-array>
Definition: a phandle reference to a syscon representing TCSR followed
by the three offsets within syscon for mdm, cx and axi
qaccept registers used by the modem sub-system running on
SC7280 SoC.
The Hexagon node must contain iommus property as described in ../iommu/iommu.txt
on platforms which do not have TrustZone.
@ -257,29 +214,23 @@ related to the Hexagon. See ../soc/qcom/qcom,smd.yaml and
The following example describes the resources needed to boot control the
Hexagon, as it is found on MSM8974 boards.
modem-rproc@fc880000 {
compatible = "qcom,q6v5-pil";
reg = <0xfc880000 0x100>,
<0xfc820000 0x020>;
remoteproc@fc880000 {
compatible = "qcom,msm8974-mss-pil";
reg = <0xfc880000 0x100>, <0xfc820000 0x020>;
reg-names = "qdsp6", "rmb";
interrupts-extended = <&intc 0 24 1>,
<&modem_smp2p_in 0 0>,
<&modem_smp2p_in 1 0>,
<&modem_smp2p_in 2 0>,
<&modem_smp2p_in 3 0>;
interrupt-names = "wdog",
"fatal",
"ready",
"handover",
"stop-ack";
interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
<&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_BOOT_ROM_AHB_CLK>;
clock-names = "iface", "bus", "mem";
qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
<&gcc GCC_BOOT_ROM_AHB_CLK>,
<&xo_board>;
clock-names = "iface", "bus", "mem", "xo";
resets = <&gcc GCC_MSS_RESTART>;
reset-names = "mss_restart";
@ -289,6 +240,8 @@ Hexagon, as it is found on MSM8974 boards.
mx-supply = <&pm8841_s1>;
pll-supply = <&pm8941_l12>;
qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
@ -299,4 +252,13 @@ Hexagon, as it is found on MSM8974 boards.
mpss {
memory-region = <&mpss_region>;
};
smd-edge {
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 12>;
qcom,smd-edge = <0>;
label = "modem";
};
};

1
Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
View File

@ -90,7 +90,6 @@ properties:
- description: Stop the modem
qcom,smem-state-names:
$ref: /schemas/types.yaml#/definitions/string
description: The names of the state bits used for SMP2P output
items:
- const: stop

245
Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml Normal file
View File

@ -0,0 +1,245 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SC7180 MSS Peripheral Image Loader
maintainers:
- Sibi Sankar <quic_sibis@quicinc.com>
description:
This document describes the hardware for a component that loads and boots firmware
on the Qualcomm Technology Inc. SC7180 Modem Hexagon Core.
properties:
compatible:
enum:
- qcom,sc7180-mss-pil
reg:
items:
- description: MSS QDSP6 registers
- description: RMB registers
reg-names:
items:
- const: qdsp6
- const: rmb
iommus:
items:
- description: MSA Stream 1
- description: MSA Stream 2
interrupts:
items:
- description: Watchdog interrupt
- description: Fatal interrupt
- description: Ready interrupt
- description: Handover interrupt
- description: Stop acknowledge interrupt
- description: Shutdown acknowledge interrupt
interrupt-names:
items:
- const: wdog
- const: fatal
- const: ready
- const: handover
- const: stop-ack
- const: shutdown-ack
clocks:
items:
- description: GCC MSS IFACE clock
- description: GCC MSS BUS clock
- description: GCC MSS NAV clock
- description: GCC MSS SNOC_AXI clock
- description: GCC MSS MFAB_AXIS clock
- description: RPMH XO clock
clock-names:
items:
- const: iface
- const: bus
- const: nav
- const: snoc_axi
- const: mnoc_axi
- const: xo
power-domains:
items:
- description: CX power domain
- description: MX power domain
- description: MSS power domain
power-domain-names:
items:
- const: cx
- const: mx
- const: mss
resets:
items:
- description: AOSS restart
- description: PDC reset
reset-names:
items:
- const: mss_restart
- const: pdc_reset
memory-region:
items:
- description: MBA reserved region
- description: modem reserved region
firmware-name:
$ref: /schemas/types.yaml#/definitions/string-array
items:
- description: Name of MBA firmware
- description: Name of modem firmware
qcom,halt-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Halt registers are used to halt transactions of various sub-components
within MSS.
items:
- items:
- description: phandle to TCSR_MUTEX registers
- description: offset to the Q6 halt register
- description: offset to the modem halt register
- description: offset to the nc halt register
qcom,spare-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Spare registers are multipurpose registers used for errata
handling.
items:
- items:
- description: phandle to TCSR_MUTEX registers
- description: offset to the conn_box_spare0 register
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
description: Reference to the AOSS side-channel message RAM.
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: States used by the AP to signal the Hexagon core
items:
- description: Stop the modem
qcom,smem-state-names:
description: The names of the state bits used for SMP2P output
const: stop
glink-edge:
$ref: qcom,glink-edge.yaml#
description:
Qualcomm G-Link subnode which represents communication edge, channels
and devices related to the DSP.
properties:
interrupts:
items:
- description: IRQ from MSS to GLINK
mboxes:
items:
- description: Mailbox for communication between APPS and MSS
label:
const: modem
apr: false
fastrpc: false
required:
- compatible
- reg
- reg-names
- iommus
- interrupts
- interrupt-names
- clocks
- clock-names
- power-domains
- power-domain-names
- resets
- reset-names
- qcom,halt-regs
- qcom,spare-regs
- memory-region
- qcom,qmp
- qcom,smem-states
- qcom,smem-state-names
- glink-edge
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sc7180-mss-pil";
reg = <0x04080000 0x10000>, <0x04180000 0x48>;
reg-names = "qdsp6", "rmb";
iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
<&gcc GCC_MSS_NAV_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&gcc GCC_MSS_MFAB_AXIS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bus", "nav", "snoc_axi",
"mnoc_axi", "xo";
power-domains = <&rpmhpd SC7180_CX>,
<&rpmhpd SC7180_MX>,
<&rpmhpd SC7180_MSS>;
power-domain-names = "cx", "mx", "mss";
memory-region = <&mba_mem>, <&mpss_mem>;
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
qcom,spare-regs = <&tcsr_regs 0xb3e4>;
glink-edge {
interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 12>;
qcom,remote-pid = <1>;
label = "modem";
};
};

266
Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml Normal file
View File

@ -0,0 +1,266 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SC7280 MSS Peripheral Image Loader
maintainers:
- Sibi Sankar <quic_sibis@quicinc.com>
description:
This document describes the hardware for a component that loads and boots firmware
on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
properties:
compatible:
enum:
- qcom,sc7280-mss-pil
reg:
items:
- description: MSS QDSP6 registers
- description: RMB registers
reg-names:
items:
- const: qdsp6
- const: rmb
iommus:
items:
- description: MSA Stream 1
- description: MSA Stream 2
interconnects:
items:
- description: Path leading to system memory
interrupts:
items:
- description: Watchdog interrupt
- description: Fatal interrupt
- description: Ready interrupt
- description: Handover interrupt
- description: Stop acknowledge interrupt
- description: Shutdown acknowledge interrupt
interrupt-names:
items:
- const: wdog
- const: fatal
- const: ready
- const: handover
- const: stop-ack
- const: shutdown-ack
clocks:
items:
- description: GCC MSS IFACE clock
- description: GCC MSS OFFLINE clock
- description: GCC MSS SNOC_AXI clock
- description: RPMH PKA clock
- description: RPMH XO clock
clock-names:
items:
- const: iface
- const: offline
- const: snoc_axi
- const: pka
- const: xo
power-domains:
items:
- description: CX power domain
- description: MSS power domain
power-domain-names:
items:
- const: cx
- const: mss
resets:
items:
- description: AOSS restart
- description: PDC reset
reset-names:
items:
- const: mss_restart
- const: pdc_reset
memory-region:
items:
- description: MBA reserved region
- description: modem reserved region
firmware-name:
$ref: /schemas/types.yaml#/definitions/string-array
items:
- description: Name of MBA firmware
- description: Name of modem firmware
qcom,halt-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Halt registers are used to halt transactions of various sub-components
within MSS.
items:
- items:
- description: phandle to TCSR_MUTEX registers
- description: offset to the Q6 halt register
- description: offset to the modem halt register
- description: offset to the nc halt register
- description: offset to the vq6 halt register
qcom,ext-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: EXT registers are used for various power related functionality
items:
- items:
- description: phandle to TCSR_REG registers
- description: offset to the force_clk_en register
- description: offset to the rscc_disable register
- items:
- description: phandle to TCSR_MUTEX registers
- description: offset to the axim1_clk_off register
- description: offset to the crypto_clk_off register
qcom,qaccept-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: QACCEPT registers are used to bring up/down Q-channels
items:
- items:
- description: phandle to TCSR_MUTEX registers
- description: offset to the mdm qaccept register
- description: offset to the cx qaccept register
- description: offset to the axi qaccept register
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
description: Reference to the AOSS side-channel message RAM.
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: States used by the AP to signal the Hexagon core
items:
- description: Stop the modem
qcom,smem-state-names:
description: The names of the state bits used for SMP2P output
const: stop
glink-edge:
$ref: qcom,glink-edge.yaml#
description:
Qualcomm G-Link subnode which represents communication edge, channels
and devices related to the DSP.
properties:
interrupts:
items:
- description: IRQ from MSS to GLINK
mboxes:
items:
- description: Mailbox for communication between APPS and MSS
label:
const: modem
apr: false
fastrpc: false
required:
- compatible
- reg
- reg-names
- iommus
- interconnects
- interrupts
- interrupt-names
- clocks
- clock-names
- power-domains
- power-domain-names
- resets
- reset-names
- qcom,halt-regs
- qcom,ext-regs
- qcom,qaccept-regs
- memory-region
- qcom,qmp
- qcom,smem-states
- qcom,smem-state-names
- glink-edge
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/interconnect/qcom,sc7280.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sc7280-mss-pil";
reg = <0x04080000 0x10000>, <0x04180000 0x48>;
reg-names = "qdsp6", "rmb";
iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_OFFLINE_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&rpmhcc RPMH_PKA_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
power-domains = <&rpmhpd SC7280_CX>,
<&rpmhpd SC7280_MSS>;
power-domain-names = "cx", "mss";
memory-region = <&mba_mem>, <&mpss_mem>;
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
glink-edge {
interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc IPCC_CLIENT_MPSS
IPCC_MPROC_SIGNAL_GLINK_QMP>;
label = "modem";
qcom,remote-pid = <1>;
};
};

21
Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
View File

@ -76,7 +76,7 @@ properties:
- const: pdc_sync
memory-region:
$ref: /schemas/types.yaml#/definitions/phandle
maxItems: 1
description: Reference to the reserved-memory for the Hexagon core
firmware-name:
@ -102,13 +102,12 @@ properties:
- description: Stop the modem
qcom,smem-state-names:
$ref: /schemas/types.yaml#/definitions/string
description: The names of the state bits used for SMP2P output
const: stop
glink-edge:
type: object
description: |
$ref: qcom,glink-edge.yaml#
description:
Qualcomm G-Link subnode which represents communication edge, channels
and devices related to the ADSP.
@ -122,21 +121,11 @@ properties:
- description: Mailbox for communication between APPS and WPSS
label:
description: The names of the state bits used for SMP2P output
items:
- const: wpss
qcom,remote-pid:
$ref: /schemas/types.yaml#/definitions/uint32
description: ID of the shared memory used by GLINK for communication with WPSS
required:
- interrupts
- mboxes
- label
- qcom,remote-pid
additionalProperties: false
apr: false
fastrpc: false
required:
- compatible

1
Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
View File

@ -90,7 +90,6 @@ properties:
- description: Stop the modem
qcom,smem-state-names:
$ref: /schemas/types.yaml#/definitions/string
description: The names of the state bits used for SMP2P output
items:
- const: stop

85
Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml Normal file
View File

@ -0,0 +1,85 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,smd-edge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SMD Edge communication channel nodes
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description:
Qualcomm SMD subnode represents a remote subsystem or a remote processor of
some sort - or in SMD language an "edge". The name of the edges are not
important.
See also Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml
properties:
$nodename:
const: "smd-edge"
interrupts:
maxItems: 1
label:
description:
Name of the edge, used for debugging and identification purposes. The
node name will be used if this is not present.
mboxes:
maxItems: 1
description:
Reference to the mailbox representing the outgoing doorbell in APCS for
this client.
qcom,ipc:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to a syscon node representing the APCS registers
- description: u32 representing offset to the register within the syscon
- description: u32 representing the ipc bit within the register
description:
Three entries specifying the outgoing ipc bit used for signaling the
remote processor.
qcom,smd-edge:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The identifier of the remote processor in the smd channel allocation
table.
qcom,remote-pid:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The identifier for the remote processor as known by the rest of the
system.
required:
- interrupts
- qcom,smd-edge
oneOf:
- required:
- mboxes
- required:
- qcom,ipc
additionalProperties: true
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
remoteproc {
// ...
smd-edge {
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 8>;
qcom,smd-edge = <1>;
};
};

5
Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml
View File

@ -36,17 +36,18 @@ properties:
enum:
- ti,am3356-pru # for AM335x SoC family (AM3356+ SoCs only)
- ti,am4376-pru # for AM437x SoC family (AM4376+ SoCs only)
- ti,am5728-pru # for AM57xx SoC family
- ti,am625-pru # for PRUs in K3 AM62x SoC family
- ti,am642-pru # for PRUs in K3 AM64x SoC family
- ti,am642-rtu # for RTUs in K3 AM64x SoC family
- ti,am642-tx-pru # for Tx_PRUs in K3 AM64x SoC family
- ti,am5728-pru # for AM57xx SoC family
- ti,k2g-pru # for 66AK2G SoC family
- ti,am654-pru # for PRUs in K3 AM65x SoC family
- ti,am654-rtu # for RTUs in K3 AM65x SoC family
- ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs
- ti,j721e-pru # for PRUs in K3 J721E SoC family
- ti,j721e-rtu # for RTUs in K3 J721E SoC family
- ti,j721e-tx-pru # for Tx_PRUs in K3 J721E SoC family
- ti,k2g-pru # for 66AK2G SoC family
reg:
items:

50
Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml
View File

@ -28,44 +28,6 @@ patternProperties:
edges are not important.
properties:
interrupts:
maxItems: 1
label:
$ref: /schemas/types.yaml#/definitions/string
description:
Name of the edge, used for debugging and identification purposes. The
node name will be used if this is not present.
mboxes:
maxItems: 1
description:
Reference to the mailbox representing the outgoing doorbell in APCS for
this client.
qcom,ipc:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to a syscon node representing the APCS registers
- description: u32 representing offset to the register within the syscon
- description: u32 representing the ipc bit within the register
description:
Three entries specifying the outgoing ipc bit used for signaling the
remote processor.
qcom,smd-edge:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The identifier of the remote processor in the smd channel allocation
table.
qcom,remote-pid:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The identifier for the remote processor as known by the rest of the
system.
rpm-requests:
type: object
description:
@ -89,17 +51,7 @@ patternProperties:
additionalProperties: true
required:
- interrupts
- qcom,smd-edge
oneOf:
- required:
- mboxes
- required:
- qcom,ipc
additionalProperties: false
unevaluatedProperties: false
required:
- compatible

7
drivers/remoteproc/imx_rproc.c
View File

@ -594,16 +594,17 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
node = of_parse_phandle(np, "memory-region", a);
/* Not map vdevbuffer, vdevring region */
if (!strncmp(node->name, "vdev", strlen("vdev")))
if (!strncmp(node->name, "vdev", strlen("vdev"))) {
of_node_put(node);
continue;
}
err = of_address_to_resource(node, 0, &res);
of_node_put(node);
if (err) {
dev_err(dev, "unable to resolve memory region\n");
return err;
}
of_node_put(node);
if (b >= IMX_RPROC_MEM_MAX)
break;

3
drivers/remoteproc/keystone_remoteproc.c
View File

@ -410,10 +410,9 @@ static int keystone_rproc_probe(struct platform_device *pdev)
/* enable clock for accessing DSP internal memories */
pm_runtime_enable(dev);
ret = pm_runtime_get_sync(dev);
ret = pm_runtime_resume_and_get(dev);
if (ret < 0) {
dev_err(dev, "failed to enable clock, status = %d\n", ret);
pm_runtime_put_noidle(dev);
goto disable_rpm;
}

23
drivers/remoteproc/mtk_scp.c
View File

@ -401,6 +401,14 @@ static int mt8186_scp_before_load(struct mtk_scp *scp)
writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
/*
* Set I-cache and D-cache size before loading SCP FW.
* SCP SRAM logical address may change when cache size setting differs.
*/
writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
scp->reg_base + MT8183_SCP_CACHE_CON);
writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
return 0;
}
@ -943,7 +951,19 @@ static const struct mtk_scp_of_data mt8186_of_data = {
.scp_da_to_va = mt8183_scp_da_to_va,
.host_to_scp_reg = MT8183_HOST_TO_SCP,
.host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
.ipi_buf_offset = 0x7bdb0,
.ipi_buf_offset = 0x3bdb0,
};
static const struct mtk_scp_of_data mt8188_of_data = {
.scp_clk_get = mt8195_scp_clk_get,
.scp_before_load = mt8192_scp_before_load,
.scp_irq_handler = mt8192_scp_irq_handler,
.scp_reset_assert = mt8192_scp_reset_assert,
.scp_reset_deassert = mt8192_scp_reset_deassert,
.scp_stop = mt8192_scp_stop,
.scp_da_to_va = mt8192_scp_da_to_va,
.host_to_scp_reg = MT8192_GIPC_IN_SET,
.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
};
static const struct mtk_scp_of_data mt8192_of_data = {
@ -973,6 +993,7 @@ static const struct mtk_scp_of_data mt8195_of_data = {
static const struct of_device_id mtk_scp_of_match[] = {
{ .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
{ .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
{ .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
{ .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
{ .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
{},

6
drivers/remoteproc/omap_remoteproc.c
View File

@ -243,7 +243,7 @@ static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer)
* omap_rproc_ack_timer_irq() - acknowledge a timer irq
* @timer: handle to a OMAP rproc timer
*
* This function is used to clear the irq associated with a watchdog timer. The
* This function is used to clear the irq associated with a watchdog timer.
* The function is called by the OMAP remoteproc upon a watchdog event on the
* remote processor to clear the interrupt status of the watchdog timer.
*/
@ -303,7 +303,7 @@ static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data)
* @configure: boolean flag used to acquire and configure the timer handle
*
* This function is used primarily to enable the timers associated with
* a remoteproc. The configure flag is provided to allow the driver to
* a remoteproc. The configure flag is provided to allow the driver
* to either acquire and start a timer (during device initialization) or
* to just start a timer (during a resume operation).
*
@ -443,7 +443,7 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure)
* @configure: boolean flag used to release the timer handle
*
* This function is used primarily to disable the timers associated with
* a remoteproc. The configure flag is provided to allow the driver to
* a remoteproc. The configure flag is provided to allow the driver
* to either stop and release a timer (during device shutdown) or to just
* stop a timer (during a suspend operation).
*

1
drivers/remoteproc/pru_rproc.c
View File

@ -897,6 +897,7 @@ static const struct of_device_id pru_rproc_match[] = {
{ .compatible = "ti,j721e-pru", .data = &k3_pru_data },
{ .compatible = "ti,j721e-rtu", .data = &k3_rtu_data },
{ .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data },
{ .compatible = "ti,am625-pru", .data = &k3_pru_data },
{},
};
MODULE_DEVICE_TABLE(of, pru_rproc_match);

4
drivers/remoteproc/qcom_common.c
View File

@ -50,7 +50,7 @@ struct minidump_region {
};
/**
* struct minidump_subsystem_toc: Subsystem's SMEM Table of content
* struct minidump_subsystem - Subsystem's SMEM Table of content
* @status : Subsystem toc init status
* @enabled : if set to 1, this region would be copied during coredump
* @encryption_status: Encryption status for this subsystem
@ -68,7 +68,7 @@ struct minidump_subsystem {
};
/**
* struct minidump_global_toc: Global Table of Content
* struct minidump_global_toc - Global Table of Content
* @status : Global Minidump init status
* @md_revision : Minidump revision
* @enabled : Minidump enable status

4
drivers/remoteproc/qcom_q6v5.c
View File

@ -112,6 +112,7 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
else
dev_err(q6v5->dev, "watchdog without message\n");
q6v5->running = false;
rproc_report_crash(q6v5->rproc, RPROC_WATCHDOG);
return IRQ_HANDLED;
@ -123,6 +124,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
size_t len;
char *msg;
if (!q6v5->running)
return IRQ_HANDLED;
msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, q6v5->crash_reason, &len);
if (!IS_ERR(msg) && len > 0 && msg[0])
dev_err(q6v5->dev, "fatal error received: %s\n", msg);

3
drivers/remoteproc/qcom_q6v5_adsp.c
View File

@ -175,9 +175,8 @@ static int qcom_rproc_pds_enable(struct qcom_adsp *adsp, struct device **pds,
for (i = 0; i < pd_count; i++) {
dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
ret = pm_runtime_get_sync(pds[i]);
ret = pm_runtime_resume_and_get(pds[i]);
if (ret < 0) {
pm_runtime_put_noidle(pds[i]);
dev_pm_genpd_set_performance_state(pds[i], 0);
goto unroll_pd_votes;
}

54
drivers/remoteproc/qcom_q6v5_mss.c
View File

@ -10,6 +10,7 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/devcoredump.h>
#include <linux/dma-map-ops.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
@ -932,27 +933,52 @@ static void q6v5proc_halt_axi_port(struct q6v5 *qproc,
static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw,
const char *fw_name)
{
unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS;
unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS | DMA_ATTR_NO_KERNEL_MAPPING;
unsigned long flags = VM_DMA_COHERENT | VM_FLUSH_RESET_PERMS;
struct page **pages;
struct page *page;
dma_addr_t phys;
void *metadata;
int mdata_perm;
int xferop_ret;
size_t size;
void *ptr;
void *vaddr;
int count;
int ret;
int i;
metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev);
if (IS_ERR(metadata))
return PTR_ERR(metadata);
ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs);
if (!ptr) {
page = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs);
if (!page) {
kfree(metadata);
dev_err(qproc->dev, "failed to allocate mdt buffer\n");
return -ENOMEM;
}
memcpy(ptr, metadata, size);
count = PAGE_ALIGN(size) >> PAGE_SHIFT;
pages = kmalloc_array(count, sizeof(struct page *), GFP_KERNEL);
if (!pages) {
ret = -ENOMEM;
goto free_dma_attrs;
}
for (i = 0; i < count; i++)
pages[i] = nth_page(page, i);
vaddr = vmap(pages, count, flags, pgprot_dmacoherent(PAGE_KERNEL));
kfree(pages);
if (!vaddr) {
dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", &phys, size);
ret = -EBUSY;
goto free_dma_attrs;
}
memcpy(vaddr, metadata, size);
vunmap(vaddr);
/* Hypervisor mapping to access metadata by modem */
mdata_perm = BIT(QCOM_SCM_VMID_HLOS);
@ -982,7 +1008,7 @@ static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw,
"mdt buffer not reclaimed system may become unstable\n");
free_dma_attrs:
dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs);
dma_free_attrs(qproc->dev, size, page, phys, dma_attrs);
kfree(metadata);
return ret < 0 ? ret : 0;
@ -1102,6 +1128,9 @@ static int q6v5_mba_load(struct q6v5 *qproc)
if (ret)
goto reclaim_mba;
if (qproc->has_mba_logs)
qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE);
ret = q6v5_rmb_mba_wait(qproc, 0, 5000);
if (ret == -ETIMEDOUT) {
dev_err(qproc->dev, "MBA boot timed out\n");
@ -1594,11 +1623,19 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
return ret;
}
static unsigned long q6v5_panic(struct rproc *rproc)
{
struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
return qcom_q6v5_panic(&qproc->q6v5);
}
static const struct rproc_ops q6v5_ops = {
.start = q6v5_start,
.stop = q6v5_stop,
.parse_fw = qcom_q6v5_register_dump_segments,
.load = q6v5_load,
.panic = q6v5_panic,
};
static void qcom_msa_handover(struct qcom_q6v5 *q6v5)
@ -2188,6 +2225,11 @@ static const struct rproc_hexagon_res msm8996_mss = {
"mnoc_axi",
NULL
},
.proxy_pd_names = (char*[]){
"mx",
"cx",
NULL
},
.need_mem_protection = true,
.has_alt_reset = false,
.has_mba_logs = false,

105
drivers/remoteproc/qcom_q6v5_pas.c
View File

@ -8,6 +8,7 @@
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
@ -29,6 +30,8 @@
#include "qcom_q6v5.h"
#include "remoteproc_internal.h"
#define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
struct adsp_data {
int crash_reason_smem;
const char *firmware_name;
@ -36,6 +39,7 @@ struct adsp_data {
unsigned int minidump_id;
bool has_aggre2_clk;
bool auto_boot;
bool decrypt_shutdown;
char **proxy_pd_names;
@ -65,6 +69,7 @@ struct qcom_adsp {
unsigned int minidump_id;
int crash_reason_smem;
bool has_aggre2_clk;
bool decrypt_shutdown;
const char *info_name;
struct completion start_done;
@ -87,6 +92,9 @@ static void adsp_minidump(struct rproc *rproc)
{
struct qcom_adsp *adsp = rproc->priv;
if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
return;
qcom_minidump(rproc, adsp->minidump_id);
}
@ -128,6 +136,19 @@ static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
}
}
static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
{
unsigned int retry_num = 50;
int ret;
do {
msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
ret = qcom_scm_pas_shutdown(adsp->pas_id);
} while (ret == -EINVAL && --retry_num);
return ret;
}
static int adsp_unprepare(struct rproc *rproc)
{
struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
@ -185,13 +206,17 @@ static int adsp_start(struct rproc *rproc)
if (ret)
goto disable_xo_clk;
ret = regulator_enable(adsp->cx_supply);
if (ret)
goto disable_aggre2_clk;
if (adsp->cx_supply) {
ret = regulator_enable(adsp->cx_supply);
if (ret)
goto disable_aggre2_clk;
}
ret = regulator_enable(adsp->px_supply);
if (ret)
goto disable_cx_supply;
if (adsp->px_supply) {
ret = regulator_enable(adsp->px_supply);
if (ret)
goto disable_cx_supply;
}
ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
if (ret) {
@ -212,9 +237,11 @@ static int adsp_start(struct rproc *rproc)
return 0;
disable_px_supply:
regulator_disable(adsp->px_supply);
if (adsp->px_supply)
regulator_disable(adsp->px_supply);
disable_cx_supply:
regulator_disable(adsp->cx_supply);
if (adsp->cx_supply)
regulator_disable(adsp->cx_supply);
disable_aggre2_clk:
clk_disable_unprepare(adsp->aggre2_clk);
disable_xo_clk:
@ -231,8 +258,10 @@ static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
{
struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
regulator_disable(adsp->px_supply);
regulator_disable(adsp->cx_supply);
if (adsp->px_supply)
regulator_disable(adsp->px_supply);
if (adsp->cx_supply)
regulator_disable(adsp->cx_supply);
clk_disable_unprepare(adsp->aggre2_clk);
clk_disable_unprepare(adsp->xo);
adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
@ -249,6 +278,9 @@ static int adsp_stop(struct rproc *rproc)
dev_err(adsp->dev, "timed out on wait\n");
ret = qcom_scm_pas_shutdown(adsp->pas_id);
if (ret && adsp->decrypt_shutdown)
ret = adsp_shutdown_poll_decrypt(adsp);
if (ret)
dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
@ -268,6 +300,9 @@ static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iom
if (offset < 0 || offset + len > adsp->mem_size)
return NULL;
if (is_iomem)
*is_iomem = true;
return adsp->mem_region + offset;
}
@ -326,14 +361,26 @@ static int adsp_init_clock(struct qcom_adsp *adsp)
static int adsp_init_regulator(struct qcom_adsp *adsp)
{
adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
if (IS_ERR(adsp->cx_supply))
return PTR_ERR(adsp->cx_supply);
adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
if (IS_ERR(adsp->cx_supply)) {
if (PTR_ERR(adsp->cx_supply) == -ENODEV)
adsp->cx_supply = NULL;
else
return PTR_ERR(adsp->cx_supply);
}
regulator_set_load(adsp->cx_supply, 100000);
if (adsp->cx_supply)
regulator_set_load(adsp->cx_supply, 100000);
adsp->px_supply = devm_regulator_get(adsp->dev, "px");
return PTR_ERR_OR_ZERO(adsp->px_supply);
adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
if (IS_ERR(adsp->px_supply)) {
if (PTR_ERR(adsp->px_supply) == -ENODEV)
adsp->px_supply = NULL;
else
return PTR_ERR(adsp->px_supply);
}
return 0;
}
static int adsp_pds_attach(struct device *dev, struct device **devs,
@ -459,9 +506,12 @@ static int adsp_probe(struct platform_device *pdev)
adsp->pas_id = desc->pas_id;
adsp->has_aggre2_clk = desc->has_aggre2_clk;
adsp->info_name = desc->sysmon_name;
adsp->decrypt_shutdown = desc->decrypt_shutdown;
platform_set_drvdata(pdev, adsp);
device_wakeup_enable(adsp->dev);
ret = device_init_wakeup(adsp->dev, true);
if (ret)
goto free_rproc;
ret = adsp_alloc_memory_region(adsp);
if (ret)
@ -877,6 +927,25 @@ static const struct adsp_data sdx55_mpss_resource = {
.ssctl_id = 0x22,
};
static const struct adsp_data sm8450_mpss_resource = {
.crash_reason_smem = 421,
.firmware_name = "modem.mdt",
.pas_id = 4,
.minidump_id = 3,
.has_aggre2_clk = false,
.auto_boot = false,
.decrypt_shutdown = true,
.proxy_pd_names = (char*[]){
"cx",
"mss",
NULL
},
.load_state = "modem",
.ssr_name = "mpss",
.sysmon_name = "modem",
.ssctl_id = 0x12,
};
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
@ -916,7 +985,7 @@ static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
{ .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
{ .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource},
{ .compatible = "qcom,sm8450-mpss-pas", .data = &mpss_resource_init},
{ .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
{ },
};
MODULE_DEVICE_TABLE(of, adsp_of_match);

18
drivers/remoteproc/qcom_sysmon.c
View File

@ -41,6 +41,7 @@ struct qcom_sysmon {
struct completion comp;
struct completion ind_comp;
struct completion shutdown_comp;
struct completion ssctl_comp;
struct mutex lock;
bool ssr_ack;
@ -445,6 +446,8 @@ static int ssctl_new_server(struct qmi_handle *qmi, struct qmi_service *svc)
svc->priv = sysmon;
complete(&sysmon->ssctl_comp);
return 0;
}
@ -501,6 +504,7 @@ static int sysmon_start(struct rproc_subdev *subdev)
.ssr_event = SSCTL_SSR_EVENT_AFTER_POWERUP
};
reinit_completion(&sysmon->ssctl_comp);
mutex_lock(&sysmon->state_lock);
sysmon->state = SSCTL_SSR_EVENT_AFTER_POWERUP;
blocking_notifier_call_chain(&sysmon_notifiers, 0, (void *)&event);
@ -508,10 +512,12 @@ static int sysmon_start(struct rproc_subdev *subdev)
mutex_lock(&sysmon_lock);
list_for_each_entry(target, &sysmon_list, node) {
if (target == sysmon)
continue;
mutex_lock(&target->state_lock);
if (target == sysmon || target->state != SSCTL_SSR_EVENT_AFTER_POWERUP) {
mutex_unlock(&target->state_lock);
continue;
}
event.subsys_name = target->name;
event.ssr_event = target->state;
@ -545,6 +551,11 @@ static void sysmon_stop(struct rproc_subdev *subdev, bool crashed)
if (crashed)
return;
if (sysmon->ssctl_instance) {
if (!wait_for_completion_timeout(&sysmon->ssctl_comp, HZ / 2))
dev_err(sysmon->dev, "timeout waiting for ssctl service\n");
}
if (sysmon->ssctl_version)
sysmon->shutdown_acked = ssctl_request_shutdown(sysmon);
else if (sysmon->ept)
@ -631,6 +642,7 @@ struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
init_completion(&sysmon->comp);
init_completion(&sysmon->ind_comp);
init_completion(&sysmon->shutdown_comp);
init_completion(&sysmon->ssctl_comp);
mutex_init(&sysmon->lock);
mutex_init(&sysmon->state_lock);

10
drivers/remoteproc/qcom_wcnss.c
View File

@ -467,6 +467,7 @@ static int wcnss_request_irq(struct qcom_wcnss *wcnss,
irq_handler_t thread_fn)
{
int ret;
int irq_number;
ret = platform_get_irq_byname(pdev, name);
if (ret < 0 && optional) {
@ -477,14 +478,19 @@ static int wcnss_request_irq(struct qcom_wcnss *wcnss,
return ret;
}
irq_number = ret;
ret = devm_request_threaded_irq(&pdev->dev, ret,
NULL, thread_fn,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
"wcnss", wcnss);
if (ret)
if (ret) {
dev_err(&pdev->dev, "request %s IRQ failed\n", name);
return ret;
}
return ret;
/* Return the IRQ number if the IRQ was successfully acquired */
return irq_number;
}
static int wcnss_alloc_memory_region(struct qcom_wcnss *wcnss)

24
drivers/remoteproc/remoteproc_core.c
View File

@ -59,6 +59,7 @@ static int rproc_release_carveout(struct rproc *rproc,
/* Unique indices for remoteproc devices */
static DEFINE_IDA(rproc_dev_index);
static struct workqueue_struct *rproc_recovery_wq;
static const char * const rproc_crash_names[] = {
[RPROC_MMUFAULT] = "mmufault",
@ -461,6 +462,7 @@ static void rproc_rvdev_release(struct device *dev)
struct rproc_vdev *rvdev = container_of(dev, struct rproc_vdev, dev);
of_reserved_mem_device_release(dev);
dma_release_coherent_memory(dev);
kfree(rvdev);
}
@ -970,7 +972,7 @@ static int rproc_handle_carveout(struct rproc *rproc,
return 0;
}
/* Register carveout in in list */
/* Register carveout in list */
carveout = rproc_mem_entry_init(dev, NULL, 0, rsc->len, rsc->da,
rproc_alloc_carveout,
rproc_release_carveout, rsc->name);
@ -2434,7 +2436,7 @@ static void rproc_type_release(struct device *dev)
idr_destroy(&rproc->notifyids);
if (rproc->index >= 0)
ida_simple_remove(&rproc_dev_index, rproc->index);
ida_free(&rproc_dev_index, rproc->index);
kfree_const(rproc->firmware);
kfree_const(rproc->name);
@ -2551,9 +2553,9 @@ struct rproc *rproc_alloc(struct device *dev, const char *name,
goto put_device;
/* Assign a unique device index and name */
rproc->index = ida_simple_get(&rproc_dev_index, 0, 0, GFP_KERNEL);
rproc->index = ida_alloc(&rproc_dev_index, GFP_KERNEL);
if (rproc->index < 0) {
dev_err(dev, "ida_simple_get failed: %d\n", rproc->index);
dev_err(dev, "ida_alloc failed: %d\n", rproc->index);
goto put_device;
}
@ -2762,8 +2764,7 @@ void rproc_report_crash(struct rproc *rproc, enum rproc_crash_type type)
dev_err(&rproc->dev, "crash detected in %s: type %s\n",
rproc->name, rproc_crash_to_string(type));
/* Have a worker handle the error; ensure system is not suspended */
queue_work(system_freezable_wq, &rproc->crash_handler);
queue_work(rproc_recovery_wq, &rproc->crash_handler);
}
EXPORT_SYMBOL(rproc_report_crash);
@ -2812,6 +2813,13 @@ static void __exit rproc_exit_panic(void)
static int __init remoteproc_init(void)
{
rproc_recovery_wq = alloc_workqueue("rproc_recovery_wq",
WQ_UNBOUND | WQ_FREEZABLE, 0);
if (!rproc_recovery_wq) {
pr_err("remoteproc: creation of rproc_recovery_wq failed\n");
return -ENOMEM;
}
rproc_init_sysfs();
rproc_init_debugfs();
rproc_init_cdev();
@ -2825,9 +2833,13 @@ static void __exit remoteproc_exit(void)
{
ida_destroy(&rproc_dev_index);
if (!rproc_recovery_wq)
return;
rproc_exit_panic();
rproc_exit_debugfs();
rproc_exit_sysfs();
destroy_workqueue(rproc_recovery_wq);
}
module_exit(remoteproc_exit);

2
drivers/remoteproc/ti_k3_r5_remoteproc.c
View File

@ -1655,6 +1655,7 @@ static int k3_r5_cluster_of_init(struct platform_device *pdev)
if (!cpdev) {
ret = -ENODEV;
dev_err(dev, "could not get R5 core platform device\n");
of_node_put(child);
goto fail;
}
@ -1663,6 +1664,7 @@ static int k3_r5_cluster_of_init(struct platform_device *pdev)
dev_err(dev, "k3_r5_core_of_init failed, ret = %d\n",
ret);
put_device(&cpdev->dev);
of_node_put(child);
goto fail;
}

3
include/linux/dma-map-ops.h
View File

@ -177,6 +177,7 @@ static inline void dma_pernuma_cma_reserve(void) { }
#ifdef CONFIG_DMA_DECLARE_COHERENT
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
dma_addr_t device_addr, size_t size);
void dma_release_coherent_memory(struct device *dev);
int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
dma_addr_t *dma_handle, void **ret);
int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
@ -188,9 +189,11 @@ static inline int dma_declare_coherent_memory(struct device *dev,
{
return -ENOSYS;
}
#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
static inline void dma_release_coherent_memory(struct device *dev) { }
#endif /* CONFIG_DMA_DECLARE_COHERENT */
#ifdef CONFIG_DMA_GLOBAL_POOL

10
kernel/dma/coherent.c
View File

@ -74,7 +74,7 @@ static struct dma_coherent_mem *dma_init_coherent_memory(phys_addr_t phys_addr,
return ERR_PTR(-ENOMEM);
}
static void dma_release_coherent_memory(struct dma_coherent_mem *mem)
static void _dma_release_coherent_memory(struct dma_coherent_mem *mem)
{
if (!mem)
return;
@ -126,10 +126,16 @@ int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
ret = dma_assign_coherent_memory(dev, mem);
if (ret)
dma_release_coherent_memory(mem);
_dma_release_coherent_memory(mem);
return ret;
}
void dma_release_coherent_memory(struct device *dev)
{
if (dev)
_dma_release_coherent_memory(dev->dma_mem);
}
static void *__dma_alloc_from_coherent(struct device *dev,
struct dma_coherent_mem *mem,
ssize_t size, dma_addr_t *dma_handle)