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spi: lpspi: fix dataloss when SS is inactivated between every words
If we don't use CONT to keep SS activated or use DMA mode without cs-gpio, SS will be inactivated between every words. The word here means the data sent once which length can be set as 1/2/4 bytes. In the isr function, we read the FSR_RXCOUNT just behind the fsl_lpspi_read_rx_fifo. This causes the value of FSR_RXCOUNT cannot reflect whether there is still data not sent timely. So do this judgement by FSR_TXCOUNT. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -62,7 +62,7 @@
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#define CFGR1_PCSPOL BIT(8)
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#define CFGR1_NOSTALL BIT(3)
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#define CFGR1_MASTER BIT(0)
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#define FSR_RXCOUNT (BIT(16)|BIT(17)|BIT(18))
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#define FSR_TXCOUNT (0xFF)
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#define RSR_RXEMPTY BIT(1)
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#define TCR_CPOL BIT(31)
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#define TCR_CPHA BIT(30)
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@ -452,7 +452,7 @@ static irqreturn_t fsl_lpspi_isr(int irq, void *dev_id)
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}
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if (temp_SR & SR_MBF ||
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readl(fsl_lpspi->base + IMX7ULP_FSR) & FSR_RXCOUNT) {
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readl(fsl_lpspi->base + IMX7ULP_FSR) & FSR_TXCOUNT) {
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writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);
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fsl_lpspi_intctrl(fsl_lpspi, IER_FCIE);
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return IRQ_HANDLED;
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