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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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- Make sure PMU internal buffers are flushed for per-CPU events too and
properly handle PID/TID for large PEBS. - Handle the case properly when there's no PMU and therefore return an empty list of perf MSRs for VMX to switch instead of reading random garbage from the stack. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmBOBHoACgkQEsHwGGHe VUoYHBAAmSY3P4Q91ZS+Sz1orGGX0LufQ0ZVWxnNUD9sFibz5Y2MxyJpQPm6Ae4U 1nO0+QyzbQPwuWKcQxlLHOJXkypkFSdRyR3cpAE5BOIXvqna07xBg/zuTFaOoDek qn42RHLs5TQB1MNKY+0dyJAfjEHBFrm0CsO27L99TRv5nEsdECM/vUswvasc+QMC dTS9sMHoiDVwJ8DFn6qmJ8AqkNxmcZgvNOD62TAt8Ac6u6zTGqq1oN+BMpQFRo9a j/Fu+5PZS4bH/pMlpL0OR6AlmR1PPJ8e1Ik+1Dk0brCrSNdiXtS3DSTllbGxNFi6 4d5oSoStAyDNrihwPm2dw+VofFC03PEVZN095WVq7Iqn9cK/nxFgBEpaIe6fiwa2 MrZ2YiDxrOAin0hxUSu8oLwgOwxmedaSQwo1tyzZswVtXSqc7p4JawzBiIo93RAJ UHpXI9zwgEyOGUJ95qcbezJVgILJqExjN+SOxaNjoqkAX8Hfgrf4aKDIMrcMC02Z ZFW86MXL2Rwk+WspAKlWtPgAGuU5sljXeyDK0MRcHwAom8cX+Fod80ocI+xjX8JB R73cd9dE2iWzIADikCItixzka+HuUBgWDqVT85yTzBt/KqwbIeE7kn6VCJmoJBbw c9aRcyqEBky8FO6EpD0vIP2jcnlbvUnoq5wG0KV9KXaQDhxtZfk= =djiL -----END PGP SIGNATURE----- Merge tag 'perf_urgent_for_v5.12-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fixes from Borislav Petkov: - Make sure PMU internal buffers are flushed for per-CPU events too and properly handle PID/TID for large PEBS. - Handle the case properly when there's no PMU and therefore return an empty list of perf MSRs for VMX to switch instead of reading random garbage from the stack. * tag 'perf_urgent_for_v5.12-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/perf: Use RET0 as default for guest_get_msrs to handle "no PMU" case perf/x86/intel: Set PERF_ATTACH_SCHED_CB for large PEBS and LBR perf/core: Flush PMU internal buffers for per-CPU events
This commit is contained in:
commit
75013c6c52
@ -81,7 +81,11 @@ DEFINE_STATIC_CALL_NULL(x86_pmu_swap_task_ctx, *x86_pmu.swap_task_ctx);
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DEFINE_STATIC_CALL_NULL(x86_pmu_drain_pebs, *x86_pmu.drain_pebs);
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DEFINE_STATIC_CALL_NULL(x86_pmu_pebs_aliases, *x86_pmu.pebs_aliases);
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DEFINE_STATIC_CALL_NULL(x86_pmu_guest_get_msrs, *x86_pmu.guest_get_msrs);
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/*
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* This one is magic, it will get called even when PMU init fails (because
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* there is no PMU), in which case it should simply return NULL.
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*/
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DEFINE_STATIC_CALL_RET0(x86_pmu_guest_get_msrs, *x86_pmu.guest_get_msrs);
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u64 __read_mostly hw_cache_event_ids
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[PERF_COUNT_HW_CACHE_MAX]
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@ -1944,13 +1948,6 @@ static void _x86_pmu_read(struct perf_event *event)
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x86_perf_event_update(event);
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}
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static inline struct perf_guest_switch_msr *
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perf_guest_get_msrs_nop(int *nr)
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{
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*nr = 0;
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return NULL;
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}
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static int __init init_hw_perf_events(void)
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{
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struct x86_pmu_quirk *quirk;
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@ -2025,7 +2022,7 @@ static int __init init_hw_perf_events(void)
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x86_pmu.read = _x86_pmu_read;
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if (!x86_pmu.guest_get_msrs)
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x86_pmu.guest_get_msrs = perf_guest_get_msrs_nop;
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x86_pmu.guest_get_msrs = (void *)&__static_call_return0;
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x86_pmu_static_call_update();
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@ -3662,8 +3662,10 @@ static int intel_pmu_hw_config(struct perf_event *event)
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if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) {
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event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
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if (!(event->attr.sample_type &
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~intel_pmu_large_pebs_flags(event)))
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~intel_pmu_large_pebs_flags(event))) {
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event->hw.flags |= PERF_X86_EVENT_LARGE_PEBS;
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event->attach_state |= PERF_ATTACH_SCHED_CB;
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}
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}
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if (x86_pmu.pebs_aliases)
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x86_pmu.pebs_aliases(event);
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@ -3676,6 +3678,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
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ret = intel_pmu_setup_lbr_filter(event);
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if (ret)
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return ret;
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event->attach_state |= PERF_ATTACH_SCHED_CB;
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/*
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* BTS is set up earlier in this path, so don't account twice
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@ -6580,8 +6580,8 @@ static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx)
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int i, nr_msrs;
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struct perf_guest_switch_msr *msrs;
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/* Note, nr_msrs may be garbage if perf_guest_get_msrs() returns NULL. */
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msrs = perf_guest_get_msrs(&nr_msrs);
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if (!msrs)
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return;
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@ -606,6 +606,7 @@ struct swevent_hlist {
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#define PERF_ATTACH_TASK 0x04
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#define PERF_ATTACH_TASK_DATA 0x08
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#define PERF_ATTACH_ITRACE 0x10
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#define PERF_ATTACH_SCHED_CB 0x20
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struct perf_cgroup;
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struct perf_buffer;
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@ -872,6 +873,7 @@ struct perf_cpu_context {
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struct list_head cgrp_cpuctx_entry;
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#endif
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struct list_head sched_cb_entry;
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int sched_cb_usage;
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int online;
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@ -386,6 +386,7 @@ static DEFINE_MUTEX(perf_sched_mutex);
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static atomic_t perf_sched_count;
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static DEFINE_PER_CPU(atomic_t, perf_cgroup_events);
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static DEFINE_PER_CPU(int, perf_sched_cb_usages);
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static DEFINE_PER_CPU(struct pmu_event_list, pmu_sb_events);
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static atomic_t nr_mmap_events __read_mostly;
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@ -3461,11 +3462,16 @@ static void perf_event_context_sched_out(struct task_struct *task, int ctxn,
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}
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}
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static DEFINE_PER_CPU(struct list_head, sched_cb_list);
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void perf_sched_cb_dec(struct pmu *pmu)
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{
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struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
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--cpuctx->sched_cb_usage;
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this_cpu_dec(perf_sched_cb_usages);
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if (!--cpuctx->sched_cb_usage)
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list_del(&cpuctx->sched_cb_entry);
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}
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@ -3473,7 +3479,10 @@ void perf_sched_cb_inc(struct pmu *pmu)
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{
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struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
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cpuctx->sched_cb_usage++;
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if (!cpuctx->sched_cb_usage++)
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list_add(&cpuctx->sched_cb_entry, this_cpu_ptr(&sched_cb_list));
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this_cpu_inc(perf_sched_cb_usages);
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}
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/*
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@ -3502,6 +3511,24 @@ static void __perf_pmu_sched_task(struct perf_cpu_context *cpuctx, bool sched_in
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perf_ctx_unlock(cpuctx, cpuctx->task_ctx);
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}
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static void perf_pmu_sched_task(struct task_struct *prev,
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struct task_struct *next,
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bool sched_in)
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{
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struct perf_cpu_context *cpuctx;
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if (prev == next)
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return;
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list_for_each_entry(cpuctx, this_cpu_ptr(&sched_cb_list), sched_cb_entry) {
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/* will be handled in perf_event_context_sched_in/out */
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if (cpuctx->task_ctx)
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continue;
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__perf_pmu_sched_task(cpuctx, sched_in);
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}
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}
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static void perf_event_switch(struct task_struct *task,
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struct task_struct *next_prev, bool sched_in);
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@ -3524,6 +3551,9 @@ void __perf_event_task_sched_out(struct task_struct *task,
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{
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int ctxn;
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if (__this_cpu_read(perf_sched_cb_usages))
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perf_pmu_sched_task(task, next, false);
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if (atomic_read(&nr_switch_events))
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perf_event_switch(task, next, false);
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@ -3832,6 +3862,9 @@ void __perf_event_task_sched_in(struct task_struct *prev,
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if (atomic_read(&nr_switch_events))
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perf_event_switch(task, prev, true);
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if (__this_cpu_read(perf_sched_cb_usages))
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perf_pmu_sched_task(prev, task, true);
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}
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static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count)
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@ -4656,7 +4689,7 @@ static void unaccount_event(struct perf_event *event)
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if (event->parent)
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return;
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if (event->attach_state & PERF_ATTACH_TASK)
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if (event->attach_state & (PERF_ATTACH_TASK | PERF_ATTACH_SCHED_CB))
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dec = true;
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if (event->attr.mmap || event->attr.mmap_data)
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atomic_dec(&nr_mmap_events);
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@ -11175,7 +11208,7 @@ static void account_event(struct perf_event *event)
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if (event->parent)
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return;
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if (event->attach_state & PERF_ATTACH_TASK)
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if (event->attach_state & (PERF_ATTACH_TASK | PERF_ATTACH_SCHED_CB))
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inc = true;
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if (event->attr.mmap || event->attr.mmap_data)
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atomic_inc(&nr_mmap_events);
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@ -12972,6 +13005,7 @@ static void __init perf_event_init_all_cpus(void)
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#ifdef CONFIG_CGROUP_PERF
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INIT_LIST_HEAD(&per_cpu(cgrp_cpuctx_list, cpu));
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#endif
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INIT_LIST_HEAD(&per_cpu(sched_cb_list, cpu));
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}
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}
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