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ata: Fix typos in the comment

Browse Source 
Correctly spelled comments make it easier for the reader to understand
the code.

Fix typos:
'multipe' ==> 'multiple',
'Paremeters' ==> 'Parameters',
'recieved' ==> 'received',
'realted' ==> 'related',
'evaulated' ==> 'evaluated',
'programing' ==> 'programming',
'coninue' ==> 'continue'.

Signed-off-by: Yan Zhen <yanzhen@vivo.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/20240927060056.221977-1-yanzhen@vivo.com
Signed-off-by: Niklas Cassel <cassel@kernel.org>
This commit is contained in:
Yan Zhen 2024-09-27 14:00:56 +08:00 committed by Niklas Cassel
parent 9852d85ec9
commit 794007a8c8
8 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/ata/ahci.c
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@ -1676,7 +1676,7 @@ static int ahci_init_msi(struct pci_dev *pdev, unsigned int n_ports,
/*
* If number of MSIs is less than number of ports then Sharing Last
* Message mode could be enforced. In this case assume that advantage
* of multipe MSIs is negated and use single MSI mode instead.
* of multiple MSIs is negated and use single MSI mode instead.
*/
if (n_ports > 1) {
nvec = pci_alloc_irq_vectors(pdev, n_ports, INT_MAX,

2
drivers/ata/ahci_imx.c
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@ -511,7 +511,7 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)
if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) {
/*
* set PHY Paremeters, two steps to configure the GPR13,
* set PHY Parameters, two steps to configure the GPR13,
* one write for rest of parameters, mask of first write
* is 0x07ffffff, and the other one write for setting
* the mpll_clk_en.

2
drivers/ata/ahci_xgene.c
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@ -534,7 +534,7 @@ static int xgene_ahci_softreset(struct ata_link *link, unsigned int *class,
/**
* xgene_ahci_handle_broken_edge_irq - Handle the broken irq.
* @host: Host that recieved the irq
* @host: Host that received the irq
* @irq_masked: HOST_IRQ_STAT value
*
* For hardware with broken edge trigger latch

4
drivers/ata/libata-acpi.c
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@ -86,7 +86,7 @@ static void ata_acpi_detach_device(struct ata_port *ap, struct ata_device *dev)
* @dev: ATA device ACPI event occurred (can be NULL)
* @event: ACPI event which occurred
*
* All ACPI bay / device realted events end up in this function. If
* All ACPI bay / device related events end up in this function. If
* the event is port-wide @dev is NULL. If the event is specific to a
* device, @dev points to it.
*
@ -832,7 +832,7 @@ void ata_acpi_on_resume(struct ata_port *ap)
dev->flags |= ATA_DFLAG_ACPI_PENDING;
}
} else {
/* SATA _GTF needs to be evaulated after _SDD and
/* SATA _GTF needs to be evaluated after _SDD and
* there's no reason to evaluate IDE _GTF early
* without _STM. Clear cache and schedule _GTF.
*/

2
drivers/ata/pata_it8213.c
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@ -81,7 +81,7 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
int control = 0;
/*
* See Intel Document 298600-004 for the timing programing rules
* See Intel Document 298600-004 for the timing programming rules
* for PIIX/ICH. The 8213 is a clone so very similar
*/

2
drivers/ata/pata_octeon_cf.c
View File

@ -183,7 +183,7 @@ static void octeon_cf_set_piomode(struct ata_port *ap, struct ata_device *dev)
reg_tim.s.ale = 0;
/* Not used */
reg_tim.s.page = 0;
/* Time after IORDY to coninue to assert the data */
/* Time after IORDY to continue to assert the data */
reg_tim.s.wait = 0;
/* Time to wait to complete the cycle. */
reg_tim.s.pause = pause;

2
drivers/ata/pata_oldpiix.c
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@ -70,7 +70,7 @@ static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev)
int control = 0;
/*
* See Intel Document 298600-004 for the timing programing rules
* See Intel Document 298600-004 for the timing programming rules
* for PIIX/ICH. Note that the early PIIX does not have the slave
* timing port at 0x44.
*/

2
drivers/ata/pata_radisys.c
View File

@ -45,7 +45,7 @@ static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
int control = 0;
/*
* See Intel Document 298600-004 for the timing programing rules
* See Intel Document 298600-004 for the timing programming rules
* for PIIX/ICH. Note that the early PIIX does not have the slave
* timing port at 0x44. The Radisys is a relative of the PIIX
* but not the same so be careful.