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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2025-01-09 22:50:41 +00:00
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: sata_mv: Prevent PIO commands to be defered too long if traffic in progress. pata_sc1200: Fix crash on boot libata: fix internal command failure handling libata: fix PMP initialization sata_nv: make sure link is brough up online when skipping hardreset ahci / atiixp / pci quirks: rename AMD SB900 into Hudson-2 ahci: Add the AHCI controller Linux Device ID for NVIDIA chipsets. pata_via: extend the rev_max for VT6330
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commit
7c650a0a9d
@ -575,7 +575,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */
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/* AMD */
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{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD SB900 */
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{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
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/* AMD is using RAID class only for ahci controllers */
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{ PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
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@ -605,6 +605,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */
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{ PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq }, /* Linux ID */
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{ PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */
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{ PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */
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@ -5028,12 +5028,14 @@ void ata_qc_complete(struct ata_queued_cmd *qc)
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qc->flags |= ATA_QCFLAG_FAILED;
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if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
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if (!ata_tag_internal(qc->tag)) {
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/* always fill result TF for failed qc */
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fill_result_tf(qc);
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/* always fill result TF for failed qc */
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fill_result_tf(qc);
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if (!ata_tag_internal(qc->tag))
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ata_qc_schedule_eh(qc);
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return;
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}
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else
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__ata_qc_complete(qc);
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return;
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}
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WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
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@ -2981,12 +2981,14 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
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* device detection messages backwards.
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*/
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ata_for_each_dev(dev, link, ALL) {
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if (!(new_mask & (1 << dev->devno)) ||
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dev->class == ATA_DEV_PMP)
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if (!(new_mask & (1 << dev->devno)))
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continue;
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dev->class = ehc->classes[dev->devno];
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if (dev->class == ATA_DEV_PMP)
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continue;
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ehc->i.flags |= ATA_EHI_PRINTINFO;
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rc = ata_dev_configure(dev);
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ehc->i.flags &= ~ATA_EHI_PRINTINFO;
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@ -246,7 +246,7 @@ static const struct pci_device_id atiixp[] = {
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_SB900_IDE), },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), },
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{ },
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};
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@ -235,8 +235,7 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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.udma_mask = ATA_UDMA2,
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.port_ops = &sc1200_port_ops
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};
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/* Can't enable port 2 yet, see top comments */
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const struct ata_port_info *ppi[] = { &info, };
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const struct ata_port_info *ppi[] = { &info, NULL };
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return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL);
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}
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@ -111,7 +111,7 @@ static const struct via_isa_bridge {
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{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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@ -1382,6 +1382,25 @@ static int mv_qc_defer(struct ata_queued_cmd *qc)
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*/
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if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH)
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return ATA_DEFER_PORT;
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/* PIO commands need exclusive link: no other commands [DMA or PIO]
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* can run concurrently.
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* set excl_link when we want to send a PIO command in DMA mode
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* or a non-NCQ command in NCQ mode.
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* When we receive a command from that link, and there are no
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* outstanding commands, mark a flag to clear excl_link and let
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* the command go through.
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*/
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if (unlikely(ap->excl_link)) {
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if (link == ap->excl_link) {
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if (ap->nr_active_links)
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return ATA_DEFER_PORT;
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qc->flags |= ATA_QCFLAG_CLEAR_EXCL;
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return 0;
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} else
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return ATA_DEFER_PORT;
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}
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/*
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* If the port is completely idle, then allow the new qc.
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*/
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@ -1395,8 +1414,14 @@ static int mv_qc_defer(struct ata_queued_cmd *qc)
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* doesn't allow it.
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*/
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if ((pp->pp_flags & MV_PP_FLAG_EDMA_EN) &&
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(pp->pp_flags & MV_PP_FLAG_NCQ_EN) && ata_is_ncq(qc->tf.protocol))
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return 0;
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(pp->pp_flags & MV_PP_FLAG_NCQ_EN)) {
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if (ata_is_ncq(qc->tf.protocol))
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return 0;
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else {
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ap->excl_link = link;
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return ATA_DEFER_PORT;
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}
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}
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return ATA_DEFER_PORT;
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}
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@ -1594,9 +1594,21 @@ static int nv_hardreset(struct ata_link *link, unsigned int *class,
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!ata_dev_enabled(link->device))
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sata_link_hardreset(link, sata_deb_timing_hotplug, deadline,
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NULL, NULL);
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else if (!(ehc->i.flags & ATA_EHI_QUIET))
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ata_link_printk(link, KERN_INFO,
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"nv: skipping hardreset on occupied port\n");
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else {
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const unsigned long *timing = sata_ehc_deb_timing(ehc);
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int rc;
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if (!(ehc->i.flags & ATA_EHI_QUIET))
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ata_link_printk(link, KERN_INFO, "nv: skipping "
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"hardreset on occupied port\n");
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/* make sure the link is online */
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rc = sata_link_resume(link, timing, deadline);
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/* whine about phy resume failure but proceed */
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if (rc && rc != -EOPNOTSUPP)
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ata_link_printk(link, KERN_WARNING, "failed to resume "
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"link (errno=%d)\n", rc);
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}
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/* device signature acquisition is unreliable */
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return -EAGAIN;
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@ -177,7 +177,7 @@ static const struct pci_device_id atiixp_pci_tbl[] = {
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_SB900_IDE), 0 },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
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@ -1009,7 +1009,7 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX,
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static void __devinit quirk_amd_ide_mode(struct pci_dev *pdev)
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{
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/* set SBX00 SATA in IDE mode to AHCI mode */
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/* set SBX00/Hudson-2 SATA in IDE mode to AHCI mode */
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u8 tmp;
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pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &tmp);
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@ -1028,8 +1028,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SATA_IDE, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SATA_IDE, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode);
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/*
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* Serverworks CSB5 IDE does not fully support native mode
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@ -379,9 +379,6 @@
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#define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c
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#define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390
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#define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c
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/* AMD SB Chipset */
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#define PCI_DEVICE_ID_AMD_SB900_IDE 0x780c
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#define PCI_DEVICE_ID_AMD_SB900_SATA_IDE 0x7800
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#define PCI_VENDOR_ID_VLSI 0x1004
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#define PCI_DEVICE_ID_VLSI_82C592 0x0005
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@ -553,9 +550,10 @@
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#define PCI_DEVICE_ID_AMD_CS5536_UDC 0x2096
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#define PCI_DEVICE_ID_AMD_CS5536_UOC 0x2097
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#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A
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#define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081
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#define PCI_DEVICE_ID_AMD_LX_AES 0x2082
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#define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c
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#define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE 0x7800
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#define PCI_VENDOR_ID_TRIDENT 0x1023
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#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000
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