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A set of interrupt chip driver fixes:
- Fix the multi vector MSI allocation on Armada 370XP. - Do interrupt acknowledgement correctly in the aspeed-scu driver. - Make the IPR register offset correct in the NVIC driver. - Make redistribution table flushing correct by issueing a SYNC command to ensure that the invalidation command has been executed. - Plug a device tree node reference leak in the bcm7210-l2 driver. - Trivial fixes in the MIPS GIC and the Apple AIC drivers -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmG1xckTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoUoUEACeEOPsTeHUNkLZ6/P3bbEuaoJuW1bZ ALsN6WaxRwxfEH73gI/8HJA6PPLmnw68fiCo5uHnCOD6pzxh4Gt2dh3Z/W2GRSB2 8rIOI0i3eeJz3mEc5VpBbboCDSUhat3fVFg+GK0JeuZDusTkiPUkCy5nMd5LzX7U 7P+OEkcTzFqsKFI70zz/WjUaoBbQt4rWELz+fhDOXEoFQ9y2EtELEqtRCqe/6W/z daaPOmSWOyGCiF0xSM54D2kbeTgYYdmNvKbg13yY5oFtVPNJva6LMSLKUJ3UUKzH ZuDIxCvkx++EbgZZWFF5KgC5ETboFgY0yrJul4V9BX5od9sNLExElmmAnrBJsB2P /s3XuvPRx7533sCFfqLSWhJz3A58kQN0lD47Ky/Srz4S31ObVkqQZEJcoSOGvpU1 frUViZ1nivF4dkSir2CV5IIMYBZHaZR2HlVrWsAxNYZf+9LYjEf2tI0Yri3BgsIX EtRGp/e255V61VQxr9wtVs4IpYKqsc67qFF/qvNxV68pZZdImBn0Ld4wZlbfTWAS 0KpUcMh3SaZ3527zg5Ji5lOB+K0idgoBlQZlZ2J1N31FFCOBZtKRKEpGTHVR4x7q 2mvEcdl0e4HEs1qYeSOSHvh7A6XvcJ/bk3v+WGwQnioG1IujGTKZH1aOPU/Kbxt2 W5cljrptcwKt3w== =LOoe -----END PGP SIGNATURE----- Merge tag 'irq-urgent-2021-12-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A set of interrupt chip driver fixes: - Fix the multi vector MSI allocation on Armada 370XP - Do interrupt acknowledgement correctly in the aspeed-scu driver - Make the IPR register offset correct in the NVIC driver - Make redistribution table flushing correct by issueing a SYNC command to ensure that the invalidation command has been executed - Plug a device tree node reference leak in the bcm7210-l2 driver - Trivial fixes in the MIPS GIC and the Apple AIC drivers" * tag 'irq-urgent-2021-12-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/irq-bcm7120-l2: Add put_device() after of_find_device_by_node() irqchip/irq-gic-v3-its.c: Force synchronisation when issuing INVALL irqchip/apple-aic: Mark aic_init_smp() as __init irqchip: nvic: Fix offset for Interrupt Priority Offsets irqchip/mips-gic: Use bitfield helpers irqchip/aspeed-scu: Replace update_bits with write_bits. irqchip/armada-370-xp: Fix support for Multi-MSI interrupts irqchip/armada-370-xp: Fix return value of armada_370_xp_msi_alloc()
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commit
82d2ef4540
@ -707,7 +707,7 @@ static const struct irq_domain_ops aic_ipi_domain_ops = {
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.free = aic_ipi_free,
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};
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static int aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node)
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static int __init aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node)
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{
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struct irq_domain *ipi_domain;
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int base_ipi;
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@ -232,17 +232,13 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,
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int hwirq, i;
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mutex_lock(&msi_used_lock);
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hwirq = bitmap_find_next_zero_area(msi_used, PCI_MSI_DOORBELL_NR,
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0, nr_irqs, 0);
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if (hwirq >= PCI_MSI_DOORBELL_NR) {
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mutex_unlock(&msi_used_lock);
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return -ENOSPC;
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}
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bitmap_set(msi_used, hwirq, nr_irqs);
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hwirq = bitmap_find_free_region(msi_used, PCI_MSI_DOORBELL_NR,
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order_base_2(nr_irqs));
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mutex_unlock(&msi_used_lock);
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if (hwirq < 0)
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return -ENOSPC;
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for (i = 0; i < nr_irqs; i++) {
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irq_domain_set_info(domain, virq + i, hwirq + i,
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&armada_370_xp_msi_bottom_irq_chip,
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@ -250,7 +246,7 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,
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NULL, NULL);
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}
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return hwirq;
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return 0;
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}
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static void armada_370_xp_msi_free(struct irq_domain *domain,
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@ -259,7 +255,7 @@ static void armada_370_xp_msi_free(struct irq_domain *domain,
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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mutex_lock(&msi_used_lock);
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bitmap_clear(msi_used, d->hwirq, nr_irqs);
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bitmap_release_region(msi_used, d->hwirq, order_base_2(nr_irqs));
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mutex_unlock(&msi_used_lock);
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}
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@ -76,8 +76,8 @@ static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
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generic_handle_domain_irq(scu_ic->irq_domain,
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bit - scu_ic->irq_shift);
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regmap_update_bits(scu_ic->scu, scu_ic->reg, mask,
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BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
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regmap_write_bits(scu_ic->scu, scu_ic->reg, mask,
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BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
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}
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chained_irq_exit(chip, desc);
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@ -238,6 +238,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
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}
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data->num_parent_irqs = platform_irq_count(pdev);
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put_device(&pdev->dev);
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if (data->num_parent_irqs <= 0) {
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pr_err("invalid number of parent interrupts\n");
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ret = -ENOMEM;
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@ -742,7 +742,7 @@ static struct its_collection *its_build_invall_cmd(struct its_node *its,
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its_fixup_cmd(cmd);
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return NULL;
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return desc->its_invall_cmd.col;
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}
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static struct its_vpe *its_build_vinvall_cmd(struct its_node *its,
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@ -9,6 +9,7 @@
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#define pr_fmt(fmt) "irq-mips-gic: " fmt
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#include <linux/bitfield.h>
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#include <linux/bitmap.h>
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#include <linux/clocksource.h>
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#include <linux/cpuhotplug.h>
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@ -735,8 +736,7 @@ static int __init gic_of_init(struct device_node *node,
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mips_gic_base = ioremap(gic_base, gic_len);
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gicconfig = read_gic_config();
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gic_shared_intrs = gicconfig & GIC_CONFIG_NUMINTERRUPTS;
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gic_shared_intrs >>= __ffs(GIC_CONFIG_NUMINTERRUPTS);
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gic_shared_intrs = FIELD_GET(GIC_CONFIG_NUMINTERRUPTS, gicconfig);
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gic_shared_intrs = (gic_shared_intrs + 1) * 8;
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if (cpu_has_veic) {
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@ -26,7 +26,7 @@
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#define NVIC_ISER 0x000
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#define NVIC_ICER 0x080
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#define NVIC_IPR 0x300
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#define NVIC_IPR 0x400
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#define NVIC_MAX_BANKS 16
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/*
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