rtc: add driver for Marvell 88PM886 PMIC RTC

RTC lives on the chip's base register page. Add the relevant register
definitions and implement a basic set/read time functionality. Tested
with the samsung,coreprimevelte smartphone which contains this PMIC and
whose vendor kernel tree has also served as the sole reference for this.

Signed-off-by: Karel Balej <balejk@matfyz.cz>
Acked-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20241012193345.18594-2-balejk@matfyz.cz
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Karel Balej 2024-10-12 21:31:39 +02:00 committed by Alexandre Belloni
parent e8ba8a2bc4
commit 82ee16cfb2
5 changed files with 118 additions and 0 deletions

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@ -13706,6 +13706,7 @@ F: Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml
F: drivers/input/misc/88pm886-onkey.c
F: drivers/mfd/88pm886.c
F: drivers/regulator/88pm886-regulator.c
F: drivers/rtc/rtc-88pm886.c
F: include/linux/mfd/88pm886.h
MARVELL ARMADA 3700 PHY DRIVERS

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@ -182,6 +182,16 @@ config RTC_DRV_88PM80X
This driver can also be built as a module. If so, the module
will be called rtc-88pm80x.
config RTC_DRV_88PM886
tristate "Marvell 88PM886 RTC driver"
depends on MFD_88PM886_PMIC
help
If you say yes here you will get support for the RTC function in the
Marvell 88PM886 chip.
This driver can also be built as a module. If so, the module
will be called rtc-88pm886.
config RTC_DRV_ABB5ZES3
select REGMAP_I2C
tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"

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@ -21,6 +21,7 @@ obj-$(CONFIG_RTC_LIB_KUNIT_TEST) += lib_test.o
obj-$(CONFIG_RTC_DRV_88PM80X) += rtc-88pm80x.o
obj-$(CONFIG_RTC_DRV_88PM860X) += rtc-88pm860x.o
obj-$(CONFIG_RTC_DRV_88PM886) += rtc-88pm886.o
obj-$(CONFIG_RTC_DRV_AB8500) += rtc-ab8500.o
obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o
obj-$(CONFIG_RTC_DRV_ABEOZ9) += rtc-ab-eoz9.o

97
drivers/rtc/rtc-88pm886.c Normal file
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@ -0,0 +1,97 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/limits.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
#include <linux/mfd/88pm886.h>
/*
* Time is calculated as the sum of a 32-bit read-only advancing counter and a
* writeable constant offset stored in the chip's spare registers.
*/
static int pm886_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct regmap *regmap = dev_get_drvdata(dev);
u32 time;
u32 buf;
int ret;
ret = regmap_bulk_read(regmap, PM886_REG_RTC_SPARE1, &buf, 4);
if (ret)
return ret;
time = buf;
ret = regmap_bulk_read(regmap, PM886_REG_RTC_CNT1, &buf, 4);
if (ret)
return ret;
time += buf;
rtc_time64_to_tm(time, tm);
return 0;
}
static int pm886_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
struct regmap *regmap = dev_get_drvdata(dev);
u32 buf;
int ret;
ret = regmap_bulk_read(regmap, PM886_REG_RTC_CNT1, &buf, 4);
if (ret)
return ret;
buf = rtc_tm_to_time64(tm) - buf;
return regmap_bulk_write(regmap, PM886_REG_RTC_SPARE1, &buf, 4);
}
static const struct rtc_class_ops pm886_rtc_ops = {
.read_time = pm886_rtc_read_time,
.set_time = pm886_rtc_set_time,
};
static int pm886_rtc_probe(struct platform_device *pdev)
{
struct pm886_chip *chip = dev_get_drvdata(pdev->dev.parent);
struct device *dev = &pdev->dev;
struct rtc_device *rtc;
int ret;
platform_set_drvdata(pdev, chip->regmap);
rtc = devm_rtc_allocate_device(dev);
if (IS_ERR(rtc))
return dev_err_probe(dev, PTR_ERR(rtc),
"Failed to allocate RTC device\n");
rtc->ops = &pm886_rtc_ops;
rtc->range_max = U32_MAX;
ret = devm_rtc_register_device(rtc);
if (ret)
return dev_err_probe(dev, ret, "Failed to register RTC device\n");
return 0;
}
static const struct platform_device_id pm886_rtc_id_table[] = {
{ "88pm886-rtc", },
{ }
};
MODULE_DEVICE_TABLE(platform, pm886_rtc_id_table);
static struct platform_driver pm886_rtc_driver = {
.driver = {
.name = "88pm886-rtc",
},
.probe = pm886_rtc_probe,
.id_table = pm886_rtc_id_table,
};
module_platform_driver(pm886_rtc_driver);
MODULE_DESCRIPTION("Marvell 88PM886 RTC driver");
MODULE_AUTHOR("Karel Balej <balejk@matfyz.cz>");
MODULE_LICENSE("GPL");

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@ -31,6 +31,15 @@
#define PM886_INT_WC BIT(1)
#define PM886_INT_MASK_MODE BIT(2)
#define PM886_REG_RTC_CNT1 0xd1
#define PM886_REG_RTC_CNT2 0xd2
#define PM886_REG_RTC_CNT3 0xd3
#define PM886_REG_RTC_CNT4 0xd4
#define PM886_REG_RTC_SPARE1 0xea
#define PM886_REG_RTC_SPARE2 0xeb
#define PM886_REG_RTC_SPARE3 0xec
#define PM886_REG_RTC_SPARE4 0xed
#define PM886_REG_RTC_SPARE5 0xee
#define PM886_REG_RTC_SPARE6 0xef
#define PM886_REG_BUCK_EN 0x08