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dmaengine: idxd: fix mapping of portal size
Portal size is 4k. Current code is mapping all 4 portals in a single chunk. Restrict the mapped portal size to a single portal to ensure that submission only goes to the intended portal address. Fixes: c52ca478233c ("dmaengine: idxd: add configuration component of driver") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160513342642.510187.16450549281618747065.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -271,7 +271,7 @@ int idxd_wq_map_portal(struct idxd_wq *wq)
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resource_size_t start;
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start = pci_resource_start(pdev, IDXD_WQ_BAR);
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start = start + wq->id * IDXD_PORTAL_SIZE;
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start += idxd_get_wq_portal_full_offset(wq->id, IDXD_PORTAL_LIMITED);
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wq->dportal = devm_ioremap(dev, start, IDXD_PORTAL_SIZE);
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if (!wq->dportal)
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@ -8,7 +8,7 @@
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#define IDXD_MMIO_BAR 0
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#define IDXD_WQ_BAR 2
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#define IDXD_PORTAL_SIZE 0x4000
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#define IDXD_PORTAL_SIZE PAGE_SIZE
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/* MMIO Device BAR0 Registers */
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#define IDXD_VER_OFFSET 0x00
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@ -74,7 +74,7 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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if (idxd->state != IDXD_DEV_ENABLED)
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return -EIO;
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portal = wq->dportal + idxd_get_wq_portal_offset(IDXD_PORTAL_UNLIMITED);
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portal = wq->dportal;
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/*
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* The wmb() flushes writes to coherent DMA data before possibly
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* triggering a DMA read. The wmb() is necessary even on UP because
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