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serial: 8250_exar: Replace custom EEPROM read with eeprom_93cx6
Replace the custom 93cx6 EEPROM read functions with the eeprom_93cx6 driver. This removes duplicate code and improves code readability. Replace exar_ee_read() calls with eeprom_93cx6_read() or eeprom_93cx6_multiread(). Add "select EEPROM_93CX6" to config SERIAL_8250_EXAR to ensure eeprom_93cx6 driver is also compiled when 8250_exar driver is selected. Note: Old exar_ee_read() and associated functions are removed in next patch in this series. Link to mailing list discussion with Andy Shevchenko for reference. Link: https://lore.kernel.org/linux-serial/Ztr5u2wEt8VF1IdI@black.fi.intel.com/ Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Parker Newman <pnewman@connecttech.com> Link: https://lore.kernel.org/r/1bf2214ae27130ca58b9e779c4d65a0e5db06fc1.1727880931.git.pnewman@connecttech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -11,6 +11,7 @@
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dmi.h>
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#include <linux/eeprom_93cx6.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/math.h>
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@ -191,8 +192,7 @@
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#define CTI_EE_OFF_XR17V35X_PORT_FLAGS 0x14 /* 1 word */
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#define CTI_EE_MASK_PORT_FLAGS_TYPE GENMASK(7, 0)
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#define CTI_EE_MASK_OSC_FREQ_LOWER GENMASK(15, 0)
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#define CTI_EE_MASK_OSC_FREQ_UPPER GENMASK(31, 16)
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#define CTI_EE_MASK_OSC_FREQ GENMASK(31, 0)
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#define CTI_FPGA_RS485_IO_REG 0x2008
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#define CTI_FPGA_CFG_INT_EN_REG 0x48
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@ -254,6 +254,7 @@ struct exar8250 {
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unsigned int nr;
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unsigned int osc_freq;
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struct exar8250_board *board;
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struct eeprom_93cx6 eeprom;
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void __iomem *virt;
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int line[];
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};
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@ -357,6 +358,39 @@ static u16 exar_ee_read(struct exar8250 *priv, u8 ee_addr)
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return data;
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}
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static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom)
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{
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struct exar8250 *priv = eeprom->data;
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u8 regb = exar_read_reg(priv, UART_EXAR_REGB);
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/* EECK and EECS always read 0 from REGB so only set EEDO */
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eeprom->reg_data_out = regb & UART_EXAR_REGB_EEDO;
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}
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static void exar_eeprom_93cx6_reg_write(struct eeprom_93cx6 *eeprom)
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{
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struct exar8250 *priv = eeprom->data;
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u8 regb = 0;
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if (eeprom->reg_data_in)
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regb |= UART_EXAR_REGB_EEDI;
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if (eeprom->reg_data_clock)
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regb |= UART_EXAR_REGB_EECK;
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if (eeprom->reg_chip_select)
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regb |= UART_EXAR_REGB_EECS;
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exar_write_reg(priv, UART_EXAR_REGB, regb);
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}
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static void exar_eeprom_init(struct exar8250 *priv)
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{
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priv->eeprom.data = priv;
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priv->eeprom.register_read = exar_eeprom_93cx6_reg_read;
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priv->eeprom.register_write = exar_eeprom_93cx6_reg_write;
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priv->eeprom.width = PCI_EEPROM_WIDTH_93C46;
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priv->eeprom.quirks |= PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE;
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}
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/**
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* exar_mpio_config_output() - Configure an Exar MPIO as an output
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* @priv: Device's private structure
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@ -698,20 +732,16 @@ static int cti_plx_int_enable(struct exar8250 *priv)
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*/
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static int cti_read_osc_freq(struct exar8250 *priv, u8 eeprom_offset)
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{
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u16 lower_word;
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u16 upper_word;
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__le16 ee_words[2];
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u32 osc_freq;
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lower_word = exar_ee_read(priv, eeprom_offset);
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// Check if EEPROM word was blank
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if (lower_word == 0xFFFF)
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eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE(ee_words));
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osc_freq = le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16);
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if (osc_freq == CTI_EE_MASK_OSC_FREQ)
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return -EIO;
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upper_word = exar_ee_read(priv, (eeprom_offset + 1));
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if (upper_word == 0xFFFF)
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return -EIO;
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return FIELD_PREP(CTI_EE_MASK_OSC_FREQ_LOWER, lower_word) |
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FIELD_PREP(CTI_EE_MASK_OSC_FREQ_UPPER, upper_word);
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return osc_freq;
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}
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/**
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@ -835,7 +865,7 @@ static enum cti_port_type cti_get_port_type_xr17v35x(struct exar8250 *priv,
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u8 offset;
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offset = CTI_EE_OFF_XR17V35X_PORT_FLAGS + port_num;
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port_flags = exar_ee_read(priv, offset);
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eeprom_93cx6_read(&priv->eeprom, offset, &port_flags);
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port_type = FIELD_GET(CTI_EE_MASK_PORT_FLAGS_TYPE, port_flags);
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if (CTI_PORT_TYPE_VALID(port_type))
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@ -1553,6 +1583,8 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
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if (rc)
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return rc;
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exar_eeprom_init(priv);
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for (i = 0; i < nr_ports && i < maxnr; i++) {
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rc = board->setup(priv, pcidev, &uart, i);
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if (rc) {
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@ -150,6 +150,7 @@ config SERIAL_8250_EXAR
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tristate "8250/16550 Exar/Commtech PCI/PCIe device support"
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depends on SERIAL_8250 && PCI
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select SERIAL_8250_PCILIB
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select EEPROM_93CX6
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default SERIAL_8250
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help
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This builds support for XR17C1xx, XR17V3xx and some Commtech
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