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Xtensa updates for v5.6:

Browse Source 
- reorganize exception vectors placement;
 - small cleanups (drop unused functions/headers/defconfig entries,
   spelling fixes).
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Merge tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensa

Pull xtensa updates from Max Filippov:

 - reorganize exception vectors placement

 - small cleanups (drop unused functions/headers/defconfig entries,
   spelling fixes)

* tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensa:
  xtensa: ISS: improve simcall assembly
  xtensa: reorganize vectors placement
  xtensa: separate SMP and XIP support
  xtensa: move fast exception handlers close to vectors
  arch/xtensa: fix Kconfig typos for HAVE_SMP
  xtensa: clean up optional XCHAL_* definitions
  xtensa: drop unused function fast_coprocessor_double
  xtensa: drop empty platform_* functions from platforms
  xtensa: clean up platform headers
  xtensa: drop set_except_vector declaration
  xtensa: configs: Cleanup old Kconfig IO scheduler options
This commit is contained in:
Linus Torvalds 2020-02-07 12:22:29 -08:00
commit 9b7fa2880f
23 changed files with 142 additions and 140 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
arch/xtensa/Kconfig
View File

@ -180,11 +180,11 @@ config HAVE_SMP
depends on XTENSA_VARIANT_CUSTOM
select XTENSA_MX
help
This option is use to indicate that the system-on-a-chip (SOC)
This option is used to indicate that the system-on-a-chip (SOC)
supports Multiprocessing. Multiprocessor support implemented above
the CPU core definition and currently needs to be selected manually.
Multiprocessor support in implemented with external cache and
Multiprocessor support is implemented with external cache and
interrupt controllers.
The MX interrupt distributer adds Interprocessor Interrupts
@ -572,15 +572,41 @@ config KERNEL_LOAD_ADDRESS
If unsure, leave the default value here.
config VECTORS_OFFSET
hex "Kernel vectors offset"
default 0x00003000
depends on !XIP_KERNEL
choice
prompt "Relocatable vectors location"
default XTENSA_VECTORS_IN_TEXT
help
This is the offset of the kernel image from the relocatable vectors
base.
Choose whether relocatable vectors are merged into the kernel .text
or placed separately at runtime. This option does not affect
configurations without VECBASE register where vectors are always
placed at their hardware-defined locations.
If unsure, leave the default value here.
config XTENSA_VECTORS_IN_TEXT
bool "Merge relocatable vectors into kernel text"
depends on !MTD_XIP
help
This option puts relocatable vectors into the kernel .text section
with proper alignment.
This is a safe choice for most configurations.
config XTENSA_VECTORS_SEPARATE
bool "Put relocatable vectors at fixed address"
help
This option puts relocatable vectors at specific virtual address.
Vectors are merged with the .init data in the kernel image and
are copied into their designated location during kernel startup.
Use it to put vectors into IRAM or out of FLASH on kernels with
XIP-aware MTD support.
endchoice
config VECTORS_ADDR
hex "Kernel vectors virtual address"
default 0x00000000
depends on XTENSA_VECTORS_SEPARATE
help
This is the virtual address of the (relocatable) vectors base.
It must be within KSEG if MMU is used.
config XIP_DATA_ADDR
hex "XIP kernel data virtual address"

2
arch/xtensa/configs/audio_kc705_defconfig
View File

@ -21,8 +21,6 @@ CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_XTENSA_VARIANT_CUSTOM=y
CONFIG_XTENSA_VARIANT_CUSTOM_NAME="test_kc705_hifi"
CONFIG_XTENSA_UNALIGNED_USER=y

2
arch/xtensa/configs/cadence_csp_defconfig
View File

@ -27,8 +27,6 @@ CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_XTENSA_VARIANT_CUSTOM=y
CONFIG_XTENSA_VARIANT_CUSTOM_NAME="csp"
CONFIG_XTENSA_UNALIGNED_USER=y

2
arch/xtensa/configs/generic_kc705_defconfig
View File

@ -21,8 +21,6 @@ CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_XTENSA_VARIANT_DC233C=y
CONFIG_XTENSA_UNALIGNED_USER=y
CONFIG_PREEMPT=y

2
arch/xtensa/configs/iss_defconfig
View File

@ -1,8 +1,6 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EXPERT=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_PCI is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,38400 eth0=tuntap,,tap0 ip=192.168.168.5:192.168.168.1 root=nfs nfsroot=192.168.168.1:/opt/montavista/pro/devkit/xtensa/linux_be/target memmap=128M@0"

2
arch/xtensa/configs/nommu_kc705_defconfig
View File

@ -25,8 +25,6 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_PERF_EVENTS=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_XTENSA_VARIANT_CUSTOM=y
CONFIG_XTENSA_VARIANT_CUSTOM_NAME="de212"
# CONFIG_XTENSA_VARIANT_MMU is not set

3
arch/xtensa/configs/smp_lx200_defconfig
View File

@ -21,8 +21,6 @@ CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_XTENSA_VARIANT_CUSTOM=y
CONFIG_XTENSA_VARIANT_CUSTOM_NAME="test_mmuhifi_c3"
CONFIG_XTENSA_UNALIGNED_USER=y
@ -32,7 +30,6 @@ CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
# CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is not set
# CONFIG_PCI is not set
CONFIG_VECTORS_OFFSET=0x00002000
CONFIG_XTENSA_PLATFORM_XTFPGA=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=96M@0"

1
arch/xtensa/configs/virt_defconfig
View File

@ -19,7 +19,6 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_PERF_EVENTS=y
CONFIG_XTENSA_VARIANT_DC233C=y
CONFIG_XTENSA_UNALIGNED_USER=y
CONFIG_VECTORS_OFFSET=0x00002000
CONFIG_XTENSA_KSEG_512M=y
CONFIG_HIGHMEM=y
CONFIG_CMDLINE_BOOL=y

2
arch/xtensa/include/asm/asmmacro.h
View File

@ -237,4 +237,6 @@
#error Unsupported Xtensa ABI
#endif
#define __XTENSA_HANDLER .section ".exception.text", "ax"
#endif /* _XTENSA_ASMMACRO_H */

8
arch/xtensa/include/asm/core.h
View File

@ -10,10 +10,18 @@
#define XCHAL_HAVE_EXCLUSIVE 0
#endif
#ifndef XCHAL_HAVE_EXTERN_REGS
#define XCHAL_HAVE_EXTERN_REGS 0
#endif
#ifndef XCHAL_HAVE_MPU
#define XCHAL_HAVE_MPU 0
#endif
#ifndef XCHAL_HAVE_VECBASE
#define XCHAL_HAVE_VECBASE 0
#endif
#ifndef XCHAL_SPANNING_WAY
#define XCHAL_SPANNING_WAY 0
#endif

2
arch/xtensa/include/asm/platform.h
View File

@ -12,8 +12,6 @@
#define _XTENSA_PLATFORM_H
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/bootparam.h>
/*

4
arch/xtensa/include/asm/processor.h
View File

@ -237,10 +237,6 @@ extern unsigned long get_wchan(struct task_struct *p);
v; \
})
#ifndef XCHAL_HAVE_EXTERN_REGS
#define XCHAL_HAVE_EXTERN_REGS 0
#endif
#if XCHAL_HAVE_EXTERN_REGS
static inline void set_er(unsigned long value, unsigned long addr)

6
arch/xtensa/include/asm/vectors.h
View File

@ -34,13 +34,13 @@
#endif
#define RESET_VECTOR1_VADDR (XCHAL_RESET_VECTOR1_VADDR)
#ifdef CONFIG_VECTORS_OFFSET
#define VECBASE_VADDR (KERNELOFFSET - CONFIG_VECTORS_OFFSET)
#ifdef CONFIG_VECTORS_ADDR
#define VECBASE_VADDR (CONFIG_VECTORS_ADDR)
#else
#define VECBASE_VADDR _vecbase
#endif
#if defined(XCHAL_HAVE_VECBASE) && XCHAL_HAVE_VECBASE
#if XCHAL_HAVE_VECBASE
#define VECTOR_VADDR(offset) (VECBASE_VADDR + offset)

2
arch/xtensa/include/uapi/asm/setup.h
View File

@ -14,6 +14,4 @@
#define COMMAND_LINE_SIZE 256
extern void set_except_vector(int n, void *addr);
#endif

12
arch/xtensa/kernel/coprocessor.S
View File

@ -58,6 +58,8 @@
.endif; \
.long THREAD_XTREGS_CP##x
__XTENSA_HANDLER
SAVE_CP_REGS(0)
SAVE_CP_REGS(1)
SAVE_CP_REGS(2)
@ -76,7 +78,6 @@
LOAD_CP_REGS(6)
LOAD_CP_REGS(7)
.section ".rodata", "a"
.align 4
.Lsave_cp_regs_jump_table:
SAVE_CP_REGS_TAB(0)
@ -98,8 +99,6 @@
LOAD_CP_REGS_TAB(6)
LOAD_CP_REGS_TAB(7)
.previous
/*
* coprocessor_flush(struct thread_info*, index)
* a2 a3
@ -145,13 +144,6 @@ ENDPROC(coprocessor_flush)
* < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
*/
ENTRY(fast_coprocessor_double)
wsr a0, excsave1
call0 unrecoverable_exception
ENDPROC(fast_coprocessor_double)
ENTRY(fast_coprocessor)
/* Save remaining registers a1-a3 and SAR */

18
arch/xtensa/kernel/entry.S
View File

@ -939,6 +939,9 @@ ENDPROC(unrecoverable_exception)
/* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
__XTENSA_HANDLER
.literal_position
/*
* Fast-handler for alloca exceptions
*
@ -1024,7 +1027,7 @@ ENDPROC(fast_alloca)
ENTRY(fast_illegal_instruction_user)
rsr a0, ps
bbsi.l a0, PS_WOE_BIT, user_exception
bbsi.l a0, PS_WOE_BIT, 1f
s32i a3, a2, PT_AREG3
movi a3, PS_WOE_MASK
or a0, a0, a3
@ -1033,6 +1036,8 @@ ENTRY(fast_illegal_instruction_user)
l32i a0, a2, PT_AREG0
rsr a2, depc
rfe
1:
call0 user_exception
ENDPROC(fast_illegal_instruction_user)
#endif
@ -1071,7 +1076,7 @@ ENTRY(fast_syscall_user)
_beqz a0, fast_syscall_spill_registers
_beqi a0, __NR_xtensa, fast_syscall_xtensa
j user_exception
call0 user_exception
ENDPROC(fast_syscall_user)
@ -1762,8 +1767,8 @@ ENTRY(fast_second_level_miss)
rsr a2, ps
bbsi.l a2, PS_UM_BIT, 1f
j _kernel_exception
1: j _user_exception
call0 _kernel_exception
1: call0 _user_exception
ENDPROC(fast_second_level_miss)
@ -1859,13 +1864,14 @@ ENTRY(fast_store_prohibited)
rsr a2, ps
bbsi.l a2, PS_UM_BIT, 1f
j _kernel_exception
1: j _user_exception
call0 _kernel_exception
1: call0 _user_exception
ENDPROC(fast_store_prohibited)
#endif /* CONFIG_MMU */
.text
/*
* System Calls.
*

5
arch/xtensa/kernel/platform.c
View File

@ -12,12 +12,10 @@
* Chris Zankel <chris@zankel.net>
*/
#include <linux/printk.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/time.h>
#include <asm/platform.h>
#include <asm/timex.h>
#include <asm/param.h> /* HZ */
#define _F(r,f,a,b) \
r __platform_##f a b; \
@ -28,6 +26,7 @@
* (Please, refer to include/asm-xtensa/platform.h for more information)
*/
_F(void, init, (bp_tag_t *first), { });
_F(void, setup, (char** cmd), { });
_F(void, restart, (void), { while(1); });
_F(void, halt, (void), { while(1); });

8
arch/xtensa/kernel/setup.c
View File

@ -284,6 +284,8 @@ extern char _UserExceptionVector_text_start;
extern char _UserExceptionVector_text_end;
extern char _DoubleExceptionVector_text_start;
extern char _DoubleExceptionVector_text_end;
extern char _exception_text_start;
extern char _exception_text_end;
#if XCHAL_EXCM_LEVEL >= 2
extern char _Level2InterruptVector_text_start;
extern char _Level2InterruptVector_text_end;
@ -347,7 +349,7 @@ void __init setup_arch(char **cmdline_p)
mem_reserve(__pa(_xip_start), __pa(_xip_end));
#endif
#ifdef CONFIG_VECTORS_OFFSET
#ifdef CONFIG_VECTORS_ADDR
mem_reserve(__pa(&_WindowVectors_text_start),
__pa(&_WindowVectors_text_end));
@ -363,6 +365,8 @@ void __init setup_arch(char **cmdline_p)
mem_reserve(__pa(&_DoubleExceptionVector_text_start),
__pa(&_DoubleExceptionVector_text_end));
mem_reserve(__pa(&_exception_text_start),
__pa(&_exception_text_end));
#if XCHAL_EXCM_LEVEL >= 2
mem_reserve(__pa(&_Level2InterruptVector_text_start),
__pa(&_Level2InterruptVector_text_end));
@ -384,7 +388,7 @@ void __init setup_arch(char **cmdline_p)
__pa(&_Level6InterruptVector_text_end));
#endif
#endif /* CONFIG_VECTORS_OFFSET */
#endif /* CONFIG_VECTORS_ADDR */
#ifdef CONFIG_SMP
mem_reserve(__pa(&_SecondaryResetVector_text_start),

3
arch/xtensa/kernel/vectors.S
View File

@ -43,6 +43,7 @@
*/
#include <linux/linkage.h>
#include <asm/asmmacro.h>
#include <asm/ptrace.h>
#include <asm/current.h>
#include <asm/asm-offsets.h>
@ -477,7 +478,6 @@ _DoubleExceptionVector_handle_exception:
ENDPROC(_DoubleExceptionVector)
.text
/*
* Fixup handler for TLB miss in double exception handler for window owerflow.
* We get here with windowbase set to the window that was being spilled and
@ -505,6 +505,7 @@ ENDPROC(_DoubleExceptionVector)
* a3: exctable, original value in excsave1
*/
__XTENSA_HANDLER
.literal_position
ENTRY(window_overflow_restore_a0_fixup)

104
arch/xtensa/kernel/vmlinux.lds.S
View File

@ -47,15 +47,20 @@ jiffies = jiffies_64;
LONG(sym ## _end); \
LONG(LOADADDR(section))
#if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE
#define MERGED_VECTORS 1
#else
#define MERGED_VECTORS 0
#endif
/*
* Macro to define a section for a vector. When CONFIG_VECTORS_OFFSET is
* defined code for every vector is located with other init data. At startup
* Macro to define a section for a vector. When MERGED_VECTORS is 0
* code for every vector is located with other init data. At startup
* time head.S copies code for every vector to its final position according
* to description recorded in the corresponding RELOCATE_ENTRY.
*/
#ifdef CONFIG_VECTORS_OFFSET
#define SECTION_VECTOR(sym, section, addr, prevsec) \
#define SECTION_VECTOR4(sym, section, addr, prevsec) \
section addr : AT(((LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
{ \
. = ALIGN(4); \
@ -63,11 +68,10 @@ jiffies = jiffies_64;
*(section) \
sym ## _end = ABSOLUTE(.); \
}
#else
#define SECTION_VECTOR(section, addr) \
#define SECTION_VECTOR2(section, addr) \
. = addr; \
*(section)
#endif
/*
* Mapping of input sections to output sections when linking.
@ -86,30 +90,32 @@ SECTIONS
/* The HEAD_TEXT section must be the first section! */
HEAD_TEXT
#ifndef CONFIG_VECTORS_OFFSET
. = ALIGN(PAGE_SIZE);
_vecbase = .;
#if MERGED_VECTORS
. = ALIGN(PAGE_SIZE);
_vecbase = .;
SECTION_VECTOR (.WindowVectors.text, WINDOW_VECTORS_VADDR)
SECTION_VECTOR2 (.WindowVectors.text, WINDOW_VECTORS_VADDR)
#if XCHAL_EXCM_LEVEL >= 2
SECTION_VECTOR (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
SECTION_VECTOR2 (.Level2InterruptVector.text, INTLEVEL2_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 3
SECTION_VECTOR (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
SECTION_VECTOR2 (.Level3InterruptVector.text, INTLEVEL3_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 4
SECTION_VECTOR (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
SECTION_VECTOR2 (.Level4InterruptVector.text, INTLEVEL4_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 5
SECTION_VECTOR (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
SECTION_VECTOR2 (.Level5InterruptVector.text, INTLEVEL5_VECTOR_VADDR)
#endif
#if XCHAL_EXCM_LEVEL >= 6
SECTION_VECTOR (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
SECTION_VECTOR2 (.Level6InterruptVector.text, INTLEVEL6_VECTOR_VADDR)
#endif
SECTION_VECTOR (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR)
SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
SECTION_VECTOR2 (.DebugInterruptVector.text, DEBUG_VECTOR_VADDR)
SECTION_VECTOR2 (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR)
SECTION_VECTOR2 (.UserExceptionVector.text, USER_VECTOR_VADDR)
SECTION_VECTOR2 (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR)
*(.exception.text)
#endif
IRQENTRY_TEXT
@ -159,7 +165,7 @@ SECTIONS
. = ALIGN(16);
__boot_reloc_table_start = ABSOLUTE(.);
#ifdef CONFIG_VECTORS_OFFSET
#if !MERGED_VECTORS
RELOCATE_ENTRY(_WindowVectors_text,
.WindowVectors.text);
#if XCHAL_EXCM_LEVEL >= 2
@ -190,15 +196,16 @@ SECTIONS
.DoubleExceptionVector.text);
RELOCATE_ENTRY(_DebugInterruptVector_text,
.DebugInterruptVector.text);
RELOCATE_ENTRY(_exception_text,
.exception.text);
#endif
#ifdef CONFIG_XIP_KERNEL
RELOCATE_ENTRY(_xip_data, .data);
RELOCATE_ENTRY(_xip_init_data, .init.data);
#else
#endif
#if defined(CONFIG_SMP)
RELOCATE_ENTRY(_SecondaryResetVector_text,
.SecondaryResetVector.text);
#endif
#endif
__boot_reloc_table_end = ABSOLUTE(.) ;
@ -216,21 +223,24 @@ SECTIONS
. = ALIGN(4);
.dummy : { LONG(0) }
#ifdef CONFIG_VECTORS_OFFSET
#undef LAST
#define LAST .dummy
#if !MERGED_VECTORS
/* The vectors are relocated to the real position at startup time */
SECTION_VECTOR (_WindowVectors_text,
SECTION_VECTOR4 (_WindowVectors_text,
.WindowVectors.text,
WINDOW_VECTORS_VADDR,
.dummy)
SECTION_VECTOR (_DebugInterruptVector_text,
SECTION_VECTOR4 (_DebugInterruptVector_text,
.DebugInterruptVector.text,
DEBUG_VECTOR_VADDR,
.WindowVectors.text)
#undef LAST
#define LAST .DebugInterruptVector.text
#if XCHAL_EXCM_LEVEL >= 2
SECTION_VECTOR (_Level2InterruptVector_text,
SECTION_VECTOR4 (_Level2InterruptVector_text,
.Level2InterruptVector.text,
INTLEVEL2_VECTOR_VADDR,
LAST)
@ -238,7 +248,7 @@ SECTIONS
# define LAST .Level2InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 3
SECTION_VECTOR (_Level3InterruptVector_text,
SECTION_VECTOR4 (_Level3InterruptVector_text,
.Level3InterruptVector.text,
INTLEVEL3_VECTOR_VADDR,
LAST)
@ -246,7 +256,7 @@ SECTIONS
# define LAST .Level3InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 4
SECTION_VECTOR (_Level4InterruptVector_text,
SECTION_VECTOR4 (_Level4InterruptVector_text,
.Level4InterruptVector.text,
INTLEVEL4_VECTOR_VADDR,
LAST)
@ -254,7 +264,7 @@ SECTIONS
# define LAST .Level4InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 5
SECTION_VECTOR (_Level5InterruptVector_text,
SECTION_VECTOR4 (_Level5InterruptVector_text,
.Level5InterruptVector.text,
INTLEVEL5_VECTOR_VADDR,
LAST)
@ -262,41 +272,51 @@ SECTIONS
# define LAST .Level5InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 6
SECTION_VECTOR (_Level6InterruptVector_text,
SECTION_VECTOR4 (_Level6InterruptVector_text,
.Level6InterruptVector.text,
INTLEVEL6_VECTOR_VADDR,
LAST)
# undef LAST
# define LAST .Level6InterruptVector.text
#endif
SECTION_VECTOR (_KernelExceptionVector_text,
SECTION_VECTOR4 (_KernelExceptionVector_text,
.KernelExceptionVector.text,
KERNEL_VECTOR_VADDR,
LAST)
#undef LAST
SECTION_VECTOR (_UserExceptionVector_text,
SECTION_VECTOR4 (_UserExceptionVector_text,
.UserExceptionVector.text,
USER_VECTOR_VADDR,
.KernelExceptionVector.text)
SECTION_VECTOR (_DoubleExceptionVector_text,
SECTION_VECTOR4 (_DoubleExceptionVector_text,
.DoubleExceptionVector.text,
DOUBLEEXC_VECTOR_VADDR,
.UserExceptionVector.text)
. = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
#define LAST .DoubleExceptionVector.text
#endif
#if !defined(CONFIG_XIP_KERNEL) && defined(CONFIG_SMP)
#if defined(CONFIG_SMP)
SECTION_VECTOR (_SecondaryResetVector_text,
SECTION_VECTOR4 (_SecondaryResetVector_text,
.SecondaryResetVector.text,
RESET_VECTOR1_VADDR,
.DoubleExceptionVector.text)
. = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);
LAST)
#undef LAST
#define LAST .SecondaryResetVector.text
#endif
#if !MERGED_VECTORS
SECTION_VECTOR4 (_exception_text,
.exception.text,
,
LAST)
#undef LAST
#define LAST .exception.text
#endif
. = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3;
.dummy1 : AT(ADDR(.dummy1)) { LONG(0) }
. = ALIGN(PAGE_SIZE);
#ifndef CONFIG_XIP_KERNEL
@ -314,7 +334,7 @@ SECTIONS
#undef LOAD_OFFSET
#define LOAD_OFFSET \
(CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy) + SIZEOF(.dummy) + 3) & ~ 3)
(CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3)
_xip_data_start = .;
_sdata = .;

8
arch/xtensa/platforms/iss/include/platform/simcall.h
View File

@ -66,19 +66,17 @@ static int errno;
static inline int __simc(int a, int b, int c, int d)
{
int ret;
register int a1 asm("a2") = a;
register int b1 asm("a3") = b;
register int c1 asm("a4") = c;
register int d1 asm("a5") = d;
__asm__ __volatile__ (
"simcall\n"
"mov %0, a2\n"
"mov %1, a3\n"
: "=a" (ret), "=a" (errno), "+r"(a1), "+r"(b1)
: "+r"(a1), "+r"(b1)
: "r"(c1), "r"(d1)
: "memory");
return ret;
errno = b1;
return a1;
}
static inline int simc_exit(int exit_code)

25
arch/xtensa/platforms/iss/setup.c
View File

@ -11,32 +11,18 @@
* Copyright 2001 - 2005 Tensilica Inc.
* Copyright 2017 Cadence Design Systems Inc.
*/
#include <linux/memblock.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
#include <linux/major.h>
#include <linux/blkdev.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/stringify.h>
#include <linux/kernel.h>
#include <linux/notifier.h>
#include <linux/printk.h>
#include <linux/string.h>
#include <asm/platform.h>
#include <asm/bootparam.h>
#include <asm/setup.h>
#include <platform/simcall.h>
void __init platform_init(bp_tag_t* bootparam)
{
}
void platform_halt(void)
{
pr_info(" ** Called platform_halt() **\n");
@ -48,6 +34,7 @@ void platform_power_off(void)
pr_info(" ** Called platform_power_off() **\n");
simc_exit(0);
}
void platform_restart(void)
{
/* Flush and reset the mmu, simulate a processor reset, and
@ -56,10 +43,6 @@ void platform_restart(void)
/* control never gets here */
}
void platform_heartbeat(void)
{
}
static int
iss_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
{

17
arch/xtensa/platforms/xtfpga/setup.c
View File

@ -24,6 +24,7 @@
#include <linux/of.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
#include <linux/slab.h>
#include <asm/timex.h>
#include <asm/processor.h>
@ -56,22 +57,6 @@ void platform_restart(void)
/* control never gets here */
}
void __init platform_setup(char **cmdline)
{
}
/* early initialization */
void __init platform_init(bp_tag_t *first)
{
}
/* Heartbeat. */
void platform_heartbeat(void)
{
}
#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
void __init platform_calibrate_ccount(void)