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mtd: nand: Clarify Kconfig entry for software Hamming ECC entries
The software Hamming ECC correction implementation is referred as MTD_NAND_ECC which is too generic. Rename it MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an SMC quirk in the Hamming implementation as MTD_NAND_ECC_SW_HAMMING_SMC. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -53,7 +53,7 @@ CONFIG_MTD_BLOCK=y
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CONFIG_MTD_ONENAND=y
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CONFIG_MTD_ONENAND_VERIFY_WRITE=y
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CONFIG_MTD_ONENAND_GENERIC=y
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CONFIG_MTD_NAND_ECC_SMC=y
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CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_FSMC=y
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CONFIG_BLK_DEV_LOOP=y
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@ -15,7 +15,7 @@ CONFIG_MTD=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_ECC_SW_HAMMING=y
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CONFIG_MTD_NAND_ECC_SW_BCH=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_GPIO=y
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@ -35,7 +35,7 @@ CONFIG_MTD=y
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CONFIG_MTD_CFI=y
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CONFIG_MTD_CFI_AMDSTD=y
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CONFIG_MTD_PHYSMAP_OF=y
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CONFIG_MTD_NAND_ECC_SMC=y
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CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_FSL_UPM=y
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CONFIG_BLK_DEV_LOOP=y
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@ -230,12 +230,11 @@ config SSFDC
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This enables read only access to SmartMedia formatted NAND
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flash. You can mount it with FAT file system.
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config SM_FTL
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tristate "SmartMedia/xD new translation layer"
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depends on BLOCK
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select MTD_BLKDEVS
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select MTD_NAND_ECC
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select MTD_NAND_ECC_SW_HAMMING
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help
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This enables EXPERIMENTAL R/W support for SmartMedia/xD
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FTL (Flash translation layer).
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@ -1,20 +1,19 @@
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config MTD_NAND_ECC
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config MTD_NAND_ECC_SW_HAMMING
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tristate
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config MTD_NAND_ECC_SMC
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config MTD_NAND_ECC_SW_HAMMING_SMC
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bool "NAND ECC Smart Media byte order"
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depends on MTD_NAND_ECC
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depends on MTD_NAND_ECC_SW_HAMMING
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default n
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help
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Software ECC according to the Smart Media Specification.
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The original Linux implementation had byte 0 and 1 swapped.
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menuconfig MTD_NAND
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tristate "Raw/Parallel NAND Device Support"
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depends on MTD
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select MTD_NAND_ECC
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select MTD_NAND_CORE
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select MTD_NAND_ECC_SW_HAMMING
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help
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This enables support for accessing all type of raw/parallel
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NAND flash devices. For further information see
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@ -132,7 +131,7 @@ config MTD_NAND_S3C2410_DEBUG
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config MTD_NAND_NDFC
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tristate "NDFC NanD Flash Controller"
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depends on 4xx
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select MTD_NAND_ECC_SMC
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select MTD_NAND_ECC_SW_HAMMING_SMC
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help
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NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_MTD_NAND) += nand.o
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obj-$(CONFIG_MTD_NAND_ECC) += nand_ecc.o
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obj-$(CONFIG_MTD_NAND_ECC_SW_HAMMING) += nand_ecc.o
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obj-$(CONFIG_MTD_NAND_ECC_SW_BCH) += nand_bch.o
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obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
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@ -5081,7 +5081,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
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ecc->bytes = 3;
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ecc->strength = 1;
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if (IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC))
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if (IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC))
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ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER;
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return 0;
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@ -222,17 +222,17 @@ static int sm_correct_sector(uint8_t *buffer, struct sm_oob *oob)
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uint8_t ecc[3];
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__nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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if (__nand_correct_data(buffer, ecc, oob->ecc1, SM_SMALL_PAGE,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)) < 0)
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)) < 0)
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return -EIO;
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buffer += SM_SMALL_PAGE;
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__nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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if (__nand_correct_data(buffer, ecc, oob->ecc2, SM_SMALL_PAGE,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)) < 0)
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)) < 0)
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return -EIO;
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return 0;
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}
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@ -399,11 +399,11 @@ static int sm_write_block(struct sm_ftl *ftl, uint8_t *buf,
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if (ftl->smallpagenand) {
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__nand_calculate_ecc(buf + boffset, SM_SMALL_PAGE,
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oob.ecc1,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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__nand_calculate_ecc(buf + boffset + SM_SMALL_PAGE,
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SM_SMALL_PAGE, oob.ecc2,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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}
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if (!sm_write_sector(ftl, zone, block, boffset,
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buf + boffset, &oob))
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@ -122,9 +122,9 @@ static int no_bit_error_verify(void *error_data, void *error_ecc,
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int ret;
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__nand_calculate_ecc(error_data, size, calc_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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if (ret == 0 && !memcmp(correct_data, error_data, size))
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return 0;
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@ -152,9 +152,9 @@ static int single_bit_error_correct(void *error_data, void *error_ecc,
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int ret;
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__nand_calculate_ecc(error_data, size, calc_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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if (ret == 1 && !memcmp(correct_data, error_data, size))
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return 0;
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@ -189,9 +189,9 @@ static int double_bit_error_detect(void *error_data, void *error_ecc,
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int ret;
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__nand_calculate_ecc(error_data, size, calc_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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return (ret == -EBADMSG) ? 0 : -EINVAL;
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}
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@ -266,7 +266,7 @@ static int nand_ecc_test_run(const size_t size)
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prandom_bytes(correct_data, size);
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__nand_calculate_ecc(correct_data, size, correct_ecc,
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC));
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IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC));
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for (i = 0; i < ARRAY_SIZE(nand_ecc_test); i++) {
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nand_ecc_test[i].prepare(error_data, error_ecc,
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