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media: atomisp: Remove unused GPIO related defines and APIs
Remove unused GPIO related defines and APIs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240424210800.1776038-1-andriy.shevchenko@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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@ -16,27 +16,10 @@
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#ifndef _gpio_block_defs_h_
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#define _gpio_block_defs_h_
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#define _HRT_GPIO_BLOCK_REG_ALIGN 4
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/* R/W registers */
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#define _gpio_block_reg_do_e 0
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#define _gpio_block_reg_do_select 1
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#define _gpio_block_reg_do_0 2
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#define _gpio_block_reg_do_1 3
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#define _gpio_block_reg_do_pwm_cnt_0 4
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#define _gpio_block_reg_do_pwm_cnt_1 5
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#define _gpio_block_reg_do_pwm_cnt_2 6
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#define _gpio_block_reg_do_pwm_cnt_3 7
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#define _gpio_block_reg_do_pwm_main_cnt 8
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#define _gpio_block_reg_do_pwm_enable 9
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#define _gpio_block_reg_di_debounce_sel 10
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#define _gpio_block_reg_di_debounce_cnt_0 11
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#define _gpio_block_reg_di_debounce_cnt_1 12
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#define _gpio_block_reg_di_debounce_cnt_2 13
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#define _gpio_block_reg_di_debounce_cnt_3 14
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#define _gpio_block_reg_di_active_level 15
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/* read-only registers */
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#define _gpio_block_reg_di 16
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#endif /* _gpio_block_defs_h_ */
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@ -16,31 +16,8 @@
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#ifndef __GPIO_GLOBAL_H_INCLUDED__
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#define __GPIO_GLOBAL_H_INCLUDED__
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#define IS_GPIO_VERSION_1
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#include <gpio_block_defs.h>
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/* pqiao: following part only defines in hive_isp_css_defs.h in fpga system.
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port it here
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*/
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/* GPIO pin defines */
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/*#define HIVE_GPIO_CAMERA_BOARD_RESET_PIN_NR 0
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#define HIVE_GPIO_LCD_CLOCK_SELECT_PIN_NR 7
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#define HIVE_GPIO_HDMI_CLOCK_SELECT_PIN_NR 8
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#define HIVE_GPIO_LCD_VERT_FLIP_PIN_NR 8
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#define HIVE_GPIO_LCD_HOR_FLIP_PIN_NR 9
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#define HIVE_GPIO_AS3683_GPIO_P0_PIN_NR 1
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#define HIVE_GPIO_AS3683_DATA_P1_PIN_NR 2
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#define HIVE_GPIO_AS3683_CLK_P2_PIN_NR 3
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#define HIVE_GPIO_AS3683_T1_F0_PIN_NR 4
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#define HIVE_GPIO_AS3683_SFL_F1_PIN_NR 5
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#define HIVE_GPIO_AS3683_STROBE_F2_PIN_NR 6
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#define HIVE_GPIO_MAX1577_EN1_PIN_NR 1
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#define HIVE_GPIO_MAX1577_EN2_PIN_NR 2
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#define HIVE_GPIO_MAX8685A_EN_PIN_NR 3
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#define HIVE_GPIO_MAX8685A_TRIG_PIN_NR 4*/
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#define HIVE_GPIO_STROBE_TRIGGER_PIN 2
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#endif /* __GPIO_GLOBAL_H_INCLUDED__ */
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@ -1,21 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2010-2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __GPIO_LOCAL_H_INCLUDED__
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#define __GPIO_LOCAL_H_INCLUDED__
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#include "gpio_global.h"
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#endif /* __GPIO_LOCAL_H_INCLUDED__ */
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@ -16,13 +16,10 @@
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#ifndef __GPIO_PRIVATE_H_INCLUDED__
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#define __GPIO_PRIVATE_H_INCLUDED__
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#include "gpio_public.h"
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#include "assert_support.h"
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#include "device_access.h"
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#include "assert_support.h"
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STORAGE_CLASS_GPIO_C void gpio_reg_store(
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static inline void gpio_reg_store(
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const gpio_ID_t ID,
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const unsigned int reg,
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const hrt_data value)
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@ -33,7 +30,7 @@ STORAGE_CLASS_GPIO_C void gpio_reg_store(
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return;
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}
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STORAGE_CLASS_GPIO_C hrt_data gpio_reg_load(
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static inline hrt_data gpio_reg_load(
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const gpio_ID_t ID,
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const unsigned int reg)
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{
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@ -1,46 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __GPIO_H_INCLUDED__
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#define __GPIO_H_INCLUDED__
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/*
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* This file is included on every cell {SP,ISP,host} and on every system
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* that uses the input system device(s). It defines the API to DLI bridge
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*
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* System and cell specific interfaces and inline code are included
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* conditionally through Makefile path settings.
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*
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* - . system and cell agnostic interfaces, constants and identifiers
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* - public: system agnostic, cell specific interfaces
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* - private: system dependent, cell specific interfaces & inline implementations
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* - global: system specific constants and identifiers
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* - local: system and cell specific constants and identifiers
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*/
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#include "system_local.h"
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#include "gpio_local.h"
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#ifndef __INLINE_GPIO__
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#define STORAGE_CLASS_GPIO_H extern
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#define STORAGE_CLASS_GPIO_C
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#include "gpio_public.h"
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#else /* __INLINE_GPIO__ */
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#define STORAGE_CLASS_GPIO_H static inline
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#define STORAGE_CLASS_GPIO_C static inline
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#include "gpio_private.h"
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#endif /* __INLINE_GPIO__ */
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#endif /* __GPIO_H_INCLUDED__ */
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@ -1,46 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __GPIO_PUBLIC_H_INCLUDED__
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#define __GPIO_PUBLIC_H_INCLUDED__
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#include "system_local.h"
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/*! Write to a control register of GPIO[ID]
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\param ID[in] GPIO identifier
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\param reg_addr[in] register byte address
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\param value[in] The data to be written
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\return none, GPIO[ID].ctrl[reg] = value
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*/
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STORAGE_CLASS_GPIO_H void gpio_reg_store(
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const gpio_ID_t ID,
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const unsigned int reg_addr,
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const hrt_data value);
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/*! Read from a control register of GPIO[ID]
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\param ID[in] GPIO identifier
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\param reg_addr[in] register byte address
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\param value[in] The data to be written
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\return GPIO[ID].ctrl[reg]
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*/
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STORAGE_CLASS_GPIO_H hrt_data gpio_reg_load(
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const gpio_ID_t ID,
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const unsigned int reg_addr);
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#endif /* __GPIO_PUBLIC_H_INCLUDED__ */
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@ -66,8 +66,8 @@
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#include "sp.h" /* cnd_sp_irq_enable() */
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#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */
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#include "gp_device.h" /* gp_device_reg_store() */
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#define __INLINE_GPIO__
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#include "gpio.h"
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#include <gpio_global.h>
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#include <gpio_private.h>
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#include "timed_ctrl.h"
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#include "ia_css_inputfifo.h"
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#define WITH_PC_MONITORING 0
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@ -1363,10 +1363,8 @@ ia_css_init(struct device *dev, const struct ia_css_env *env,
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ia_css_device_access_init(&env->hw_access_env);
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select = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_select)
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& (~GPIO_FLASH_PIN_MASK);
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enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e)
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select = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_select) & ~GPIO_FLASH_PIN_MASK;
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enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e) | GPIO_FLASH_PIN_MASK;
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sh_css_mmu_set_page_table_base_index(mmu_l1_base);
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my_css_save.mmu_base = mmu_l1_base;
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