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just two driver fixes

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Merge tag 'i2c-for-6.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:
 "Just two driver fixes"

* tag 'i2c-for-6.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: ocores: generate stop condition after timeout in polling mode
  i2c: mchp-pci1xxxx: Update Timing registers
This commit is contained in:
Linus Torvalds 2023-04-15 11:06:49 -07:00
commit a7a55e27ad
2 changed files with 49 additions and 46 deletions
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60
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
View File

@ -48,9 +48,9 @@
* SR_HOLD_TIME_XK_TICKS field will indicate the number of ticks of the * SR_HOLD_TIME_XK_TICKS field will indicate the number of ticks of the
* baud clock required to program 'Hold Time' at X KHz. * baud clock required to program 'Hold Time' at X KHz.
*/ */
#define SR_HOLD_TIME_100K_TICKS 133 #define SR_HOLD_TIME_100K_TICKS 150
#define SR_HOLD_TIME_400K_TICKS 20 #define SR_HOLD_TIME_400K_TICKS 20
#define SR_HOLD_TIME_1000K_TICKS 11 #define SR_HOLD_TIME_1000K_TICKS 12
#define SMB_CORE_COMPLETION_REG_OFF3 (SMBUS_MAST_CORE_ADDR_BASE + 0x23) #define SMB_CORE_COMPLETION_REG_OFF3 (SMBUS_MAST_CORE_ADDR_BASE + 0x23)
@ -65,17 +65,17 @@
* the baud clock required to program 'fair idle delay' at X KHz. Fair idle * the baud clock required to program 'fair idle delay' at X KHz. Fair idle
* delay establishes the MCTP T(IDLE_DELAY) period. * delay establishes the MCTP T(IDLE_DELAY) period.
*/ */
#define FAIR_BUS_IDLE_MIN_100K_TICKS 969 #define FAIR_BUS_IDLE_MIN_100K_TICKS 992
#define FAIR_BUS_IDLE_MIN_400K_TICKS 157 #define FAIR_BUS_IDLE_MIN_400K_TICKS 500
#define FAIR_BUS_IDLE_MIN_1000K_TICKS 157 #define FAIR_BUS_IDLE_MIN_1000K_TICKS 500
/* /*
* FAIR_IDLE_DELAY_XK_TICKS field will indicate the number of ticks of the * FAIR_IDLE_DELAY_XK_TICKS field will indicate the number of ticks of the
* baud clock required to satisfy the fairness protocol at X KHz. * baud clock required to satisfy the fairness protocol at X KHz.
*/ */
#define FAIR_IDLE_DELAY_100K_TICKS 1000 #define FAIR_IDLE_DELAY_100K_TICKS 963
#define FAIR_IDLE_DELAY_400K_TICKS 500 #define FAIR_IDLE_DELAY_400K_TICKS 156
#define FAIR_IDLE_DELAY_1000K_TICKS 500 #define FAIR_IDLE_DELAY_1000K_TICKS 156
#define SMB_IDLE_SCALING_100K \ #define SMB_IDLE_SCALING_100K \
((FAIR_IDLE_DELAY_100K_TICKS << 16) | FAIR_BUS_IDLE_MIN_100K_TICKS) ((FAIR_IDLE_DELAY_100K_TICKS << 16) | FAIR_BUS_IDLE_MIN_100K_TICKS)
@ -105,7 +105,7 @@
*/ */
#define BUS_CLK_100K_LOW_PERIOD_TICKS 156 #define BUS_CLK_100K_LOW_PERIOD_TICKS 156
#define BUS_CLK_400K_LOW_PERIOD_TICKS 41 #define BUS_CLK_400K_LOW_PERIOD_TICKS 41
#define BUS_CLK_1000K_LOW_PERIOD_TICKS 15 #define BUS_CLK_1000K_LOW_PERIOD_TICKS 15
/* /*
* BUS_CLK_XK_HIGH_PERIOD_TICKS field defines the number of I2C Baud Clock * BUS_CLK_XK_HIGH_PERIOD_TICKS field defines the number of I2C Baud Clock
@ -131,7 +131,7 @@
*/ */
#define CLK_SYNC_100K 4 #define CLK_SYNC_100K 4
#define CLK_SYNC_400K 4 #define CLK_SYNC_400K 4
#define CLK_SYNC_1000K 4 #define CLK_SYNC_1000K 4
#define SMB_CORE_DATA_TIMING_REG_OFF (SMBUS_MAST_CORE_ADDR_BASE + 0x40) #define SMB_CORE_DATA_TIMING_REG_OFF (SMBUS_MAST_CORE_ADDR_BASE + 0x40)
@ -142,25 +142,25 @@
* determines the SCLK hold time following SDAT driven low during the first * determines the SCLK hold time following SDAT driven low during the first
* START bit in a transfer. * START bit in a transfer.
*/ */
#define FIRST_START_HOLD_100K_TICKS 22 #define FIRST_START_HOLD_100K_TICKS 23
#define FIRST_START_HOLD_400K_TICKS 16 #define FIRST_START_HOLD_400K_TICKS 8
#define FIRST_START_HOLD_1000K_TICKS 6 #define FIRST_START_HOLD_1000K_TICKS 12
/* /*
* STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock * STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
* required to program 'STOP_SETUP' timer at X KHz. This timer determines the * required to program 'STOP_SETUP' timer at X KHz. This timer determines the
* SDAT setup time from the rising edge of SCLK for a STOP condition. * SDAT setup time from the rising edge of SCLK for a STOP condition.
*/ */
#define STOP_SETUP_100K_TICKS 157 #define STOP_SETUP_100K_TICKS 150
#define STOP_SETUP_400K_TICKS 20 #define STOP_SETUP_400K_TICKS 20
#define STOP_SETUP_1000K_TICKS 12 #define STOP_SETUP_1000K_TICKS 12
/* /*
* RESTART_SETUP_XK_TICKS will indicate the number of ticks of the baud clock * RESTART_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
* required to program 'RESTART_SETUP' timer at X KHz. This timer determines the * required to program 'RESTART_SETUP' timer at X KHz. This timer determines the
* SDAT setup time from the rising edge of SCLK for a repeated START condition. * SDAT setup time from the rising edge of SCLK for a repeated START condition.
*/ */
#define RESTART_SETUP_100K_TICKS 157 #define RESTART_SETUP_100K_TICKS 156
#define RESTART_SETUP_400K_TICKS 20 #define RESTART_SETUP_400K_TICKS 20
#define RESTART_SETUP_1000K_TICKS 12 #define RESTART_SETUP_1000K_TICKS 12
@ -169,7 +169,7 @@
* required to program 'DATA_HOLD' timer at X KHz. This timer determines the * required to program 'DATA_HOLD' timer at X KHz. This timer determines the
* SDAT hold time following SCLK driven low. * SDAT hold time following SCLK driven low.
*/ */
#define DATA_HOLD_100K_TICKS 2 #define DATA_HOLD_100K_TICKS 12
#define DATA_HOLD_400K_TICKS 2 #define DATA_HOLD_400K_TICKS 2
#define DATA_HOLD_1000K_TICKS 2 #define DATA_HOLD_1000K_TICKS 2
@ -190,35 +190,35 @@
* Bus Idle Minimum time = BUS_IDLE_MIN[7:0] x Baud_Clock_Period x * Bus Idle Minimum time = BUS_IDLE_MIN[7:0] x Baud_Clock_Period x
* (BUS_IDLE_MIN_XK_TICKS[7] ? 4,1) * (BUS_IDLE_MIN_XK_TICKS[7] ? 4,1)
*/ */
#define BUS_IDLE_MIN_100K_TICKS 167UL #define BUS_IDLE_MIN_100K_TICKS 36UL
#define BUS_IDLE_MIN_400K_TICKS 139UL #define BUS_IDLE_MIN_400K_TICKS 10UL
#define BUS_IDLE_MIN_1000K_TICKS 133UL #define BUS_IDLE_MIN_1000K_TICKS 4UL
/* /*
* CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out. * CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out.
* SMBus Controller Cumulative Time-Out duration = * SMBus Controller Cumulative Time-Out duration =
* CTRL_CUM_TIME_OUT_XK_TICKS[7:0] x Baud_Clock_Period x 2048 * CTRL_CUM_TIME_OUT_XK_TICKS[7:0] x Baud_Clock_Period x 2048
*/ */
#define CTRL_CUM_TIME_OUT_100K_TICKS 159 #define CTRL_CUM_TIME_OUT_100K_TICKS 76
#define CTRL_CUM_TIME_OUT_400K_TICKS 159 #define CTRL_CUM_TIME_OUT_400K_TICKS 76
#define CTRL_CUM_TIME_OUT_1000K_TICKS 159 #define CTRL_CUM_TIME_OUT_1000K_TICKS 76
/* /*
* TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration. * TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration.
* SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x * SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x
* Baud_Clock_Period x 4096 * Baud_Clock_Period x 4096
*/ */
#define TARGET_CUM_TIME_OUT_100K_TICKS 199 #define TARGET_CUM_TIME_OUT_100K_TICKS 95
#define TARGET_CUM_TIME_OUT_400K_TICKS 199 #define TARGET_CUM_TIME_OUT_400K_TICKS 95
#define TARGET_CUM_TIME_OUT_1000K_TICKS 199 #define TARGET_CUM_TIME_OUT_1000K_TICKS 95
/* /*
* CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period. * CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period.
* Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8 * Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8
*/ */
#define CLOCK_HIGH_TIME_OUT_100K_TICKS 204 #define CLOCK_HIGH_TIME_OUT_100K_TICKS 97
#define CLOCK_HIGH_TIME_OUT_400K_TICKS 204 #define CLOCK_HIGH_TIME_OUT_400K_TICKS 97
#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 204 #define CLOCK_HIGH_TIME_OUT_1000K_TICKS 97
#define TO_SCALING_100K \ #define TO_SCALING_100K \
((BUS_IDLE_MIN_100K_TICKS << 24) | (CTRL_CUM_TIME_OUT_100K_TICKS << 16) | \ ((BUS_IDLE_MIN_100K_TICKS << 24) | (CTRL_CUM_TIME_OUT_100K_TICKS << 16) | \

35
drivers/i2c/busses/i2c-ocores.c
View File

@ -342,18 +342,18 @@ static int ocores_poll_wait(struct ocores_i2c *i2c)
* ocores_isr(), we just add our polling code around it. * ocores_isr(), we just add our polling code around it.
* *
* It can run in atomic context * It can run in atomic context
*
* Return: 0 on success, -ETIMEDOUT on timeout
*/ */
static void ocores_process_polling(struct ocores_i2c *i2c) static int ocores_process_polling(struct ocores_i2c *i2c)
{ {
while (1) { irqreturn_t ret;
irqreturn_t ret; int err = 0;
int err;
while (1) {
err = ocores_poll_wait(i2c); err = ocores_poll_wait(i2c);
if (err) { if (err)
i2c->state = STATE_ERROR;
break; /* timeout */ break; /* timeout */
}
ret = ocores_isr(-1, i2c); ret = ocores_isr(-1, i2c);
if (ret == IRQ_NONE) if (ret == IRQ_NONE)
@ -364,13 +364,15 @@ static void ocores_process_polling(struct ocores_i2c *i2c)
break; break;
} }
} }
return err;
} }
static int ocores_xfer_core(struct ocores_i2c *i2c, static int ocores_xfer_core(struct ocores_i2c *i2c,
struct i2c_msg *msgs, int num, struct i2c_msg *msgs, int num,
bool polling) bool polling)
{ {
int ret; int ret = 0;
u8 ctrl; u8 ctrl;
ctrl = oc_getreg(i2c, OCI2C_CONTROL); ctrl = oc_getreg(i2c, OCI2C_CONTROL);
@ -388,15 +390,16 @@ static int ocores_xfer_core(struct ocores_i2c *i2c,
oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
if (polling) { if (polling) {
ocores_process_polling(i2c); ret = ocores_process_polling(i2c);
} else { } else {
ret = wait_event_timeout(i2c->wait, if (wait_event_timeout(i2c->wait,
(i2c->state == STATE_ERROR) || (i2c->state == STATE_ERROR) ||
(i2c->state == STATE_DONE), HZ); (i2c->state == STATE_DONE), HZ) == 0)
if (ret == 0) { ret = -ETIMEDOUT;
ocores_process_timeout(i2c); }
return -ETIMEDOUT; if (ret) {
} ocores_process_timeout(i2c);
return ret;
} }
return (i2c->state == STATE_DONE) ? num : -EIO; return (i2c->state == STATE_DONE) ? num : -EIO;