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drm/amdgpu: setup the shared and private apertures on gfx9
Same as previous asics. This was not yet set for gfx9. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1529,11 +1529,18 @@ static void gfx_v9_0_gpu_init(struct amdgpu_device *adev)
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for (i = 0; i < 16; i++) {
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soc15_grbm_select(adev, 0, 0, 0, i);
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/* CP and shaders */
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tmp = 0;
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tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE,
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if (i == 0) {
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tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
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SH_MEM_ALIGNMENT_MODE_UNALIGNED);
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WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
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WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0);
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} else {
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tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
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SH_MEM_ALIGNMENT_MODE_UNALIGNED);
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WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
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tmp = adev->mc.shared_aperture_start >> 48;
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WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp);
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}
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}
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soc15_grbm_select(adev, 0, 0, 0, 0);
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@ -499,6 +499,14 @@ static int gmc_v9_0_early_init(void *handle)
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gmc_v9_0_set_gart_funcs(adev);
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gmc_v9_0_set_irq_funcs(adev);
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adev->mc.shared_aperture_start = 0x2000000000000000ULL;
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adev->mc.shared_aperture_end =
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adev->mc.shared_aperture_start + (4ULL << 30) - 1;
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adev->mc.private_aperture_start =
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adev->mc.shared_aperture_end + 1;
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adev->mc.private_aperture_end =
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adev->mc.private_aperture_start + (4ULL << 30) - 1;
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return 0;
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}
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