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ptp: support DPAA FMan 1588 timer in ptp_qoriq
This patch is to support DPAA (Data Path Acceleration Architecture) 1588 timer by adding "fsl,fman-ptp-timer" compatible, sharing interrupt with FMan, adding FSL_DPAA_ETH dependency, and fixing up register offset. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
c401530256
commit
a8f62d0c6f
@ -43,7 +43,7 @@ config PTP_1588_CLOCK_DTE
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config PTP_1588_CLOCK_QORIQ
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tristate "Freescale QorIQ 1588 timer as PTP clock"
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depends on GIANFAR
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depends on GIANFAR || FSL_DPAA_ETH
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depends on PTP_1588_CLOCK
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default y
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help
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@ -39,11 +39,12 @@
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/* Caller must hold qoriq_ptp->lock. */
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static u64 tmr_cnt_read(struct qoriq_ptp *qoriq_ptp)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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u64 ns;
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u32 lo, hi;
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lo = qoriq_read(&qoriq_ptp->regs->tmr_cnt_l);
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hi = qoriq_read(&qoriq_ptp->regs->tmr_cnt_h);
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lo = qoriq_read(®s->ctrl_regs->tmr_cnt_l);
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hi = qoriq_read(®s->ctrl_regs->tmr_cnt_h);
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ns = ((u64) hi) << 32;
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ns |= lo;
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return ns;
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@ -52,16 +53,18 @@ static u64 tmr_cnt_read(struct qoriq_ptp *qoriq_ptp)
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/* Caller must hold qoriq_ptp->lock. */
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static void tmr_cnt_write(struct qoriq_ptp *qoriq_ptp, u64 ns)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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u32 hi = ns >> 32;
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u32 lo = ns & 0xffffffff;
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qoriq_write(&qoriq_ptp->regs->tmr_cnt_l, lo);
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qoriq_write(&qoriq_ptp->regs->tmr_cnt_h, hi);
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qoriq_write(®s->ctrl_regs->tmr_cnt_l, lo);
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qoriq_write(®s->ctrl_regs->tmr_cnt_h, hi);
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}
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/* Caller must hold qoriq_ptp->lock. */
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static void set_alarm(struct qoriq_ptp *qoriq_ptp)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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u64 ns;
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u32 lo, hi;
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@ -70,16 +73,18 @@ static void set_alarm(struct qoriq_ptp *qoriq_ptp)
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ns -= qoriq_ptp->tclk_period;
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hi = ns >> 32;
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lo = ns & 0xffffffff;
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qoriq_write(&qoriq_ptp->regs->tmr_alarm1_l, lo);
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qoriq_write(&qoriq_ptp->regs->tmr_alarm1_h, hi);
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qoriq_write(®s->alarm_regs->tmr_alarm1_l, lo);
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qoriq_write(®s->alarm_regs->tmr_alarm1_h, hi);
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}
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/* Caller must hold qoriq_ptp->lock. */
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static void set_fipers(struct qoriq_ptp *qoriq_ptp)
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{
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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set_alarm(qoriq_ptp);
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qoriq_write(&qoriq_ptp->regs->tmr_fiper1, qoriq_ptp->tmr_fiper1);
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qoriq_write(&qoriq_ptp->regs->tmr_fiper2, qoriq_ptp->tmr_fiper2);
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qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1);
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qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2);
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}
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/*
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@ -89,16 +94,17 @@ static void set_fipers(struct qoriq_ptp *qoriq_ptp)
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static irqreturn_t isr(int irq, void *priv)
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{
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struct qoriq_ptp *qoriq_ptp = priv;
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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struct ptp_clock_event event;
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u64 ns;
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u32 ack = 0, lo, hi, mask, val;
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val = qoriq_read(&qoriq_ptp->regs->tmr_tevent);
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val = qoriq_read(®s->ctrl_regs->tmr_tevent);
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if (val & ETS1) {
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ack |= ETS1;
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hi = qoriq_read(&qoriq_ptp->regs->tmr_etts1_h);
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lo = qoriq_read(&qoriq_ptp->regs->tmr_etts1_l);
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hi = qoriq_read(®s->etts_regs->tmr_etts1_h);
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lo = qoriq_read(®s->etts_regs->tmr_etts1_l);
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event.type = PTP_CLOCK_EXTTS;
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event.index = 0;
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event.timestamp = ((u64) hi) << 32;
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@ -108,8 +114,8 @@ static irqreturn_t isr(int irq, void *priv)
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if (val & ETS2) {
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ack |= ETS2;
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hi = qoriq_read(&qoriq_ptp->regs->tmr_etts2_h);
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lo = qoriq_read(&qoriq_ptp->regs->tmr_etts2_l);
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hi = qoriq_read(®s->etts_regs->tmr_etts2_h);
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lo = qoriq_read(®s->etts_regs->tmr_etts2_l);
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event.type = PTP_CLOCK_EXTTS;
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event.index = 1;
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event.timestamp = ((u64) hi) << 32;
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@ -130,16 +136,16 @@ static irqreturn_t isr(int irq, void *priv)
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hi = ns >> 32;
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lo = ns & 0xffffffff;
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spin_lock(&qoriq_ptp->lock);
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qoriq_write(&qoriq_ptp->regs->tmr_alarm2_l, lo);
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qoriq_write(&qoriq_ptp->regs->tmr_alarm2_h, hi);
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qoriq_write(®s->alarm_regs->tmr_alarm2_l, lo);
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qoriq_write(®s->alarm_regs->tmr_alarm2_h, hi);
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spin_unlock(&qoriq_ptp->lock);
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qoriq_ptp->alarm_value = ns;
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} else {
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qoriq_write(&qoriq_ptp->regs->tmr_tevent, ALM2);
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qoriq_write(®s->ctrl_regs->tmr_tevent, ALM2);
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spin_lock(&qoriq_ptp->lock);
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mask = qoriq_read(&qoriq_ptp->regs->tmr_temask);
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mask = qoriq_read(®s->ctrl_regs->tmr_temask);
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mask &= ~ALM2EN;
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qoriq_write(&qoriq_ptp->regs->tmr_temask, mask);
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qoriq_write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock(&qoriq_ptp->lock);
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qoriq_ptp->alarm_value = 0;
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qoriq_ptp->alarm_interval = 0;
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@ -153,7 +159,7 @@ static irqreturn_t isr(int irq, void *priv)
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}
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if (ack) {
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qoriq_write(&qoriq_ptp->regs->tmr_tevent, ack);
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qoriq_write(®s->ctrl_regs->tmr_tevent, ack);
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return IRQ_HANDLED;
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} else
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return IRQ_NONE;
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@ -169,6 +175,7 @@ static int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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u32 tmr_add;
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int neg_adj = 0;
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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if (scaled_ppm < 0) {
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neg_adj = 1;
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@ -186,7 +193,7 @@ static int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
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qoriq_write(&qoriq_ptp->regs->tmr_add, tmr_add);
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qoriq_write(®s->ctrl_regs->tmr_add, tmr_add);
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return 0;
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}
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@ -250,6 +257,7 @@ static int ptp_qoriq_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps);
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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unsigned long flags;
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u32 bit, mask;
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@ -266,23 +274,23 @@ static int ptp_qoriq_enable(struct ptp_clock_info *ptp,
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return -EINVAL;
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}
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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mask = qoriq_read(&qoriq_ptp->regs->tmr_temask);
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mask = qoriq_read(®s->ctrl_regs->tmr_temask);
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if (on)
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mask |= bit;
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else
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mask &= ~bit;
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qoriq_write(&qoriq_ptp->regs->tmr_temask, mask);
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qoriq_write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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return 0;
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case PTP_CLK_REQ_PPS:
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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mask = qoriq_read(&qoriq_ptp->regs->tmr_temask);
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mask = qoriq_read(®s->ctrl_regs->tmr_temask);
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if (on)
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mask |= PP1EN;
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else
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mask &= ~PP1EN;
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qoriq_write(&qoriq_ptp->regs->tmr_temask, mask);
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qoriq_write(®s->ctrl_regs->tmr_temask, mask);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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return 0;
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@ -313,10 +321,12 @@ static int qoriq_ptp_probe(struct platform_device *dev)
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{
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struct device_node *node = dev->dev.of_node;
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struct qoriq_ptp *qoriq_ptp;
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struct qoriq_ptp_registers *regs;
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struct timespec64 now;
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int err = -ENOMEM;
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u32 tmr_ctrl;
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unsigned long flags;
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void __iomem *base;
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qoriq_ptp = kzalloc(sizeof(*qoriq_ptp), GFP_KERNEL);
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if (!qoriq_ptp)
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@ -351,7 +361,7 @@ static int qoriq_ptp_probe(struct platform_device *dev)
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pr_err("irq not in device tree\n");
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goto no_node;
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}
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if (request_irq(qoriq_ptp->irq, isr, 0, DRIVER, qoriq_ptp)) {
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if (request_irq(qoriq_ptp->irq, isr, IRQF_SHARED, DRIVER, qoriq_ptp)) {
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pr_err("request_irq failed\n");
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goto no_node;
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}
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@ -368,12 +378,27 @@ static int qoriq_ptp_probe(struct platform_device *dev)
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spin_lock_init(&qoriq_ptp->lock);
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qoriq_ptp->regs = ioremap(qoriq_ptp->rsrc->start,
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resource_size(qoriq_ptp->rsrc));
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if (!qoriq_ptp->regs) {
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base = ioremap(qoriq_ptp->rsrc->start,
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resource_size(qoriq_ptp->rsrc));
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if (!base) {
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pr_err("ioremap ptp registers failed\n");
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goto no_ioremap;
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}
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qoriq_ptp->base = base;
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if (of_device_is_compatible(node, "fsl,fman-ptp-timer")) {
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qoriq_ptp->regs.ctrl_regs = base + FMAN_CTRL_REGS_OFFSET;
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qoriq_ptp->regs.alarm_regs = base + FMAN_ALARM_REGS_OFFSET;
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qoriq_ptp->regs.fiper_regs = base + FMAN_FIPER_REGS_OFFSET;
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qoriq_ptp->regs.etts_regs = base + FMAN_ETTS_REGS_OFFSET;
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} else {
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qoriq_ptp->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
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qoriq_ptp->regs.alarm_regs = base + ALARM_REGS_OFFSET;
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qoriq_ptp->regs.fiper_regs = base + FIPER_REGS_OFFSET;
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qoriq_ptp->regs.etts_regs = base + ETTS_REGS_OFFSET;
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}
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ktime_get_real_ts64(&now);
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ptp_qoriq_settime(&qoriq_ptp->caps, &now);
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@ -383,13 +408,14 @@ static int qoriq_ptp_probe(struct platform_device *dev)
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spin_lock_irqsave(&qoriq_ptp->lock, flags);
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qoriq_write(&qoriq_ptp->regs->tmr_ctrl, tmr_ctrl);
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qoriq_write(&qoriq_ptp->regs->tmr_add, qoriq_ptp->tmr_add);
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qoriq_write(&qoriq_ptp->regs->tmr_prsc, qoriq_ptp->tmr_prsc);
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qoriq_write(&qoriq_ptp->regs->tmr_fiper1, qoriq_ptp->tmr_fiper1);
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qoriq_write(&qoriq_ptp->regs->tmr_fiper2, qoriq_ptp->tmr_fiper2);
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regs = &qoriq_ptp->regs;
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qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
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qoriq_write(®s->ctrl_regs->tmr_add, qoriq_ptp->tmr_add);
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qoriq_write(®s->ctrl_regs->tmr_prsc, qoriq_ptp->tmr_prsc);
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qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1);
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qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2);
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set_alarm(qoriq_ptp);
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qoriq_write(&qoriq_ptp->regs->tmr_ctrl, tmr_ctrl|FIPERST|RTPE|TE|FRD);
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qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl|FIPERST|RTPE|TE|FRD);
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spin_unlock_irqrestore(&qoriq_ptp->lock, flags);
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@ -405,7 +431,7 @@ static int qoriq_ptp_probe(struct platform_device *dev)
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return 0;
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no_clock:
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iounmap(qoriq_ptp->regs);
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iounmap(qoriq_ptp->base);
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no_ioremap:
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release_resource(qoriq_ptp->rsrc);
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no_resource:
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@ -419,12 +445,13 @@ static int qoriq_ptp_probe(struct platform_device *dev)
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static int qoriq_ptp_remove(struct platform_device *dev)
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{
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struct qoriq_ptp *qoriq_ptp = platform_get_drvdata(dev);
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struct qoriq_ptp_registers *regs = &qoriq_ptp->regs;
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qoriq_write(&qoriq_ptp->regs->tmr_temask, 0);
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qoriq_write(&qoriq_ptp->regs->tmr_ctrl, 0);
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qoriq_write(®s->ctrl_regs->tmr_temask, 0);
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qoriq_write(®s->ctrl_regs->tmr_ctrl, 0);
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ptp_clock_unregister(qoriq_ptp->clock);
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iounmap(qoriq_ptp->regs);
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iounmap(qoriq_ptp->base);
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release_resource(qoriq_ptp->rsrc);
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free_irq(qoriq_ptp->irq, qoriq_ptp);
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kfree(qoriq_ptp);
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@ -434,6 +461,7 @@ static int qoriq_ptp_remove(struct platform_device *dev)
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static const struct of_device_id match_table[] = {
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{ .compatible = "fsl,etsec-ptp" },
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{ .compatible = "fsl,fman-ptp-timer" },
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{},
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};
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MODULE_DEVICE_TABLE(of, match_table);
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@ -11,9 +11,8 @@
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/*
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* qoriq ptp registers
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* Generated by regen.tcl on Thu May 13 01:38:57 PM CEST 2010
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*/
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struct qoriq_ptp_registers {
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struct ctrl_regs {
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u32 tmr_ctrl; /* Timer control register */
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u32 tmr_tevent; /* Timestamp event register */
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u32 tmr_temask; /* Timer event mask register */
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@ -28,22 +27,47 @@ struct qoriq_ptp_registers {
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u8 res1[4];
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u32 tmroff_h; /* Timer offset high */
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u32 tmroff_l; /* Timer offset low */
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u8 res2[8];
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};
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struct alarm_regs {
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u32 tmr_alarm1_h; /* Timer alarm 1 high register */
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u32 tmr_alarm1_l; /* Timer alarm 1 high register */
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u32 tmr_alarm2_h; /* Timer alarm 2 high register */
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u32 tmr_alarm2_l; /* Timer alarm 2 high register */
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u8 res3[48];
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};
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struct fiper_regs {
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u32 tmr_fiper1; /* Timer fixed period interval */
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u32 tmr_fiper2; /* Timer fixed period interval */
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u32 tmr_fiper3; /* Timer fixed period interval */
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u8 res4[20];
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};
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struct etts_regs {
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u32 tmr_etts1_h; /* Timestamp of general purpose external trigger */
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u32 tmr_etts1_l; /* Timestamp of general purpose external trigger */
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u32 tmr_etts2_h; /* Timestamp of general purpose external trigger */
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u32 tmr_etts2_l; /* Timestamp of general purpose external trigger */
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};
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struct qoriq_ptp_registers {
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struct ctrl_regs __iomem *ctrl_regs;
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struct alarm_regs __iomem *alarm_regs;
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struct fiper_regs __iomem *fiper_regs;
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struct etts_regs __iomem *etts_regs;
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};
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/* Offset definitions for the four register groups */
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#define CTRL_REGS_OFFSET 0x0
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#define ALARM_REGS_OFFSET 0x40
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#define FIPER_REGS_OFFSET 0x80
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#define ETTS_REGS_OFFSET 0xa0
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#define FMAN_CTRL_REGS_OFFSET 0x80
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#define FMAN_ALARM_REGS_OFFSET 0xb8
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#define FMAN_FIPER_REGS_OFFSET 0xd0
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#define FMAN_ETTS_REGS_OFFSET 0xe0
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/* Bit definitions for the TMR_CTRL register */
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#define ALM1P (1<<31) /* Alarm1 output polarity */
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#define ALM2P (1<<30) /* Alarm2 output polarity */
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@ -105,10 +129,10 @@ struct qoriq_ptp_registers {
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#define DRIVER "ptp_qoriq"
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#define DEFAULT_CKSEL 1
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#define N_EXT_TS 2
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#define REG_SIZE sizeof(struct qoriq_ptp_registers)
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struct qoriq_ptp {
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struct qoriq_ptp_registers __iomem *regs;
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void __iomem *base;
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struct qoriq_ptp_registers regs;
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spinlock_t lock; /* protects regs */
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struct ptp_clock *clock;
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struct ptp_clock_info caps;
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