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i2c-algo-bit: Complain about masters which can't read SCL

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The I2C specification explicitly describes both SDA and SCL as
bidirectional lines. An I2C master with a read-only SCL is thus not
compliant. If a slow slave stretches the clock, errors will happen,
so the bus can't be considered as reliable.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
This commit is contained in:
Jean Delvare 2011-01-10 22:11:23 +01:00 committed by Jean Delvare
parent f451171c5a
commit af5a60baae
1 changed files with 12 additions and 2 deletions
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14
drivers/i2c/algos/i2c-algo-bit.c
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@ -604,9 +604,10 @@ static int __i2c_bit_add_bus(struct i2c_adapter *adap,
int (*add_adapter)(struct i2c_adapter *))
{
struct i2c_algo_bit_data *bit_adap = adap->algo_data;
int ret;
if (bit_test) {
int ret = test_bus(bit_adap, adap->name);
ret = test_bus(bit_adap, adap->name);
if (ret < 0)
return -ENODEV;
}
@ -615,7 +616,16 @@ static int __i2c_bit_add_bus(struct i2c_adapter *adap,
adap->algo = &i2c_bit_algo;
adap->retries = 3;
return add_adapter(adap);
ret = add_adapter(adap);
if (ret < 0)
return ret;
/* Complain if SCL can't be read */
if (bit_adap->getscl == NULL) {
dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
dev_warn(&adap->dev, "Bus may be unreliable\n");
}
return 0;
}
int i2c_bit_add_bus(struct i2c_adapter *adap)