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clk: at91: usb: continue if clk_hw_round_rate() return zero
clk_hw_round_rate() may call round rate function of its parents. In case of SAM9X60 two of USB parrents are PLLA and UPLL. These clocks are controlled by clk-sam9x60-pll.c driver. The round rate function for this driver is sam9x60_pll_round_rate() which call in turn sam9x60_pll_get_best_div_mul(). In case the requested rate is not in the proper range (rate < characteristics->output[0].min && rate > characteristics->output[0].max) the sam9x60_pll_round_rate() will return a negative number to its caller (called by clk_core_round_rate_nolock()). clk_hw_round_rate() will return zero in case a negative number is returned by clk_core_round_rate_nolock(). With this, the USB clock will continue its rate computation even caller of clk_hw_round_rate() returned an error. With this, the USB clock on SAM9X60 may not chose the best parent. I detected this after a suspend/resume cycle on SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lkml.kernel.org/r/1579261009-4573-2-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -75,6 +75,9 @@ static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
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tmp_parent_rate = req->rate * div;
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tmp_parent_rate = req->rate * div;
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tmp_parent_rate = clk_hw_round_rate(parent,
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tmp_parent_rate = clk_hw_round_rate(parent,
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tmp_parent_rate);
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tmp_parent_rate);
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if (!tmp_parent_rate)
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continue;
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tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
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tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
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if (tmp_rate < req->rate)
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if (tmp_rate < req->rate)
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tmp_diff = req->rate - tmp_rate;
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tmp_diff = req->rate - tmp_rate;
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