interconnect: qcom: sc8280xp: Drop IP0 interconnects

Similar to the sdx55 and sc7180, let's drop the MASTER_IPA_CORE and
SLAVE_IPA_CORE interconnects for this platform. There are no actual users
of this interconnect. The IP0 resource will be handled by clk-rpmh
driver.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230109002935.244320-8-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2023-01-09 02:29:30 +02:00 committed by Georgi Djakov
parent c4801e2441
commit b136d257ee
2 changed files with 2 additions and 27 deletions

View File

@ -284,15 +284,6 @@ static struct qcom_icc_node xm_ufs_card = {
.links = { SC8280XP_SLAVE_A2NOC_SNOC },
};
static struct qcom_icc_node ipa_core_master = {
.name = "ipa_core_master",
.id = SC8280XP_MASTER_IPA_CORE,
.channels = 1,
.buswidth = 8,
.num_links = 1,
.links = { SC8280XP_SLAVE_IPA_CORE },
};
static struct qcom_icc_node qup0_core_master = {
.name = "qup0_core_master",
.id = SC8280XP_MASTER_QUP_CORE_0,
@ -882,13 +873,6 @@ static struct qcom_icc_node srvc_aggre2_noc = {
.buswidth = 4,
};
static struct qcom_icc_node ipa_core_slave = {
.name = "ipa_core_slave",
.id = SC8280XP_SLAVE_IPA_CORE,
.channels = 1,
.buswidth = 8,
};
static struct qcom_icc_node qup0_core_slave = {
.name = "qup0_core_slave",
.id = SC8280XP_SLAVE_QUP_CORE_0,
@ -1845,12 +1829,6 @@ static struct qcom_icc_bcm bcm_cn3 = {
},
};
static struct qcom_icc_bcm bcm_ip0 = {
.name = "IP0",
.num_nodes = 1,
.nodes = { &ipa_core_slave },
};
static struct qcom_icc_bcm bcm_mc0 = {
.name = "MC0",
.keepalive = true,
@ -2077,18 +2055,15 @@ static const struct qcom_icc_desc sc8280xp_aggre2_noc = {
};
static struct qcom_icc_bcm * const clk_virt_bcms[] = {
&bcm_ip0,
&bcm_qup0,
&bcm_qup1,
&bcm_qup2,
};
static struct qcom_icc_node * const clk_virt_nodes[] = {
[MASTER_IPA_CORE] = &ipa_core_master,
[MASTER_QUP_CORE_0] = &qup0_core_master,
[MASTER_QUP_CORE_1] = &qup1_core_master,
[MASTER_QUP_CORE_2] = &qup2_core_master,
[SLAVE_IPA_CORE] = &ipa_core_slave,
[SLAVE_QUP_CORE_0] = &qup0_core_slave,
[SLAVE_QUP_CORE_1] = &qup1_core_slave,
[SLAVE_QUP_CORE_2] = &qup2_core_slave,

View File

@ -10,7 +10,7 @@
#define SC8280XP_MASTER_PCIE_TCU 1
#define SC8280XP_MASTER_SYS_TCU 2
#define SC8280XP_MASTER_APPSS_PROC 3
#define SC8280XP_MASTER_IPA_CORE 4
/* 4 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
#define SC8280XP_MASTER_LLCC 5
#define SC8280XP_MASTER_CNOC_LPASS_AG_NOC 6
#define SC8280XP_MASTER_CDSP_NOC_CFG 7
@ -84,7 +84,7 @@
#define SC8280XP_MASTER_USB4_0 75
#define SC8280XP_MASTER_USB4_1 76
#define SC8280XP_SLAVE_EBI1 512
#define SC8280XP_SLAVE_IPA_CORE 513
/* 513 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
#define SC8280XP_SLAVE_AHB2PHY_0 514
#define SC8280XP_SLAVE_AHB2PHY_1 515
#define SC8280XP_SLAVE_AHB2PHY_2 516