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mmc: dw_mmc-bluefield: Add support for eMMC HW reset

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The eMMC RST_N register is implemented as secure register on the BlueField
SoC and controlled by TF-A. This commit sends an SMC call to TF-A for the
eMMC HW reset.

Reviewed-by: David Thompson <davthompson@nvidia.com>
Signed-off-by: Liming Sun <limings@nvidia.com>
Link: https://lore.kernel.org/r/2c459196c6867e325f9386ec0559efea464cfdd6.1718213918.git.limings@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Liming Sun 2024-06-12 18:52:38 -04:00 committed by Ulf Hansson
parent f21adcb866
commit c17aecf858
1 changed files with 17 additions and 1 deletions
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18
drivers/mmc/host/dw_mmc-bluefield.c
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@ -3,6 +3,7 @@
* Copyright (C) 2018 Mellanox Technologies.
*/
#include <linux/arm-smccc.h>
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/mmc/host.h>
@ -20,6 +21,9 @@
#define BLUEFIELD_UHS_REG_EXT_SAMPLE 2
#define BLUEFIELD_UHS_REG_EXT_DRIVE 4
/* SMC call for RST_N */
#define BLUEFIELD_SMC_SET_EMMC_RST_N 0x82000007
static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios *ios)
{
u32 reg;
@ -34,8 +38,20 @@ static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios *ios)
mci_writel(host, UHS_REG_EXT, reg);
}
static void dw_mci_bluefield_hw_reset(struct dw_mci *host)
{
struct arm_smccc_res res = { 0 };
arm_smccc_smc(BLUEFIELD_SMC_SET_EMMC_RST_N, 0, 0, 0, 0, 0, 0, 0,
&res);
if (res.a0)
pr_err("RST_N failed.\n");
}
static const struct dw_mci_drv_data bluefield_drv_data = {
.set_ios = dw_mci_bluefield_set_ios
.set_ios = dw_mci_bluefield_set_ios,
.hw_reset = dw_mci_bluefield_hw_reset
};
static const struct of_device_id dw_mci_bluefield_match[] = {