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KVM: x86: Add X86EMUL_F_MSR and X86EMUL_F_DT_LOAD to aid canonical checks

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Add emulation flags for MSR accesses and Descriptor Tables loads, and pass
the new flags as appropriate to emul_is_noncanonical_address().  The flags
will be used to perform the correct canonical check, as the type of access
affects whether or not CR4.LA57 is consulted when determining the canonical
bit.

No functional change is intended.

Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Link: https://lore.kernel.org/r/20240906221824.491834-3-mlevitsk@redhat.com
[sean: split to separate patch, massage changelog]
Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
Maxim Levitsky 2024-09-06 18:18:22 -04:00 committed by Sean Christopherson
parent 16ccadefa2
commit c534b37b75
3 changed files with 14 additions and 8 deletions
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15
arch/x86/kvm/emulate.c
View File

@ -651,9 +651,10 @@ static inline u8 ctxt_virt_addr_bits(struct x86_emulate_ctxt *ctxt)
}
static inline bool emul_is_noncanonical_address(u64 la,
struct x86_emulate_ctxt *ctxt)
struct x86_emulate_ctxt *ctxt,
unsigned int flags)
{
return !ctxt->ops->is_canonical_addr(ctxt, la);
return !ctxt->ops->is_canonical_addr(ctxt, la, flags);
}
/*
@ -1733,7 +1734,8 @@ static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
if (ret != X86EMUL_CONTINUE)
return ret;
if (emul_is_noncanonical_address(get_desc_base(&seg_desc) |
((u64)base3 << 32), ctxt))
((u64)base3 << 32), ctxt,
X86EMUL_F_DT_LOAD))
return emulate_gp(ctxt, err_code);
}
@ -2516,8 +2518,8 @@ static int em_sysexit(struct x86_emulate_ctxt *ctxt)
ss_sel = cs_sel + 8;
cs.d = 0;
cs.l = 1;
if (emul_is_noncanonical_address(rcx, ctxt) ||
emul_is_noncanonical_address(rdx, ctxt))
if (emul_is_noncanonical_address(rcx, ctxt, 0) ||
emul_is_noncanonical_address(rdx, ctxt, 0))
return emulate_gp(ctxt, 0);
break;
}
@ -3494,7 +3496,8 @@ static int em_lgdt_lidt(struct x86_emulate_ctxt *ctxt, bool lgdt)
if (rc != X86EMUL_CONTINUE)
return rc;
if (ctxt->mode == X86EMUL_MODE_PROT64 &&
emul_is_noncanonical_address(desc_ptr.address, ctxt))
emul_is_noncanonical_address(desc_ptr.address, ctxt,
X86EMUL_F_DT_LOAD))
return emulate_gp(ctxt, 0);
if (lgdt)
ctxt->ops->set_gdt(ctxt, &desc_ptr);

5
arch/x86/kvm/kvm_emulate.h
View File

@ -94,6 +94,8 @@ struct x86_instruction_info {
#define X86EMUL_F_FETCH BIT(1)
#define X86EMUL_F_IMPLICIT BIT(2)
#define X86EMUL_F_INVLPG BIT(3)
#define X86EMUL_F_MSR BIT(4)
#define X86EMUL_F_DT_LOAD BIT(5)
struct x86_emulate_ops {
void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
@ -236,7 +238,8 @@ struct x86_emulate_ops {
gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr,
unsigned int flags);
bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr);
bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr,
unsigned int flags);
};
/* Type, address-of, and value of an instruction's operand. */

2
arch/x86/kvm/x86.c
View File

@ -8620,7 +8620,7 @@ static gva_t emulator_get_untagged_addr(struct x86_emulate_ctxt *ctxt,
}
static bool emulator_is_canonical_addr(struct x86_emulate_ctxt *ctxt,
gva_t addr)
gva_t addr, unsigned int flags)
{
return !is_noncanonical_address(addr, emul_to_vcpu(ctxt));
}