Kernel/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-12-28 00:35:01 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

platform-drivers-x86 for v6.13-3

Browse Source 
Fixes and new HW support:
 
  - alienware-wmi: Add support for Alienware m16 R1 AMD.
 
  - alienware-wmi: Do not setup legacy LED control with X and G Series.
 
  - intel/ifs: Clearwater Forest support.
 
  - intel/vsec: Panther Lake support.
 
  - p2sb: Do not hide the device if BIOS left it unhidden.
 
  - touchscreen_dmi: Add SARY Tab 3 tablet information.
 
 The following is an automated shortlog grouped by driver:
 
 alienware-wmi:
  -  Adds support to Alienware m16 R1 AMD
  -  Fix X Series and G Series quirks
 
 intel/ifs:
  -  Add Clearwater Forest to CPU support list
 
 intel/vsec:
  -  Add support for Panther Lake
 
 p2sb:
  -  Do not scan and remove the P2SB device when it is unhidden
  -  Factor out p2sb_read_from_cache()
  -  Introduce the global flag p2sb_hidden_by_bios
  -  Move P2SB hide and unhide code to p2sb_scan_and_cache()
 
 touchscreen_dmi:
  -  Add info for SARY Tab 3 tablet
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQSCSUwRdwTNL2MhaBlZrE9hU+XOMQUCZ2BF8wAKCRBZrE9hU+XO
 Mbg6AQDjQpJpnKfHqindXx7JSr9uzjLq7CeDmjX/q6gZ8fJ3LgD+LxvbJLxAeNX8
 4sOcyxlGTyoxdeW6MqIFnDWcd24qiQs=
 =4DMQ
 -----END PGP SIGNATURE-----

Merge tag 'platform-drivers-x86-v6.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86

Pull x86 platform driver fixes from Ilpo Järvinen:

 - alienware-wmi:
    - Add support for Alienware m16 R1 AMD
    - Do not setup legacy LED control with X and G Series

 - intel/ifs: Clearwater Forest support

 - intel/vsec: Panther Lake support

 - p2sb: Do not hide the device if BIOS left it unhidden

 - touchscreen_dmi: Add SARY Tab 3 tablet information

* tag 'platform-drivers-x86-v6.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86:
  platform/x86/intel/vsec: Add support for Panther Lake
  platform/x86/intel/ifs: Add Clearwater Forest to CPU support list
  platform/x86: touchscreen_dmi: Add info for SARY Tab 3 tablet
  p2sb: Do not scan and remove the P2SB device when it is unhidden
  p2sb: Move P2SB hide and unhide code to p2sb_scan_and_cache()
  p2sb: Introduce the global flag p2sb_hidden_by_bios
  p2sb: Factor out p2sb_read_from_cache()
  alienware-wmi: Adds support to Alienware m16 R1 AMD
  alienware-wmi: Fix X Series and G Series quirks
This commit is contained in:
Linus Torvalds 2024-12-16 10:01:57 -08:00
commit dc690bc256
5 changed files with 104 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/platform/x86/dell/alienware-wmi.c
View File

@ -190,7 +190,7 @@ static struct quirk_entry quirk_asm201 = {
};
static struct quirk_entry quirk_g_series = {
.num_zones = 2,
.num_zones = 0,
.hdmi_mux = 0,
.amplifier = 0,
.deepslp = 0,
@ -199,7 +199,7 @@ static struct quirk_entry quirk_g_series = {
};
static struct quirk_entry quirk_x_series = {
.num_zones = 2,
.num_zones = 0,
.hdmi_mux = 0,
.amplifier = 0,
.deepslp = 0,
@ -241,6 +241,15 @@ static const struct dmi_system_id alienware_quirks[] __initconst = {
},
.driver_data = &quirk_asm201,
},
{
.callback = dmi_matched,
.ident = "Alienware m16 R1 AMD",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m16 R1 AMD"),
},
.driver_data = &quirk_x_series,
},
{
.callback = dmi_matched,
.ident = "Alienware m17 R5",
@ -687,6 +696,9 @@ static void alienware_zone_exit(struct platform_device *dev)
{
u8 zone;
if (!quirks->num_zones)
return;
sysfs_remove_group(&dev->dev.kobj, &zone_attribute_group);
led_classdev_unregister(&global_led);
if (zone_dev_attrs) {
@ -1229,9 +1241,11 @@ static int __init alienware_wmi_init(void)
goto fail_prep_thermal_profile;
}
ret = alienware_zone_init(platform_device);
if (ret)
goto fail_prep_zones;
if (quirks->num_zones > 0) {
ret = alienware_zone_init(platform_device);
if (ret)
goto fail_prep_zones;
}
return 0;

1
drivers/platform/x86/intel/ifs/core.c
View File

@ -20,6 +20,7 @@ static const struct x86_cpu_id ifs_cpu_ids[] __initconst = {
X86_MATCH(INTEL_GRANITERAPIDS_X, ARRAY_GEN0),
X86_MATCH(INTEL_GRANITERAPIDS_D, ARRAY_GEN0),
X86_MATCH(INTEL_ATOM_CRESTMONT_X, ARRAY_GEN1),
X86_MATCH(INTEL_ATOM_DARKMONT_X, ARRAY_GEN1),
{}
};
MODULE_DEVICE_TABLE(x86cpu, ifs_cpu_ids);

2
drivers/platform/x86/intel/vsec.c
View File

@ -423,6 +423,7 @@ static const struct intel_vsec_platform_info lnl_info = {
#define PCI_DEVICE_ID_INTEL_VSEC_RPL 0xa77d
#define PCI_DEVICE_ID_INTEL_VSEC_TGL 0x9a0d
#define PCI_DEVICE_ID_INTEL_VSEC_LNL_M 0x647d
#define PCI_DEVICE_ID_INTEL_VSEC_PTL 0xb07d
static const struct pci_device_id intel_vsec_pci_ids[] = {
{ PCI_DEVICE_DATA(INTEL, VSEC_ADL, &tgl_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_DG1, &dg1_info) },
@ -432,6 +433,7 @@ static const struct pci_device_id intel_vsec_pci_ids[] = {
{ PCI_DEVICE_DATA(INTEL, VSEC_RPL, &tgl_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_TGL, &tgl_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_LNL_M, &lnl_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_PTL, &mtl_info) },
{ }
};
MODULE_DEVICE_TABLE(pci, intel_vsec_pci_ids);

79
drivers/platform/x86/p2sb.c
View File

@ -43,6 +43,7 @@ struct p2sb_res_cache {
};
static struct p2sb_res_cache p2sb_resources[NR_P2SB_RES_CACHE];
static bool p2sb_hidden_by_bios;
static void p2sb_get_devfn(unsigned int *devfn)
{
@ -97,6 +98,12 @@ static void p2sb_scan_and_cache_devfn(struct pci_bus *bus, unsigned int devfn)
static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn)
{
/*
* The BIOS prevents the P2SB device from being enumerated by the PCI
* subsystem, so we need to unhide and hide it back to lookup the BAR.
*/
pci_bus_write_config_dword(bus, devfn, P2SBC, 0);
/* Scan the P2SB device and cache its BAR0 */
p2sb_scan_and_cache_devfn(bus, devfn);
@ -104,6 +111,8 @@ static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn)
if (devfn == P2SB_DEVFN_GOLDMONT)
p2sb_scan_and_cache_devfn(bus, SPI_DEVFN_GOLDMONT);
pci_bus_write_config_dword(bus, devfn, P2SBC, P2SBC_HIDE);
if (!p2sb_valid_resource(&p2sb_resources[PCI_FUNC(devfn)].res))
return -ENOENT;
@ -129,7 +138,7 @@ static int p2sb_cache_resources(void)
u32 value = P2SBC_HIDE;
struct pci_bus *bus;
u16 class;
int ret;
int ret = 0;
/* Get devfn for P2SB device itself */
p2sb_get_devfn(&devfn_p2sb);
@ -152,26 +161,57 @@ static int p2sb_cache_resources(void)
*/
pci_lock_rescan_remove();
/*
* The BIOS prevents the P2SB device from being enumerated by the PCI
* subsystem, so we need to unhide and hide it back to lookup the BAR.
* Unhide the P2SB device here, if needed.
*/
pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);
if (value & P2SBC_HIDE)
pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);
p2sb_hidden_by_bios = value & P2SBC_HIDE;
ret = p2sb_scan_and_cache(bus, devfn_p2sb);
/* Hide the P2SB device, if it was hidden */
if (value & P2SBC_HIDE)
pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, P2SBC_HIDE);
/*
* If the BIOS does not hide the P2SB device then its resources
* are accesilble. Cache them only if the P2SB device is hidden.
*/
if (p2sb_hidden_by_bios)
ret = p2sb_scan_and_cache(bus, devfn_p2sb);
pci_unlock_rescan_remove();
return ret;
}
static int p2sb_read_from_cache(struct pci_bus *bus, unsigned int devfn,
struct resource *mem)
{
struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)];
if (cache->bus_dev_id != bus->dev.id)
return -ENODEV;
if (!p2sb_valid_resource(&cache->res))
return -ENOENT;
memcpy(mem, &cache->res, sizeof(*mem));
return 0;
}
static int p2sb_read_from_dev(struct pci_bus *bus, unsigned int devfn,
struct resource *mem)
{
struct pci_dev *pdev;
int ret = 0;
pdev = pci_get_slot(bus, devfn);
if (!pdev)
return -ENODEV;
if (p2sb_valid_resource(pci_resource_n(pdev, 0)))
p2sb_read_bar0(pdev, mem);
else
ret = -ENOENT;
pci_dev_put(pdev);
return ret;
}
/**
* p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
* @bus: PCI bus to communicate with
@ -188,8 +228,6 @@ static int p2sb_cache_resources(void)
*/
int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
{
struct p2sb_res_cache *cache;
bus = p2sb_get_bus(bus);
if (!bus)
return -ENODEV;
@ -197,15 +235,10 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
if (!devfn)
p2sb_get_devfn(&devfn);
cache = &p2sb_resources[PCI_FUNC(devfn)];
if (cache->bus_dev_id != bus->dev.id)
return -ENODEV;
if (p2sb_hidden_by_bios)
return p2sb_read_from_cache(bus, devfn, mem);
if (!p2sb_valid_resource(&cache->res))
return -ENOENT;
memcpy(mem, &cache->res, sizeof(*mem));
return 0;
return p2sb_read_from_dev(bus, devfn, mem);
}
EXPORT_SYMBOL_GPL(p2sb_bar);

26
drivers/platform/x86/touchscreen_dmi.c
View File

@ -855,6 +855,23 @@ static const struct ts_dmi_data rwc_nanote_next_data = {
.properties = rwc_nanote_next_props,
};
static const struct property_entry sary_tab_3_props[] = {
PROPERTY_ENTRY_U32("touchscreen-size-x", 1730),
PROPERTY_ENTRY_U32("touchscreen-size-y", 1151),
PROPERTY_ENTRY_BOOL("touchscreen-inverted-x"),
PROPERTY_ENTRY_BOOL("touchscreen-inverted-y"),
PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"),
PROPERTY_ENTRY_STRING("firmware-name", "gsl1680-sary-tab-3.fw"),
PROPERTY_ENTRY_U32("silead,max-fingers", 10),
PROPERTY_ENTRY_BOOL("silead,home-button"),
{ }
};
static const struct ts_dmi_data sary_tab_3_data = {
.acpi_name = "MSSL1680:00",
.properties = sary_tab_3_props,
};
static const struct property_entry schneider_sct101ctm_props[] = {
PROPERTY_ENTRY_U32("touchscreen-size-x", 1715),
PROPERTY_ENTRY_U32("touchscreen-size-y", 1140),
@ -1615,6 +1632,15 @@ const struct dmi_system_id touchscreen_dmi_table[] = {
DMI_MATCH(DMI_BIOS_VERSION, "S8A70R100-V005"),
},
},
{
/* SARY Tab 3 */
.driver_data = (void *)&sary_tab_3_data,
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "SARY"),
DMI_MATCH(DMI_PRODUCT_NAME, "C210C"),
DMI_MATCH(DMI_PRODUCT_SKU, "TAB3"),
},
},
{
/* Schneider SCT101CTM */
.driver_data = (void *)&schneider_sct101ctm_data,