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[MTD] Remove PCI dependency for Geode CS553[56] NAND controller.
PCI is faked on these devices by SMM traps. Don't depend on that -- check for the chipset directly instead. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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@ -211,7 +211,7 @@ config MTD_NAND_SHARPSL
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config MTD_NAND_CS553X
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config MTD_NAND_CS553X
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tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
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tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
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depends on MTD_NAND && X86_PC && PCI
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depends on MTD_NAND && (X86_PC || X86_GENERICARCH)
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help
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help
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The CS553x companion chips for the AMD Geode processor
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The CS553x companion chips for the AMD Geode processor
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include NAND flash controllers with built-in hardware ECC
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include NAND flash controllers with built-in hardware ECC
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@ -31,6 +31,10 @@
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#define NR_CS553X_CONTROLLERS 4
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#define NR_CS553X_CONTROLLERS 4
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#define MSR_DIVIL_GLD_CAP 0x51400000 /* DIVIL capabilitiies */
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#define CAP_CS5535 0x2df000ULL
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#define CAP_CS5536 0x5df500ULL
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/* NAND Timing MSRs */
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/* NAND Timing MSRs */
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#define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
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#define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
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#define MSR_NANDF_CTL 0x5140001c /* NAND Flash Control Timing */
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#define MSR_NANDF_CTL 0x5140001c /* NAND Flash Control Timing */
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@ -252,17 +256,40 @@ out:
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return err;
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return err;
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}
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}
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static int is_geode(void)
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{
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/* These are the CPUs which will have a CS553[56] companion chip */
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
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boot_cpu_data.x86 == 5 &&
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boot_cpu_data.x86_model == 10)
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return 1; /* Geode LX */
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if ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC ||
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boot_cpu_data.x86_vendor == X86_VENDOR_CYRIX) &&
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boot_cpu_data.x86 == 5 &&
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boot_cpu_data.x86_model == 5)
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return 1; /* Geode GX (née GX2) */
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return 0;
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}
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static int __init cs553x_init(void)
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static int __init cs553x_init(void)
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{
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{
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int err = -ENXIO;
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int err = -ENXIO;
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int i;
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int i;
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uint64_t val;
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uint64_t val;
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/* Check whether we actually have a CS5535 or CS5536 */
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/* If the CPU isn't a Geode GX or LX, abort */
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if (!pci_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, NULL) &&
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if (!is_geode())
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!pci_find_device(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA, NULL))
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return -ENXIO;
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return -ENXIO;
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/* If it doesn't have the CS553[56], abort */
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rdmsrl(MSR_DIVIL_GLD_CAP, val);
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val &= ~0xFFULL;
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if (val != CAP_CS5535 && val != CAP_CS5536)
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return -ENXIO;
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/* If it doesn't have the NAND controller enabled, abort */
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rdmsrl(MSR_DIVIL_BALL_OPTS, val);
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rdmsrl(MSR_DIVIL_BALL_OPTS, val);
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if (val & 1) {
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if (val & 1) {
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printk(KERN_INFO "CS553x NAND controller: Flash I/O not enabled in MSR_DIVIL_BALL_OPTS.\n");
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printk(KERN_INFO "CS553x NAND controller: Flash I/O not enabled in MSR_DIVIL_BALL_OPTS.\n");
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