media: staging/media/soc_camera: remove this driver

The soc_camera driver (and related soc_camera-dependent sensor
drivers) is obsolete and depends on BROKEN for a long time now.
Nobody is using it, so it is time to kill it off.

Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Hans Verkuil 2020-06-26 13:53:20 +02:00 committed by Mauro Carvalho Chehab
parent 63839882c5
commit e7eab49132
14 changed files with 0 additions and 7466 deletions

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@ -42,8 +42,6 @@ source "drivers/staging/media/tegra-video/Kconfig"
source "drivers/staging/media/ipu3/Kconfig"
source "drivers/staging/media/soc_camera/Kconfig"
source "drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig"
source "drivers/staging/media/rkisp1/Kconfig"

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@ -10,7 +10,6 @@ obj-$(CONFIG_VIDEO_TEGRA) += tegra-video/
obj-$(CONFIG_TEGRA_VDE) += tegra-vde/
obj-$(CONFIG_VIDEO_HANTRO) += hantro/
obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/
obj-$(CONFIG_SOC_CAMERA) += soc_camera/
obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0/
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rkisp1/
obj-$(CONFIG_VIDEO_USBVISION) += usbvision/

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@ -1,51 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config SOC_CAMERA
tristate "SoC camera support"
depends on VIDEO_V4L2 && HAS_DMA && I2C && BROKEN
select VIDEOBUF2_CORE
help
SoC Camera is a common API to several cameras, not connecting
over a bus like PCI or USB. For example some i2c camera connected
directly to the data bus of an SoC.
comment "soc_camera sensor drivers"
config SOC_CAMERA_MT9M111
tristate "legacy soc_camera mt9m111, mt9m112 and mt9m131 support"
depends on SOC_CAMERA && I2C
select VIDEO_MT9M111
help
This driver supports MT9M111, MT9M112 and MT9M131 cameras from
Micron/Aptina.
This is the legacy configuration which shouldn't be used anymore,
while VIDEO_MT9M111 should be used instead.
config SOC_CAMERA_MT9V022
tristate "mt9v022 and mt9v024 support"
depends on SOC_CAMERA && I2C
help
This driver supports MT9V022 cameras from Micron
config SOC_CAMERA_OV5642
tristate "ov5642 camera support"
depends on SOC_CAMERA && I2C
help
This is a V4L2 camera driver for the OmniVision OV5642 sensor
config SOC_CAMERA_OV9740
tristate "ov9740 camera support"
depends on SOC_CAMERA && I2C
help
This is a ov9740 camera driver
config SOC_CAMERA_IMX074
tristate "imx074 support (DEPRECATED)"
depends on SOC_CAMERA && I2C
help
This driver supports IMX074 cameras from Sony
config SOC_CAMERA_MT9T031
tristate "mt9t031 support (DEPRECATED)"
depends on SOC_CAMERA && I2C
help
This driver supports MT9T031 cameras from Micron.

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@ -1,7 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_SOC_CAMERA) += soc_camera.o soc_mediabus.o
obj-$(CONFIG_SOC_CAMERA_MT9V022) += soc_mt9v022.o
obj-$(CONFIG_SOC_CAMERA_OV5642) += soc_ov5642.o
obj-$(CONFIG_SOC_CAMERA_OV9740) += soc_ov9740.o
obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o
obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o

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@ -1,4 +0,0 @@
The SoC camera framework is obsolete and scheduled for removal in the near
future. Developers are encouraged to convert the drivers to use the
regular V4L2 API if these drivers are still needed (and if someone has the
hardware).

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@ -1,492 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for IMX074 CMOS Image Sensor from Sony
*
* Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* Partially inspired by the IMX074 driver from the Android / MSM tree
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/v4l2-mediabus.h>
#include <linux/slab.h>
#include <linux/videodev2.h>
#include <linux/module.h>
#include <media/soc_camera.h>
#include <media/v4l2-async.h>
#include <media/v4l2-clk.h>
#include <media/v4l2-subdev.h>
/* IMX074 registers */
#define MODE_SELECT 0x0100
#define IMAGE_ORIENTATION 0x0101
#define GROUPED_PARAMETER_HOLD 0x0104
/* Integration Time */
#define COARSE_INTEGRATION_TIME_HI 0x0202
#define COARSE_INTEGRATION_TIME_LO 0x0203
/* Gain */
#define ANALOGUE_GAIN_CODE_GLOBAL_HI 0x0204
#define ANALOGUE_GAIN_CODE_GLOBAL_LO 0x0205
/* PLL registers */
#define PRE_PLL_CLK_DIV 0x0305
#define PLL_MULTIPLIER 0x0307
#define PLSTATIM 0x302b
#define VNDMY_ABLMGSHLMT 0x300a
#define Y_OPBADDR_START_DI 0x3014
/* mode setting */
#define FRAME_LENGTH_LINES_HI 0x0340
#define FRAME_LENGTH_LINES_LO 0x0341
#define LINE_LENGTH_PCK_HI 0x0342
#define LINE_LENGTH_PCK_LO 0x0343
#define YADDR_START 0x0347
#define YADDR_END 0x034b
#define X_OUTPUT_SIZE_MSB 0x034c
#define X_OUTPUT_SIZE_LSB 0x034d
#define Y_OUTPUT_SIZE_MSB 0x034e
#define Y_OUTPUT_SIZE_LSB 0x034f
#define X_EVEN_INC 0x0381
#define X_ODD_INC 0x0383
#define Y_EVEN_INC 0x0385
#define Y_ODD_INC 0x0387
#define HMODEADD 0x3001
#define VMODEADD 0x3016
#define VAPPLINE_START 0x3069
#define VAPPLINE_END 0x306b
#define SHUTTER 0x3086
#define HADDAVE 0x30e8
#define LANESEL 0x3301
/* IMX074 supported geometry */
#define IMX074_WIDTH 1052
#define IMX074_HEIGHT 780
/* IMX074 has only one fixed colorspace per pixelcode */
struct imx074_datafmt {
u32 code;
enum v4l2_colorspace colorspace;
};
struct imx074 {
struct v4l2_subdev subdev;
const struct imx074_datafmt *fmt;
struct v4l2_clk *clk;
};
static const struct imx074_datafmt imx074_colour_fmts[] = {
{MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
};
static struct imx074 *to_imx074(const struct i2c_client *client)
{
return container_of(i2c_get_clientdata(client), struct imx074, subdev);
}
/* Find a data format by a pixel code in an array */
static const struct imx074_datafmt *imx074_find_datafmt(u32 code)
{
int i;
for (i = 0; i < ARRAY_SIZE(imx074_colour_fmts); i++)
if (imx074_colour_fmts[i].code == code)
return imx074_colour_fmts + i;
return NULL;
}
static int reg_write(struct i2c_client *client, const u16 addr, const u8 data)
{
struct i2c_adapter *adap = client->adapter;
struct i2c_msg msg;
unsigned char tx[3];
int ret;
msg.addr = client->addr;
msg.buf = tx;
msg.len = 3;
msg.flags = 0;
tx[0] = addr >> 8;
tx[1] = addr & 0xff;
tx[2] = data;
ret = i2c_transfer(adap, &msg, 1);
mdelay(2);
return ret == 1 ? 0 : -EIO;
}
static int reg_read(struct i2c_client *client, const u16 addr)
{
u8 buf[2] = {addr >> 8, addr & 0xff};
int ret;
struct i2c_msg msgs[] = {
{
.addr = client->addr,
.flags = 0,
.len = 2,
.buf = buf,
}, {
.addr = client->addr,
.flags = I2C_M_RD,
.len = 2,
.buf = buf,
},
};
ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
if (ret < 0) {
dev_warn(&client->dev, "Reading register %x from %x failed\n",
addr, client->addr);
return ret;
}
return buf[0] & 0xff; /* no sign-extension */
}
static int imx074_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct v4l2_mbus_framefmt *mf = &format->format;
const struct imx074_datafmt *fmt = imx074_find_datafmt(mf->code);
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct imx074 *priv = to_imx074(client);
if (format->pad)
return -EINVAL;
dev_dbg(sd->v4l2_dev->dev, "%s(%u)\n", __func__, mf->code);
if (!fmt) {
/* MIPI CSI could have changed the format, double-check */
if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
return -EINVAL;
mf->code = imx074_colour_fmts[0].code;
mf->colorspace = imx074_colour_fmts[0].colorspace;
}
mf->width = IMX074_WIDTH;
mf->height = IMX074_HEIGHT;
mf->field = V4L2_FIELD_NONE;
if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
priv->fmt = fmt;
else
cfg->try_fmt = *mf;
return 0;
}
static int imx074_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct v4l2_mbus_framefmt *mf = &format->format;
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct imx074 *priv = to_imx074(client);
const struct imx074_datafmt *fmt = priv->fmt;
if (format->pad)
return -EINVAL;
mf->code = fmt->code;
mf->colorspace = fmt->colorspace;
mf->width = IMX074_WIDTH;
mf->height = IMX074_HEIGHT;
mf->field = V4L2_FIELD_NONE;
return 0;
}
static int imx074_get_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_selection *sel)
{
if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
return -EINVAL;
sel->r.left = 0;
sel->r.top = 0;
sel->r.width = IMX074_WIDTH;
sel->r.height = IMX074_HEIGHT;
switch (sel->target) {
case V4L2_SEL_TGT_CROP_BOUNDS:
case V4L2_SEL_TGT_CROP:
return 0;
default:
return -EINVAL;
}
}
static int imx074_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
if (code->pad ||
(unsigned int)code->index >= ARRAY_SIZE(imx074_colour_fmts))
return -EINVAL;
code->code = imx074_colour_fmts[code->index].code;
return 0;
}
static int imx074_s_stream(struct v4l2_subdev *sd, int enable)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
/* MODE_SELECT: stream or standby */
return reg_write(client, MODE_SELECT, !!enable);
}
static int imx074_s_power(struct v4l2_subdev *sd, int on)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
struct imx074 *priv = to_imx074(client);
return soc_camera_set_power(&client->dev, ssdd, priv->clk, on);
}
static int imx074_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config *cfg)
{
cfg->type = V4L2_MBUS_CSI2_DPHY;
cfg->flags = V4L2_MBUS_CSI2_2_LANE |
V4L2_MBUS_CSI2_CHANNEL_0 |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
return 0;
}
static const struct v4l2_subdev_video_ops imx074_subdev_video_ops = {
.s_stream = imx074_s_stream,
.g_mbus_config = imx074_g_mbus_config,
};
static const struct v4l2_subdev_core_ops imx074_subdev_core_ops = {
.s_power = imx074_s_power,
};
static const struct v4l2_subdev_pad_ops imx074_subdev_pad_ops = {
.enum_mbus_code = imx074_enum_mbus_code,
.get_selection = imx074_get_selection,
.get_fmt = imx074_get_fmt,
.set_fmt = imx074_set_fmt,
};
static const struct v4l2_subdev_ops imx074_subdev_ops = {
.core = &imx074_subdev_core_ops,
.video = &imx074_subdev_video_ops,
.pad = &imx074_subdev_pad_ops,
};
static int imx074_video_probe(struct i2c_client *client)
{
struct v4l2_subdev *subdev = i2c_get_clientdata(client);
int ret;
u16 id;
ret = imx074_s_power(subdev, 1);
if (ret < 0)
return ret;
/* Read sensor Model ID */
ret = reg_read(client, 0);
if (ret < 0)
goto done;
id = ret << 8;
ret = reg_read(client, 1);
if (ret < 0)
goto done;
id |= ret;
dev_info(&client->dev, "Chip ID 0x%04x detected\n", id);
if (id != 0x74) {
ret = -ENODEV;
goto done;
}
/* PLL Setting EXTCLK=24MHz, 22.5times */
reg_write(client, PLL_MULTIPLIER, 0x2D);
reg_write(client, PRE_PLL_CLK_DIV, 0x02);
reg_write(client, PLSTATIM, 0x4B);
/* 2-lane mode */
reg_write(client, 0x3024, 0x00);
reg_write(client, IMAGE_ORIENTATION, 0x00);
/* select RAW mode:
* 0x08+0x08 = top 8 bits
* 0x0a+0x08 = compressed 8-bits
* 0x0a+0x0a = 10 bits
*/
reg_write(client, 0x0112, 0x08);
reg_write(client, 0x0113, 0x08);
/* Base setting for High frame mode */
reg_write(client, VNDMY_ABLMGSHLMT, 0x80);
reg_write(client, Y_OPBADDR_START_DI, 0x08);
reg_write(client, 0x3015, 0x37);
reg_write(client, 0x301C, 0x01);
reg_write(client, 0x302C, 0x05);
reg_write(client, 0x3031, 0x26);
reg_write(client, 0x3041, 0x60);
reg_write(client, 0x3051, 0x24);
reg_write(client, 0x3053, 0x34);
reg_write(client, 0x3057, 0xC0);
reg_write(client, 0x305C, 0x09);
reg_write(client, 0x305D, 0x07);
reg_write(client, 0x3060, 0x30);
reg_write(client, 0x3065, 0x00);
reg_write(client, 0x30AA, 0x08);
reg_write(client, 0x30AB, 0x1C);
reg_write(client, 0x30B0, 0x32);
reg_write(client, 0x30B2, 0x83);
reg_write(client, 0x30D3, 0x04);
reg_write(client, 0x3106, 0x78);
reg_write(client, 0x310C, 0x82);
reg_write(client, 0x3304, 0x05);
reg_write(client, 0x3305, 0x04);
reg_write(client, 0x3306, 0x11);
reg_write(client, 0x3307, 0x02);
reg_write(client, 0x3308, 0x0C);
reg_write(client, 0x3309, 0x06);
reg_write(client, 0x330A, 0x08);
reg_write(client, 0x330B, 0x04);
reg_write(client, 0x330C, 0x08);
reg_write(client, 0x330D, 0x06);
reg_write(client, 0x330E, 0x01);
reg_write(client, 0x3381, 0x00);
/* V : 1/2V-addition (1,3), H : 1/2H-averaging (1,3) -> Full HD */
/* 1608 = 1560 + 48 (black lines) */
reg_write(client, FRAME_LENGTH_LINES_HI, 0x06);
reg_write(client, FRAME_LENGTH_LINES_LO, 0x48);
reg_write(client, YADDR_START, 0x00);
reg_write(client, YADDR_END, 0x2F);
/* 0x838 == 2104 */
reg_write(client, X_OUTPUT_SIZE_MSB, 0x08);
reg_write(client, X_OUTPUT_SIZE_LSB, 0x38);
/* 0x618 == 1560 */
reg_write(client, Y_OUTPUT_SIZE_MSB, 0x06);
reg_write(client, Y_OUTPUT_SIZE_LSB, 0x18);
reg_write(client, X_EVEN_INC, 0x01);
reg_write(client, X_ODD_INC, 0x03);
reg_write(client, Y_EVEN_INC, 0x01);
reg_write(client, Y_ODD_INC, 0x03);
reg_write(client, HMODEADD, 0x00);
reg_write(client, VMODEADD, 0x16);
reg_write(client, VAPPLINE_START, 0x24);
reg_write(client, VAPPLINE_END, 0x53);
reg_write(client, SHUTTER, 0x00);
reg_write(client, HADDAVE, 0x80);
reg_write(client, LANESEL, 0x00);
reg_write(client, GROUPED_PARAMETER_HOLD, 0x00); /* off */
ret = 0;
done:
imx074_s_power(subdev, 0);
return ret;
}
static int imx074_probe(struct i2c_client *client,
const struct i2c_device_id *did)
{
struct imx074 *priv;
struct i2c_adapter *adapter = client->adapter;
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
int ret;
if (!ssdd) {
dev_err(&client->dev, "IMX074: missing platform data!\n");
return -EINVAL;
}
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
dev_warn(&adapter->dev,
"I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
return -EIO;
}
priv = devm_kzalloc(&client->dev, sizeof(struct imx074), GFP_KERNEL);
if (!priv)
return -ENOMEM;
v4l2_i2c_subdev_init(&priv->subdev, client, &imx074_subdev_ops);
priv->fmt = &imx074_colour_fmts[0];
priv->clk = v4l2_clk_get(&client->dev, "mclk");
if (IS_ERR(priv->clk)) {
dev_info(&client->dev, "Error %ld getting clock\n", PTR_ERR(priv->clk));
return -EPROBE_DEFER;
}
ret = soc_camera_power_init(&client->dev, ssdd);
if (ret < 0)
goto epwrinit;
ret = imx074_video_probe(client);
if (ret < 0)
goto eprobe;
ret = v4l2_async_register_subdev(&priv->subdev);
if (!ret)
return 0;
epwrinit:
eprobe:
v4l2_clk_put(priv->clk);
return ret;
}
static int imx074_remove(struct i2c_client *client)
{
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
struct imx074 *priv = to_imx074(client);
v4l2_async_unregister_subdev(&priv->subdev);
v4l2_clk_put(priv->clk);
if (ssdd->free_bus)
ssdd->free_bus(ssdd);
return 0;
}
static const struct i2c_device_id imx074_id[] = {
{ "imx074", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, imx074_id);
static struct i2c_driver imx074_i2c_driver = {
.driver = {
.name = "imx074",
},
.probe = imx074_probe,
.remove = imx074_remove,
.id_table = imx074_id,
};
module_i2c_driver(imx074_i2c_driver);
MODULE_DESCRIPTION("Sony IMX074 Camera driver");
MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
MODULE_LICENSE("GPL v2");

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@ -1,853 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Driver for MT9T031 CMOS Image Sensor from Micron
*
* Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering <lg@denx.de>
*/
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/log2.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/v4l2-mediabus.h>
#include <linux/videodev2.h>
#include <linux/module.h>
#include <media/soc_camera.h>
#include <media/v4l2-clk.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-ctrls.h>
/*
* ATTENTION: this driver still cannot be used outside of the soc-camera
* framework because of its PM implementation, using the video_device node.
* If hardware becomes available for testing, alternative PM approaches shall
* be considered and tested.
*/
/*
* mt9t031 i2c address 0x5d
* The platform has to define struct i2c_board_info objects and link to them
* from struct soc_camera_host_desc
*/
/* mt9t031 selected register addresses */
#define MT9T031_CHIP_VERSION 0x00
#define MT9T031_ROW_START 0x01
#define MT9T031_COLUMN_START 0x02
#define MT9T031_WINDOW_HEIGHT 0x03
#define MT9T031_WINDOW_WIDTH 0x04
#define MT9T031_HORIZONTAL_BLANKING 0x05
#define MT9T031_VERTICAL_BLANKING 0x06
#define MT9T031_OUTPUT_CONTROL 0x07
#define MT9T031_SHUTTER_WIDTH_UPPER 0x08
#define MT9T031_SHUTTER_WIDTH 0x09
#define MT9T031_PIXEL_CLOCK_CONTROL 0x0a
#define MT9T031_FRAME_RESTART 0x0b
#define MT9T031_SHUTTER_DELAY 0x0c
#define MT9T031_RESET 0x0d
#define MT9T031_READ_MODE_1 0x1e
#define MT9T031_READ_MODE_2 0x20
#define MT9T031_READ_MODE_3 0x21
#define MT9T031_ROW_ADDRESS_MODE 0x22
#define MT9T031_COLUMN_ADDRESS_MODE 0x23
#define MT9T031_GLOBAL_GAIN 0x35
#define MT9T031_CHIP_ENABLE 0xF8
#define MT9T031_MAX_HEIGHT 1536
#define MT9T031_MAX_WIDTH 2048
#define MT9T031_MIN_HEIGHT 2
#define MT9T031_MIN_WIDTH 18
#define MT9T031_HORIZONTAL_BLANK 142
#define MT9T031_VERTICAL_BLANK 25
#define MT9T031_COLUMN_SKIP 32
#define MT9T031_ROW_SKIP 20
struct mt9t031 {
struct v4l2_subdev subdev;
struct v4l2_ctrl_handler hdl;
struct {
/* exposure/auto-exposure cluster */
struct v4l2_ctrl *autoexposure;
struct v4l2_ctrl *exposure;
};
struct v4l2_rect rect; /* Sensor window */
struct v4l2_clk *clk;
u16 xskip;
u16 yskip;
unsigned int total_h;
unsigned short y_skip_top; /* Lines to skip at the top */
};
static struct mt9t031 *to_mt9t031(const struct i2c_client *client)
{
return container_of(i2c_get_clientdata(client), struct mt9t031, subdev);
}
static int reg_read(struct i2c_client *client, const u8 reg)
{
return i2c_smbus_read_word_swapped(client, reg);
}
static int reg_write(struct i2c_client *client, const u8 reg,
const u16 data)
{
return i2c_smbus_write_word_swapped(client, reg, data);
}
static int reg_set(struct i2c_client *client, const u8 reg,
const u16 data)
{
int ret;
ret = reg_read(client, reg);
if (ret < 0)
return ret;
return reg_write(client, reg, ret | data);
}
static int reg_clear(struct i2c_client *client, const u8 reg,
const u16 data)
{
int ret;
ret = reg_read(client, reg);
if (ret < 0)
return ret;
return reg_write(client, reg, ret & ~data);
}
static int set_shutter(struct i2c_client *client, const u32 data)
{
int ret;
ret = reg_write(client, MT9T031_SHUTTER_WIDTH_UPPER, data >> 16);
if (ret >= 0)
ret = reg_write(client, MT9T031_SHUTTER_WIDTH, data & 0xffff);
return ret;
}
static int get_shutter(struct i2c_client *client, u32 *data)
{
int ret;
ret = reg_read(client, MT9T031_SHUTTER_WIDTH_UPPER);
*data = ret << 16;
if (ret >= 0)
ret = reg_read(client, MT9T031_SHUTTER_WIDTH);
*data |= ret & 0xffff;
return ret < 0 ? ret : 0;
}
static int mt9t031_idle(struct i2c_client *client)
{
int ret;
/* Disable chip output, synchronous option update */
ret = reg_write(client, MT9T031_RESET, 1);
if (ret >= 0)
ret = reg_write(client, MT9T031_RESET, 0);
if (ret >= 0)
ret = reg_clear(client, MT9T031_OUTPUT_CONTROL, 2);
return ret >= 0 ? 0 : -EIO;
}
static int mt9t031_s_stream(struct v4l2_subdev *sd, int enable)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
int ret;
if (enable)
/* Switch to master "normal" mode */
ret = reg_set(client, MT9T031_OUTPUT_CONTROL, 2);
else
/* Stop sensor readout */
ret = reg_clear(client, MT9T031_OUTPUT_CONTROL, 2);
if (ret < 0)
return -EIO;
return 0;
}
/* target must be _even_ */
static u16 mt9t031_skip(s32 *source, s32 target, s32 max)
{
unsigned int skip;
if (*source < target + target / 2) {
*source = target;
return 1;
}
skip = min(max, *source + target / 2) / target;
if (skip > 8)
skip = 8;
*source = target * skip;
return skip;
}
/* rect is the sensor rectangle, the caller guarantees parameter validity */
static int mt9t031_set_params(struct i2c_client *client,
struct v4l2_rect *rect, u16 xskip, u16 yskip)
{
struct mt9t031 *mt9t031 = to_mt9t031(client);
int ret;
u16 xbin, ybin;
const u16 hblank = MT9T031_HORIZONTAL_BLANK,
vblank = MT9T031_VERTICAL_BLANK;
xbin = min(xskip, (u16)3);
ybin = min(yskip, (u16)3);
/*
* Could just do roundup(rect->left, [xy]bin * 2); but this is cheaper.
* There is always a valid suitably aligned value. The worst case is
* xbin = 3, width = 2048. Then we will start at 36, the last read out
* pixel will be 2083, which is < 2085 - first black pixel.
*
* MT9T031 datasheet imposes window left border alignment, depending on
* the selected xskip. Failing to conform to this requirement produces
* dark horizontal stripes in the image. However, even obeying to this
* requirement doesn't eliminate the stripes in all configurations. They
* appear "locally reproducibly," but can differ between tests under
* different lighting conditions.
*/
switch (xbin) {
case 1:
rect->left &= ~1;
break;
case 2:
rect->left &= ~3;
break;
case 3:
rect->left = rect->left > roundup(MT9T031_COLUMN_SKIP, 6) ?
(rect->left / 6) * 6 : roundup(MT9T031_COLUMN_SKIP, 6);
}
rect->top &= ~1;
dev_dbg(&client->dev, "skip %u:%u, rect %ux%u@%u:%u\n",
xskip, yskip, rect->width, rect->height, rect->left, rect->top);
/* Disable register update, reconfigure atomically */
ret = reg_set(client, MT9T031_OUTPUT_CONTROL, 1);
if (ret < 0)
return ret;
/* Blanking and start values - default... */
ret = reg_write(client, MT9T031_HORIZONTAL_BLANKING, hblank);
if (ret >= 0)
ret = reg_write(client, MT9T031_VERTICAL_BLANKING, vblank);
if (yskip != mt9t031->yskip || xskip != mt9t031->xskip) {
/* Binning, skipping */
if (ret >= 0)
ret = reg_write(client, MT9T031_COLUMN_ADDRESS_MODE,
((xbin - 1) << 4) | (xskip - 1));
if (ret >= 0)
ret = reg_write(client, MT9T031_ROW_ADDRESS_MODE,
((ybin - 1) << 4) | (yskip - 1));
}
dev_dbg(&client->dev, "new physical left %u, top %u\n",
rect->left, rect->top);
/*
* The caller provides a supported format, as guaranteed by
* .set_fmt(FORMAT_TRY), soc_camera_s_selection() and soc_camera_cropcap()
*/
if (ret >= 0)
ret = reg_write(client, MT9T031_COLUMN_START, rect->left);
if (ret >= 0)
ret = reg_write(client, MT9T031_ROW_START, rect->top);
if (ret >= 0)
ret = reg_write(client, MT9T031_WINDOW_WIDTH, rect->width - 1);
if (ret >= 0)
ret = reg_write(client, MT9T031_WINDOW_HEIGHT,
rect->height + mt9t031->y_skip_top - 1);
if (ret >= 0 && v4l2_ctrl_g_ctrl(mt9t031->autoexposure) == V4L2_EXPOSURE_AUTO) {
mt9t031->total_h = rect->height + mt9t031->y_skip_top + vblank;
ret = set_shutter(client, mt9t031->total_h);
}
/* Re-enable register update, commit all changes */
if (ret >= 0)
ret = reg_clear(client, MT9T031_OUTPUT_CONTROL, 1);
if (ret >= 0) {
mt9t031->rect = *rect;
mt9t031->xskip = xskip;
mt9t031->yskip = yskip;
}
return ret < 0 ? ret : 0;
}
static int mt9t031_set_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_selection *sel)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9t031 *mt9t031 = to_mt9t031(client);
struct v4l2_rect rect = sel->r;
if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
sel->target != V4L2_SEL_TGT_CROP)
return -EINVAL;
rect.width = ALIGN(rect.width, 2);
rect.height = ALIGN(rect.height, 2);
soc_camera_limit_side(&rect.left, &rect.width,
MT9T031_COLUMN_SKIP, MT9T031_MIN_WIDTH, MT9T031_MAX_WIDTH);
soc_camera_limit_side(&rect.top, &rect.height,
MT9T031_ROW_SKIP, MT9T031_MIN_HEIGHT, MT9T031_MAX_HEIGHT);
return mt9t031_set_params(client, &rect, mt9t031->xskip, mt9t031->yskip);
}
static int mt9t031_get_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_selection *sel)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9t031 *mt9t031 = to_mt9t031(client);
if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
return -EINVAL;
switch (sel->target) {
case V4L2_SEL_TGT_CROP_BOUNDS:
sel->r.left = MT9T031_COLUMN_SKIP;
sel->r.top = MT9T031_ROW_SKIP;
sel->r.width = MT9T031_MAX_WIDTH;
sel->r.height = MT9T031_MAX_HEIGHT;
return 0;
case V4L2_SEL_TGT_CROP:
sel->r = mt9t031->rect;
return 0;
default:
return -EINVAL;
}
}
static int mt9t031_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct v4l2_mbus_framefmt *mf = &format->format;
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9t031 *mt9t031 = to_mt9t031(client);
if (format->pad)
return -EINVAL;
mf->width = mt9t031->rect.width / mt9t031->xskip;
mf->height = mt9t031->rect.height / mt9t031->yskip;
mf->code = MEDIA_BUS_FMT_SBGGR10_1X10;
mf->colorspace = V4L2_COLORSPACE_SRGB;
mf->field = V4L2_FIELD_NONE;
return 0;
}
/*
* If a user window larger than sensor window is requested, we'll increase the
* sensor window.
*/
static int mt9t031_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct v4l2_mbus_framefmt *mf = &format->format;
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9t031 *mt9t031 = to_mt9t031(client);
u16 xskip, yskip;
struct v4l2_rect rect = mt9t031->rect;
if (format->pad)
return -EINVAL;
mf->code = MEDIA_BUS_FMT_SBGGR10_1X10;
mf->colorspace = V4L2_COLORSPACE_SRGB;
v4l_bound_align_image(
&mf->width, MT9T031_MIN_WIDTH, MT9T031_MAX_WIDTH, 1,
&mf->height, MT9T031_MIN_HEIGHT, MT9T031_MAX_HEIGHT, 1, 0);
if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
cfg->try_fmt = *mf;
return 0;
}
/*
* Width and height are within limits.
* S_FMT: use binning and skipping for scaling
*/
xskip = mt9t031_skip(&rect.width, mf->width, MT9T031_MAX_WIDTH);
yskip = mt9t031_skip(&rect.height, mf->height, MT9T031_MAX_HEIGHT);
mf->code = MEDIA_BUS_FMT_SBGGR10_1X10;
mf->colorspace = V4L2_COLORSPACE_SRGB;
/* mt9t031_set_params() doesn't change width and height */
return mt9t031_set_params(client, &rect, xskip, yskip);
}
#ifdef CONFIG_VIDEO_ADV_DEBUG
static int mt9t031_g_register(struct v4l2_subdev *sd,
struct v4l2_dbg_register *reg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
if (reg->reg > 0xff)
return -EINVAL;
reg->size = 1;
reg->val = reg_read(client, reg->reg);
if (reg->val > 0xffff)
return -EIO;
return 0;
}
static int mt9t031_s_register(struct v4l2_subdev *sd,
const struct v4l2_dbg_register *reg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
if (reg->reg > 0xff)
return -EINVAL;
if (reg_write(client, reg->reg, reg->val) < 0)
return -EIO;
return 0;
}
#endif
static int mt9t031_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
{
struct mt9t031 *mt9t031 = container_of(ctrl->handler,
struct mt9t031, hdl);
const u32 shutter_max = MT9T031_MAX_HEIGHT + MT9T031_VERTICAL_BLANK;
s32 min, max;
switch (ctrl->id) {
case V4L2_CID_EXPOSURE_AUTO:
min = mt9t031->exposure->minimum;
max = mt9t031->exposure->maximum;
mt9t031->exposure->val =
(shutter_max / 2 + (mt9t031->total_h - 1) * (max - min))
/ shutter_max + min;
break;
}
return 0;
}
static int mt9t031_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct mt9t031 *mt9t031 = container_of(ctrl->handler,
struct mt9t031, hdl);
struct v4l2_subdev *sd = &mt9t031->subdev;
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct v4l2_ctrl *exp = mt9t031->exposure;
int data;
switch (ctrl->id) {
case V4L2_CID_VFLIP:
if (ctrl->val)
data = reg_set(client, MT9T031_READ_MODE_2, 0x8000);
else
data = reg_clear(client, MT9T031_READ_MODE_2, 0x8000);
if (data < 0)
return -EIO;
return 0;
case V4L2_CID_HFLIP:
if (ctrl->val)
data = reg_set(client, MT9T031_READ_MODE_2, 0x4000);
else
data = reg_clear(client, MT9T031_READ_MODE_2, 0x4000);
if (data < 0)
return -EIO;
return 0;
case V4L2_CID_GAIN:
/* See Datasheet Table 7, Gain settings. */
if (ctrl->val <= ctrl->default_value) {
/* Pack it into 0..1 step 0.125, register values 0..8 */
unsigned long range = ctrl->default_value - ctrl->minimum;
data = ((ctrl->val - (s32)ctrl->minimum) * 8 + range / 2) / range;
dev_dbg(&client->dev, "Setting gain %d\n", data);
data = reg_write(client, MT9T031_GLOBAL_GAIN, data);
if (data < 0)
return -EIO;
} else {
/* Pack it into 1.125..128 variable step, register values 9..0x7860 */
/* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */
unsigned long range = ctrl->maximum - ctrl->default_value - 1;
/* calculated gain: map 65..127 to 9..1024 step 0.125 */
unsigned long gain = ((ctrl->val - (s32)ctrl->default_value - 1) *
1015 + range / 2) / range + 9;
if (gain <= 32) /* calculated gain 9..32 -> 9..32 */
data = gain;
else if (gain <= 64) /* calculated gain 33..64 -> 0x51..0x60 */
data = ((gain - 32) * 16 + 16) / 32 + 80;
else
/* calculated gain 65..1024 -> (1..120) << 8 + 0x60 */
data = (((gain - 64 + 7) * 32) & 0xff00) | 0x60;
dev_dbg(&client->dev, "Set gain from 0x%x to 0x%x\n",
reg_read(client, MT9T031_GLOBAL_GAIN), data);
data = reg_write(client, MT9T031_GLOBAL_GAIN, data);
if (data < 0)
return -EIO;
}
return 0;
case V4L2_CID_EXPOSURE_AUTO:
if (ctrl->val == V4L2_EXPOSURE_MANUAL) {
unsigned int range = exp->maximum - exp->minimum;
unsigned int shutter = ((exp->val - (s32)exp->minimum) * 1048 +
range / 2) / range + 1;
u32 old;
get_shutter(client, &old);
dev_dbg(&client->dev, "Set shutter from %u to %u\n",
old, shutter);
if (set_shutter(client, shutter) < 0)
return -EIO;
} else {
const u16 vblank = MT9T031_VERTICAL_BLANK;
mt9t031->total_h = mt9t031->rect.height +
mt9t031->y_skip_top + vblank;
if (set_shutter(client, mt9t031->total_h) < 0)
return -EIO;
}
return 0;
default:
return -EINVAL;
}
return 0;
}
/*
* Power Management:
* This function does nothing for now but must be present for pm to work
*/
static int mt9t031_runtime_suspend(struct device *dev)
{
return 0;
}
/*
* Power Management:
* COLUMN_ADDRESS_MODE and ROW_ADDRESS_MODE are not rewritten if unchanged
* they are however changed at reset if the platform hook is present
* thus we rewrite them with the values stored by the driver
*/
static int mt9t031_runtime_resume(struct device *dev)
{
struct video_device *vdev = to_video_device(dev);
struct v4l2_subdev *sd = soc_camera_vdev_to_subdev(vdev);
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9t031 *mt9t031 = to_mt9t031(client);
int ret;
u16 xbin, ybin;
xbin = min(mt9t031->xskip, (u16)3);
ybin = min(mt9t031->yskip, (u16)3);
ret = reg_write(client, MT9T031_COLUMN_ADDRESS_MODE,
((xbin - 1) << 4) | (mt9t031->xskip - 1));
if (ret < 0)
return ret;
ret = reg_write(client, MT9T031_ROW_ADDRESS_MODE,
((ybin - 1) << 4) | (mt9t031->yskip - 1));
if (ret < 0)
return ret;
return 0;
}
static const struct dev_pm_ops mt9t031_dev_pm_ops = {
.runtime_suspend = mt9t031_runtime_suspend,
.runtime_resume = mt9t031_runtime_resume,
};
static const struct device_type mt9t031_dev_type = {
.name = "MT9T031",
.pm = &mt9t031_dev_pm_ops,
};
static int mt9t031_s_power(struct v4l2_subdev *sd, int on)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
struct video_device *vdev = soc_camera_i2c_to_vdev(client);
struct mt9t031 *mt9t031 = to_mt9t031(client);
int ret;
if (on) {
ret = soc_camera_power_on(&client->dev, ssdd, mt9t031->clk);
if (ret < 0)
return ret;
if (vdev)
/* Not needed during probing, when vdev isn't available yet */
vdev->dev.type = &mt9t031_dev_type;
} else {
if (vdev)
vdev->dev.type = NULL;
soc_camera_power_off(&client->dev, ssdd, mt9t031->clk);
}
return 0;
}
/*
* Interface active, can use i2c. If it fails, it can indeed mean, that
* this wasn't our capture interface, so, we wait for the right one
*/
static int mt9t031_video_probe(struct i2c_client *client)
{
struct mt9t031 *mt9t031 = to_mt9t031(client);
s32 data;
int ret;
ret = mt9t031_s_power(&mt9t031->subdev, 1);
if (ret < 0)
return ret;
ret = mt9t031_idle(client);
if (ret < 0) {
dev_err(&client->dev, "Failed to initialise the camera\n");
goto done;
}
/* Read out the chip version register */
data = reg_read(client, MT9T031_CHIP_VERSION);
switch (data) {
case 0x1621:
break;
default:
dev_err(&client->dev,
"No MT9T031 chip detected, register read %x\n", data);
ret = -ENODEV;
goto done;
}
dev_info(&client->dev, "Detected a MT9T031 chip ID %x\n", data);
ret = v4l2_ctrl_handler_setup(&mt9t031->hdl);
done:
mt9t031_s_power(&mt9t031->subdev, 0);
return ret;
}
static int mt9t031_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9t031 *mt9t031 = to_mt9t031(client);
*lines = mt9t031->y_skip_top;
return 0;
}
static const struct v4l2_ctrl_ops mt9t031_ctrl_ops = {
.g_volatile_ctrl = mt9t031_g_volatile_ctrl,
.s_ctrl = mt9t031_s_ctrl,
};
static const struct v4l2_subdev_core_ops mt9t031_subdev_core_ops = {
.s_power = mt9t031_s_power,
#ifdef CONFIG_VIDEO_ADV_DEBUG
.g_register = mt9t031_g_register,
.s_register = mt9t031_s_register,
#endif
};
static int mt9t031_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
if (code->pad || code->index)
return -EINVAL;
code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
return 0;
}
static int mt9t031_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config *cfg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
V4L2_MBUS_PCLK_SAMPLE_FALLING | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_HIGH;
cfg->type = V4L2_MBUS_PARALLEL;
cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
return 0;
}
static int mt9t031_s_mbus_config(struct v4l2_subdev *sd,
const struct v4l2_mbus_config *cfg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
if (soc_camera_apply_board_flags(ssdd, cfg) &
V4L2_MBUS_PCLK_SAMPLE_FALLING)
return reg_clear(client, MT9T031_PIXEL_CLOCK_CONTROL, 0x8000);
else
return reg_set(client, MT9T031_PIXEL_CLOCK_CONTROL, 0x8000);
}
static const struct v4l2_subdev_video_ops mt9t031_subdev_video_ops = {
.s_stream = mt9t031_s_stream,
.g_mbus_config = mt9t031_g_mbus_config,
.s_mbus_config = mt9t031_s_mbus_config,
};
static const struct v4l2_subdev_sensor_ops mt9t031_subdev_sensor_ops = {
.g_skip_top_lines = mt9t031_g_skip_top_lines,
};
static const struct v4l2_subdev_pad_ops mt9t031_subdev_pad_ops = {
.enum_mbus_code = mt9t031_enum_mbus_code,
.get_selection = mt9t031_get_selection,
.set_selection = mt9t031_set_selection,
.get_fmt = mt9t031_get_fmt,
.set_fmt = mt9t031_set_fmt,
};
static const struct v4l2_subdev_ops mt9t031_subdev_ops = {
.core = &mt9t031_subdev_core_ops,
.video = &mt9t031_subdev_video_ops,
.sensor = &mt9t031_subdev_sensor_ops,
.pad = &mt9t031_subdev_pad_ops,
};
static int mt9t031_probe(struct i2c_client *client,
const struct i2c_device_id *did)
{
struct mt9t031 *mt9t031;
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
struct i2c_adapter *adapter = client->adapter;
int ret;
if (!ssdd) {
dev_err(&client->dev, "MT9T031 driver needs platform data\n");
return -EINVAL;
}
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
dev_warn(&adapter->dev,
"I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
return -EIO;
}
mt9t031 = devm_kzalloc(&client->dev, sizeof(struct mt9t031), GFP_KERNEL);
if (!mt9t031)
return -ENOMEM;
v4l2_i2c_subdev_init(&mt9t031->subdev, client, &mt9t031_subdev_ops);
v4l2_ctrl_handler_init(&mt9t031->hdl, 5);
v4l2_ctrl_new_std(&mt9t031->hdl, &mt9t031_ctrl_ops,
V4L2_CID_VFLIP, 0, 1, 1, 0);
v4l2_ctrl_new_std(&mt9t031->hdl, &mt9t031_ctrl_ops,
V4L2_CID_HFLIP, 0, 1, 1, 0);
v4l2_ctrl_new_std(&mt9t031->hdl, &mt9t031_ctrl_ops,
V4L2_CID_GAIN, 0, 127, 1, 64);
/*
* Simulated autoexposure. If enabled, we calculate shutter width
* ourselves in the driver based on vertical blanking and frame width
*/
mt9t031->autoexposure = v4l2_ctrl_new_std_menu(&mt9t031->hdl,
&mt9t031_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
V4L2_EXPOSURE_AUTO);
mt9t031->exposure = v4l2_ctrl_new_std(&mt9t031->hdl, &mt9t031_ctrl_ops,
V4L2_CID_EXPOSURE, 1, 255, 1, 255);
mt9t031->subdev.ctrl_handler = &mt9t031->hdl;
if (mt9t031->hdl.error)
return mt9t031->hdl.error;
v4l2_ctrl_auto_cluster(2, &mt9t031->autoexposure,
V4L2_EXPOSURE_MANUAL, true);
mt9t031->y_skip_top = 0;
mt9t031->rect.left = MT9T031_COLUMN_SKIP;
mt9t031->rect.top = MT9T031_ROW_SKIP;
mt9t031->rect.width = MT9T031_MAX_WIDTH;
mt9t031->rect.height = MT9T031_MAX_HEIGHT;
mt9t031->xskip = 1;
mt9t031->yskip = 1;
mt9t031->clk = v4l2_clk_get(&client->dev, "mclk");
if (IS_ERR(mt9t031->clk)) {
ret = PTR_ERR(mt9t031->clk);
goto eclkget;
}
ret = mt9t031_video_probe(client);
if (ret) {
v4l2_clk_put(mt9t031->clk);
eclkget:
v4l2_ctrl_handler_free(&mt9t031->hdl);
}
return ret;
}
static int mt9t031_remove(struct i2c_client *client)
{
struct mt9t031 *mt9t031 = to_mt9t031(client);
v4l2_clk_put(mt9t031->clk);
v4l2_device_unregister_subdev(&mt9t031->subdev);
v4l2_ctrl_handler_free(&mt9t031->hdl);
return 0;
}
static const struct i2c_device_id mt9t031_id[] = {
{ "mt9t031", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, mt9t031_id);
static struct i2c_driver mt9t031_i2c_driver = {
.driver = {
.name = "mt9t031",
},
.probe = mt9t031_probe,
.remove = mt9t031_remove,
.id_table = mt9t031_id,
};
module_i2c_driver(mt9t031_i2c_driver);
MODULE_DESCRIPTION("Micron MT9T031 Camera driver");
MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
MODULE_LICENSE("GPL v2");

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@ -1,171 +0,0 @@
.. SPDX-License-Identifier: GPL-2.0
The Soc-Camera Drivers
======================
Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Terminology
-----------
The following terms are used in this document:
- camera / camera device / camera sensor - a video-camera sensor chip, capable
of connecting to a variety of systems and interfaces, typically uses i2c for
control and configuration, and a parallel or a serial bus for data.
- camera host - an interface, to which a camera is connected. Typically a
specialised interface, present on many SoCs, e.g. PXA27x and PXA3xx, SuperH,
i.MX27, i.MX31.
- camera host bus - a connection between a camera host and a camera. Can be
parallel or serial, consists of data and control lines, e.g. clock, vertical
and horizontal synchronization signals.
Purpose of the soc-camera subsystem
-----------------------------------
The soc-camera subsystem initially provided a unified API between camera host
drivers and camera sensor drivers. Later the soc-camera sensor API has been
replaced with the V4L2 standard subdev API. This also made camera driver re-use
with non-soc-camera hosts possible. The camera host API to the soc-camera core
has been preserved.
Soc-camera implements a V4L2 interface to the user, currently only the "mmap"
method is supported by host drivers. However, the soc-camera core also provides
support for the "read" method.
The subsystem has been designed to support multiple camera host interfaces and
multiple cameras per interface, although most applications have only one camera
sensor.
Existing drivers
----------------
As of 3.7 there are seven host drivers in the mainline: atmel-isi.c,
mx1_camera.c (broken, scheduled for removal), mx2_camera.c, mx3_camera.c,
omap1_camera.c, pxa_camera.c, sh_mobile_ceu_camera.c, and multiple sensor
drivers under drivers/media/i2c/soc_camera/.
Camera host API
---------------
A host camera driver is registered using the
.. code-block:: none
soc_camera_host_register(struct soc_camera_host *);
function. The host object can be initialized as follows:
.. code-block:: none
struct soc_camera_host *ici;
ici->drv_name = DRV_NAME;
ici->ops = &camera_host_ops;
ici->priv = pcdev;
ici->v4l2_dev.dev = &pdev->dev;
ici->nr = pdev->id;
All camera host methods are passed in a struct soc_camera_host_ops:
.. code-block:: none
static struct soc_camera_host_ops camera_host_ops = {
.owner = THIS_MODULE,
.add = camera_add_device,
.remove = camera_remove_device,
.set_fmt = camera_set_fmt_cap,
.try_fmt = camera_try_fmt_cap,
.init_videobuf2 = camera_init_videobuf2,
.poll = camera_poll,
.querycap = camera_querycap,
.set_bus_param = camera_set_bus_param,
/* The rest of host operations are optional */
};
.add and .remove methods are called when a sensor is attached to or detached
from the host. .set_bus_param is used to configure physical connection
parameters between the host and the sensor. .init_videobuf2 is called by
soc-camera core when a video-device is opened, the host driver would typically
call vb2_queue_init() in this method. Further video-buffer management is
implemented completely by the specific camera host driver. If the host driver
supports non-standard pixel format conversion, it should implement a
.get_formats and, possibly, a .put_formats operations. See below for more
details about format conversion. The rest of the methods are called from
respective V4L2 operations.
Camera API
----------
Sensor drivers can use struct soc_camera_link, typically provided by the
platform, and used to specify to which camera host bus the sensor is connected,
and optionally provide platform .power and .reset methods for the camera. This
struct is provided to the camera driver via the I2C client device platform data
and can be obtained, using the soc_camera_i2c_to_link() macro. Care should be
taken, when using soc_camera_vdev_to_subdev() and when accessing struct
soc_camera_device, using v4l2_get_subdev_hostdata(): both only work, when
running on an soc-camera host. The actual camera driver operation is implemented
using the V4L2 subdev API. Additionally soc-camera camera drivers can use
auxiliary soc-camera helper functions like soc_camera_power_on() and
soc_camera_power_off(), which switch regulators, provided by the platform and call
board-specific power switching methods. soc_camera_apply_board_flags() takes
camera bus configuration capability flags and applies any board transformations,
e.g. signal polarity inversion. soc_mbus_get_fmtdesc() can be used to obtain a
pixel format descriptor, corresponding to a certain media-bus pixel format code.
soc_camera_limit_side() can be used to restrict beginning and length of a frame
side, based on camera capabilities.
VIDIOC_S_CROP and VIDIOC_S_FMT behaviour
----------------------------------------
Above user ioctls modify image geometry as follows:
VIDIOC_S_CROP: sets location and sizes of the sensor window. Unit is one sensor
pixel. Changing sensor window sizes preserves any scaling factors, therefore
user window sizes change as well.
VIDIOC_S_FMT: sets user window. Should preserve previously set sensor window as
much as possible by modifying scaling factors. If the sensor window cannot be
preserved precisely, it may be changed too.
In soc-camera there are two locations, where scaling and cropping can take
place: in the camera driver and in the host driver. User ioctls are first passed
to the host driver, which then generally passes them down to the camera driver.
It is more efficient to perform scaling and cropping in the camera driver to
save camera bus bandwidth and maximise the framerate. However, if the camera
driver failed to set the required parameters with sufficient precision, the host
driver may decide to also use its own scaling and cropping to fulfill the user's
request.
Camera drivers are interfaced to the soc-camera core and to host drivers over
the v4l2-subdev API, which is completely functional, it doesn't pass any data.
Therefore all camera drivers shall reply to .g_fmt() requests with their current
output geometry. This is necessary to correctly configure the camera bus.
.s_fmt() and .try_fmt() have to be implemented too. Sensor window and scaling
factors have to be maintained by camera drivers internally. According to the
V4L2 API all capture drivers must support the VIDIOC_CROPCAP ioctl, hence we
rely on camera drivers implementing .cropcap(). If the camera driver does not
support cropping, it may choose to not implement .s_crop(), but to enable
cropping support by the camera host driver at least the .g_crop method must be
implemented.
User window geometry is kept in .user_width and .user_height fields in struct
soc_camera_device and used by the soc-camera core and host drivers. The core
updates these fields upon successful completion of a .s_fmt() call, but if these
fields change elsewhere, e.g. during .s_crop() processing, the host driver is
responsible for updating them.
Format conversion
-----------------
V4L2 distinguishes between pixel formats, as they are stored in memory, and as
they are transferred over a media bus. Soc-camera provides support to
conveniently manage these formats. A table of standard transformations is
maintained by soc-camera core, which describes, what FOURCC pixel format will
be obtained, if a media-bus pixel format is stored in memory according to
certain rules. E.g. if MEDIA_BUS_FMT_YUYV8_2X8 data is sampled with 8 bits per
sample and stored in memory in the little-endian order with no gaps between
bytes, data in memory will represent the V4L2_PIX_FMT_YUYV FOURCC format. These
standard transformations will be used by soc-camera or by camera host drivers to
configure camera drivers to produce the FOURCC format, requested by the user,
using the VIDIOC_S_FMT ioctl(). Apart from those standard format conversions,
host drivers can also provide their own conversion rules by implementing a
.get_formats and, if required, a .put_formats methods.

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@ -1,529 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* soc-camera media bus helper routines
*
* Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <media/v4l2-device.h>
#include <media/v4l2-mediabus.h>
#include <media/drv-intf/soc_mediabus.h>
static const struct soc_mbus_lookup mbus_fmt[] = {
{
.code = MEDIA_BUS_FMT_YUYV8_2X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_YUYV,
.name = "YUYV",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_YVYU8_2X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_YVYU,
.name = "YVYU",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_UYVY8_2X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_UYVY,
.name = "UYVY",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_VYUY8_2X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_VYUY,
.name = "VYUY",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB555,
.name = "RGB555",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB555X,
.name = "RGB555X",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_BE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_RGB565_2X8_LE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB565,
.name = "RGB565",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_RGB565_2X8_BE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB565X,
.name = "RGB565X",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_BE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_RGB666_1X18,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB32,
.name = "RGB666/32bpp",
.bits_per_sample = 18,
.packing = SOC_MBUS_PACKING_EXTEND32,
.order = SOC_MBUS_ORDER_LE,
},
}, {
.code = MEDIA_BUS_FMT_RGB888_1X24,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB32,
.name = "RGB888/32bpp",
.bits_per_sample = 24,
.packing = SOC_MBUS_PACKING_EXTEND32,
.order = SOC_MBUS_ORDER_LE,
},
}, {
.code = MEDIA_BUS_FMT_RGB888_2X12_BE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB32,
.name = "RGB888/32bpp",
.bits_per_sample = 12,
.packing = SOC_MBUS_PACKING_EXTEND32,
.order = SOC_MBUS_ORDER_BE,
},
}, {
.code = MEDIA_BUS_FMT_RGB888_2X12_LE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB32,
.name = "RGB888/32bpp",
.bits_per_sample = 12,
.packing = SOC_MBUS_PACKING_EXTEND32,
.order = SOC_MBUS_ORDER_LE,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR8_1X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR8,
.name = "Bayer 8 BGGR",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_NONE,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR10_1X10,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR10,
.name = "Bayer 10 BGGR",
.bits_per_sample = 10,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_Y8_1X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_GREY,
.name = "Grey",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_NONE,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_Y10_1X10,
.fmt = {
.fourcc = V4L2_PIX_FMT_Y10,
.name = "Grey 10bit",
.bits_per_sample = 10,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR10,
.name = "Bayer 10 BGGR",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR10,
.name = "Bayer 10 BGGR",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADLO,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR10,
.name = "Bayer 10 BGGR",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_BE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR10,
.name = "Bayer 10 BGGR",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADLO,
.order = SOC_MBUS_ORDER_BE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_JPEG_1X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_JPEG,
.name = "JPEG",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_VARIABLE,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE,
.fmt = {
.fourcc = V4L2_PIX_FMT_RGB444,
.name = "RGB444",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_2X8_PADHI,
.order = SOC_MBUS_ORDER_BE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_YUYV8_1_5X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_YUV420,
.name = "YUYV 4:2:0",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_1_5X8,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_YVYU8_1_5X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_YVU420,
.name = "YVYU 4:2:0",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_1_5X8,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_UYVY8_1X16,
.fmt = {
.fourcc = V4L2_PIX_FMT_UYVY,
.name = "UYVY 16bit",
.bits_per_sample = 16,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_VYUY8_1X16,
.fmt = {
.fourcc = V4L2_PIX_FMT_VYUY,
.name = "VYUY 16bit",
.bits_per_sample = 16,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_YUYV8_1X16,
.fmt = {
.fourcc = V4L2_PIX_FMT_YUYV,
.name = "YUYV 16bit",
.bits_per_sample = 16,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_YVYU8_1X16,
.fmt = {
.fourcc = V4L2_PIX_FMT_YVYU,
.name = "YVYU 16bit",
.bits_per_sample = 16,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SGRBG8_1X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_SGRBG8,
.name = "Bayer 8 GRBG",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_NONE,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
.fmt = {
.fourcc = V4L2_PIX_FMT_SGRBG10DPCM8,
.name = "Bayer 10 BGGR DPCM 8",
.bits_per_sample = 8,
.packing = SOC_MBUS_PACKING_NONE,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SGBRG10_1X10,
.fmt = {
.fourcc = V4L2_PIX_FMT_SGBRG10,
.name = "Bayer 10 GBRG",
.bits_per_sample = 10,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SGRBG10_1X10,
.fmt = {
.fourcc = V4L2_PIX_FMT_SGRBG10,
.name = "Bayer 10 GRBG",
.bits_per_sample = 10,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SRGGB10_1X10,
.fmt = {
.fourcc = V4L2_PIX_FMT_SRGGB10,
.name = "Bayer 10 RGGB",
.bits_per_sample = 10,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SBGGR12_1X12,
.fmt = {
.fourcc = V4L2_PIX_FMT_SBGGR12,
.name = "Bayer 12 BGGR",
.bits_per_sample = 12,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SGBRG12_1X12,
.fmt = {
.fourcc = V4L2_PIX_FMT_SGBRG12,
.name = "Bayer 12 GBRG",
.bits_per_sample = 12,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SGRBG12_1X12,
.fmt = {
.fourcc = V4L2_PIX_FMT_SGRBG12,
.name = "Bayer 12 GRBG",
.bits_per_sample = 12,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
}, {
.code = MEDIA_BUS_FMT_SRGGB12_1X12,
.fmt = {
.fourcc = V4L2_PIX_FMT_SRGGB12,
.name = "Bayer 12 RGGB",
.bits_per_sample = 12,
.packing = SOC_MBUS_PACKING_EXTEND16,
.order = SOC_MBUS_ORDER_LE,
.layout = SOC_MBUS_LAYOUT_PACKED,
},
},
};
int soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf,
unsigned int *numerator, unsigned int *denominator)
{
switch (mf->packing) {
case SOC_MBUS_PACKING_NONE:
case SOC_MBUS_PACKING_EXTEND16:
*numerator = 1;
*denominator = 1;
return 0;
case SOC_MBUS_PACKING_EXTEND32:
*numerator = 1;
*denominator = 1;
return 0;
case SOC_MBUS_PACKING_2X8_PADHI:
case SOC_MBUS_PACKING_2X8_PADLO:
*numerator = 2;
*denominator = 1;
return 0;
case SOC_MBUS_PACKING_1_5X8:
*numerator = 3;
*denominator = 2;
return 0;
case SOC_MBUS_PACKING_VARIABLE:
*numerator = 0;
*denominator = 1;
return 0;
}
return -EINVAL;
}
EXPORT_SYMBOL(soc_mbus_samples_per_pixel);
s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf)
{
if (mf->layout != SOC_MBUS_LAYOUT_PACKED)
return width * mf->bits_per_sample / 8;
switch (mf->packing) {
case SOC_MBUS_PACKING_NONE:
return width * mf->bits_per_sample / 8;
case SOC_MBUS_PACKING_2X8_PADHI:
case SOC_MBUS_PACKING_2X8_PADLO:
case SOC_MBUS_PACKING_EXTEND16:
return width * 2;
case SOC_MBUS_PACKING_1_5X8:
return width * 3 / 2;
case SOC_MBUS_PACKING_VARIABLE:
return 0;
case SOC_MBUS_PACKING_EXTEND32:
return width * 4;
}
return -EINVAL;
}
EXPORT_SYMBOL(soc_mbus_bytes_per_line);
s32 soc_mbus_image_size(const struct soc_mbus_pixelfmt *mf,
u32 bytes_per_line, u32 height)
{
if (mf->layout == SOC_MBUS_LAYOUT_PACKED)
return bytes_per_line * height;
switch (mf->packing) {
case SOC_MBUS_PACKING_2X8_PADHI:
case SOC_MBUS_PACKING_2X8_PADLO:
return bytes_per_line * height * 2;
case SOC_MBUS_PACKING_1_5X8:
return bytes_per_line * height * 3 / 2;
default:
return -EINVAL;
}
}
EXPORT_SYMBOL(soc_mbus_image_size);
const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc(
u32 code,
const struct soc_mbus_lookup *lookup,
int n)
{
int i;
for (i = 0; i < n; i++)
if (lookup[i].code == code)
return &lookup[i].fmt;
return NULL;
}
EXPORT_SYMBOL(soc_mbus_find_fmtdesc);
const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc(
u32 code)
{
return soc_mbus_find_fmtdesc(code, mbus_fmt, ARRAY_SIZE(mbus_fmt));
}
EXPORT_SYMBOL(soc_mbus_get_fmtdesc);
unsigned int soc_mbus_config_compatible(const struct v4l2_mbus_config *cfg,
unsigned int flags)
{
unsigned long common_flags;
bool hsync = true, vsync = true, pclk, data, mode;
bool mipi_lanes, mipi_clock;
common_flags = cfg->flags & flags;
switch (cfg->type) {
case V4L2_MBUS_PARALLEL:
hsync = common_flags & (V4L2_MBUS_HSYNC_ACTIVE_HIGH |
V4L2_MBUS_HSYNC_ACTIVE_LOW);
vsync = common_flags & (V4L2_MBUS_VSYNC_ACTIVE_HIGH |
V4L2_MBUS_VSYNC_ACTIVE_LOW);
/* fall through */
case V4L2_MBUS_BT656:
pclk = common_flags & (V4L2_MBUS_PCLK_SAMPLE_RISING |
V4L2_MBUS_PCLK_SAMPLE_FALLING);
data = common_flags & (V4L2_MBUS_DATA_ACTIVE_HIGH |
V4L2_MBUS_DATA_ACTIVE_LOW);
mode = common_flags & (V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE);
return (!hsync || !vsync || !pclk || !data || !mode) ?
0 : common_flags;
case V4L2_MBUS_CSI2_DPHY:
mipi_lanes = common_flags & V4L2_MBUS_CSI2_LANES;
mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
return (!mipi_lanes || !mipi_clock) ? 0 : common_flags;
default:
WARN_ON(1);
return -EINVAL;
}
return 0;
}
EXPORT_SYMBOL(soc_mbus_config_compatible);
static int __init soc_mbus_init(void)
{
return 0;
}
static void __exit soc_mbus_exit(void)
{
}
module_init(soc_mbus_init);
module_exit(soc_mbus_exit);
MODULE_DESCRIPTION("soc-camera media bus interface");
MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
MODULE_LICENSE("GPL v2");

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// SPDX-License-Identifier: GPL-2.0
/*
* OmniVision OV9740 Camera Driver
*
* Copyright (C) 2011 NVIDIA Corporation
*
* Based on ov9640 camera driver.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/v4l2-mediabus.h>
#include <media/soc_camera.h>
#include <media/v4l2-clk.h>
#include <media/v4l2-ctrls.h>
#define to_ov9740(sd) container_of(sd, struct ov9740_priv, subdev)
/* General Status Registers */
#define OV9740_MODEL_ID_HI 0x0000
#define OV9740_MODEL_ID_LO 0x0001
#define OV9740_REVISION_NUMBER 0x0002
#define OV9740_MANUFACTURER_ID 0x0003
#define OV9740_SMIA_VERSION 0x0004
/* General Setup Registers */
#define OV9740_MODE_SELECT 0x0100
#define OV9740_IMAGE_ORT 0x0101
#define OV9740_SOFTWARE_RESET 0x0103
#define OV9740_GRP_PARAM_HOLD 0x0104
#define OV9740_MSK_CORRUP_FM 0x0105
/* Timing Setting */
#define OV9740_FRM_LENGTH_LN_HI 0x0340 /* VTS */
#define OV9740_FRM_LENGTH_LN_LO 0x0341 /* VTS */
#define OV9740_LN_LENGTH_PCK_HI 0x0342 /* HTS */
#define OV9740_LN_LENGTH_PCK_LO 0x0343 /* HTS */
#define OV9740_X_ADDR_START_HI 0x0344
#define OV9740_X_ADDR_START_LO 0x0345
#define OV9740_Y_ADDR_START_HI 0x0346
#define OV9740_Y_ADDR_START_LO 0x0347
#define OV9740_X_ADDR_END_HI 0x0348
#define OV9740_X_ADDR_END_LO 0x0349
#define OV9740_Y_ADDR_END_HI 0x034a
#define OV9740_Y_ADDR_END_LO 0x034b
#define OV9740_X_OUTPUT_SIZE_HI 0x034c
#define OV9740_X_OUTPUT_SIZE_LO 0x034d
#define OV9740_Y_OUTPUT_SIZE_HI 0x034e
#define OV9740_Y_OUTPUT_SIZE_LO 0x034f
/* IO Control Registers */
#define OV9740_IO_CREL00 0x3002
#define OV9740_IO_CREL01 0x3004
#define OV9740_IO_CREL02 0x3005
#define OV9740_IO_OUTPUT_SEL01 0x3026
#define OV9740_IO_OUTPUT_SEL02 0x3027
/* AWB Registers */
#define OV9740_AWB_MANUAL_CTRL 0x3406
/* Analog Control Registers */
#define OV9740_ANALOG_CTRL01 0x3601
#define OV9740_ANALOG_CTRL02 0x3602
#define OV9740_ANALOG_CTRL03 0x3603
#define OV9740_ANALOG_CTRL04 0x3604
#define OV9740_ANALOG_CTRL10 0x3610
#define OV9740_ANALOG_CTRL12 0x3612
#define OV9740_ANALOG_CTRL15 0x3615
#define OV9740_ANALOG_CTRL20 0x3620
#define OV9740_ANALOG_CTRL21 0x3621
#define OV9740_ANALOG_CTRL22 0x3622
#define OV9740_ANALOG_CTRL30 0x3630
#define OV9740_ANALOG_CTRL31 0x3631
#define OV9740_ANALOG_CTRL32 0x3632
#define OV9740_ANALOG_CTRL33 0x3633
/* Sensor Control */
#define OV9740_SENSOR_CTRL03 0x3703
#define OV9740_SENSOR_CTRL04 0x3704
#define OV9740_SENSOR_CTRL05 0x3705
#define OV9740_SENSOR_CTRL07 0x3707
/* Timing Control */
#define OV9740_TIMING_CTRL17 0x3817
#define OV9740_TIMING_CTRL19 0x3819
#define OV9740_TIMING_CTRL33 0x3833
#define OV9740_TIMING_CTRL35 0x3835
/* Banding Filter */
#define OV9740_AEC_MAXEXPO_60_H 0x3a02
#define OV9740_AEC_MAXEXPO_60_L 0x3a03
#define OV9740_AEC_B50_STEP_HI 0x3a08
#define OV9740_AEC_B50_STEP_LO 0x3a09
#define OV9740_AEC_B60_STEP_HI 0x3a0a
#define OV9740_AEC_B60_STEP_LO 0x3a0b
#define OV9740_AEC_CTRL0D 0x3a0d
#define OV9740_AEC_CTRL0E 0x3a0e
#define OV9740_AEC_MAXEXPO_50_H 0x3a14
#define OV9740_AEC_MAXEXPO_50_L 0x3a15
/* AEC/AGC Control */
#define OV9740_AEC_ENABLE 0x3503
#define OV9740_GAIN_CEILING_01 0x3a18
#define OV9740_GAIN_CEILING_02 0x3a19
#define OV9740_AEC_HI_THRESHOLD 0x3a11
#define OV9740_AEC_3A1A 0x3a1a
#define OV9740_AEC_CTRL1B_WPT2 0x3a1b
#define OV9740_AEC_CTRL0F_WPT 0x3a0f
#define OV9740_AEC_CTRL10_BPT 0x3a10
#define OV9740_AEC_CTRL1E_BPT2 0x3a1e
#define OV9740_AEC_LO_THRESHOLD 0x3a1f
/* BLC Control */
#define OV9740_BLC_AUTO_ENABLE 0x4002
#define OV9740_BLC_MODE 0x4005
/* VFIFO */
#define OV9740_VFIFO_READ_START_HI 0x4608
#define OV9740_VFIFO_READ_START_LO 0x4609
/* DVP Control */
#define OV9740_DVP_VSYNC_CTRL02 0x4702
#define OV9740_DVP_VSYNC_MODE 0x4704
#define OV9740_DVP_VSYNC_CTRL06 0x4706
/* PLL Setting */
#define OV9740_PLL_MODE_CTRL01 0x3104
#define OV9740_PRE_PLL_CLK_DIV 0x0305
#define OV9740_PLL_MULTIPLIER 0x0307
#define OV9740_VT_SYS_CLK_DIV 0x0303
#define OV9740_VT_PIX_CLK_DIV 0x0301
#define OV9740_PLL_CTRL3010 0x3010
#define OV9740_VFIFO_CTRL00 0x460e
/* ISP Control */
#define OV9740_ISP_CTRL00 0x5000
#define OV9740_ISP_CTRL01 0x5001
#define OV9740_ISP_CTRL03 0x5003
#define OV9740_ISP_CTRL05 0x5005
#define OV9740_ISP_CTRL12 0x5012
#define OV9740_ISP_CTRL19 0x5019
#define OV9740_ISP_CTRL1A 0x501a
#define OV9740_ISP_CTRL1E 0x501e
#define OV9740_ISP_CTRL1F 0x501f
#define OV9740_ISP_CTRL20 0x5020
#define OV9740_ISP_CTRL21 0x5021
/* AWB */
#define OV9740_AWB_CTRL00 0x5180
#define OV9740_AWB_CTRL01 0x5181
#define OV9740_AWB_CTRL02 0x5182
#define OV9740_AWB_CTRL03 0x5183
#define OV9740_AWB_ADV_CTRL01 0x5184
#define OV9740_AWB_ADV_CTRL02 0x5185
#define OV9740_AWB_ADV_CTRL03 0x5186
#define OV9740_AWB_ADV_CTRL04 0x5187
#define OV9740_AWB_ADV_CTRL05 0x5188
#define OV9740_AWB_ADV_CTRL06 0x5189
#define OV9740_AWB_ADV_CTRL07 0x518a
#define OV9740_AWB_ADV_CTRL08 0x518b
#define OV9740_AWB_ADV_CTRL09 0x518c
#define OV9740_AWB_ADV_CTRL10 0x518d
#define OV9740_AWB_ADV_CTRL11 0x518e
#define OV9740_AWB_CTRL0F 0x518f
#define OV9740_AWB_CTRL10 0x5190
#define OV9740_AWB_CTRL11 0x5191
#define OV9740_AWB_CTRL12 0x5192
#define OV9740_AWB_CTRL13 0x5193
#define OV9740_AWB_CTRL14 0x5194
/* MIPI Control */
#define OV9740_MIPI_CTRL00 0x4800
#define OV9740_MIPI_3837 0x3837
#define OV9740_MIPI_CTRL01 0x4801
#define OV9740_MIPI_CTRL03 0x4803
#define OV9740_MIPI_CTRL05 0x4805
#define OV9740_VFIFO_RD_CTRL 0x4601
#define OV9740_MIPI_CTRL_3012 0x3012
#define OV9740_SC_CMMM_MIPI_CTR 0x3014
#define OV9740_MAX_WIDTH 1280
#define OV9740_MAX_HEIGHT 720
/* Misc. structures */
struct ov9740_reg {
u16 reg;
u8 val;
};
struct ov9740_priv {
struct v4l2_subdev subdev;
struct v4l2_ctrl_handler hdl;
struct v4l2_clk *clk;
u16 model;
u8 revision;
u8 manid;
u8 smiaver;
bool flag_vflip;
bool flag_hflip;
/* For suspend/resume. */
struct v4l2_mbus_framefmt current_mf;
bool current_enable;
};
static const struct ov9740_reg ov9740_defaults[] = {
/* Software Reset */
{ OV9740_SOFTWARE_RESET, 0x01 },
/* Banding Filter */
{ OV9740_AEC_B50_STEP_HI, 0x00 },
{ OV9740_AEC_B50_STEP_LO, 0xe8 },
{ OV9740_AEC_CTRL0E, 0x03 },
{ OV9740_AEC_MAXEXPO_50_H, 0x15 },
{ OV9740_AEC_MAXEXPO_50_L, 0xc6 },
{ OV9740_AEC_B60_STEP_HI, 0x00 },
{ OV9740_AEC_B60_STEP_LO, 0xc0 },
{ OV9740_AEC_CTRL0D, 0x04 },
{ OV9740_AEC_MAXEXPO_60_H, 0x18 },
{ OV9740_AEC_MAXEXPO_60_L, 0x20 },
/* LC */
{ 0x5842, 0x02 }, { 0x5843, 0x5e }, { 0x5844, 0x04 }, { 0x5845, 0x32 },
{ 0x5846, 0x03 }, { 0x5847, 0x29 }, { 0x5848, 0x02 }, { 0x5849, 0xcc },
/* Un-documented OV9740 registers */
{ 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 },
{ 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c },
{ 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580a, 0x0e }, { 0x580b, 0x16 },
{ 0x580c, 0x06 }, { 0x580d, 0x02 }, { 0x580e, 0x00 }, { 0x580f, 0x00 },
{ 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 },
{ 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 },
{ 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581a, 0x07 }, { 0x581b, 0x08 },
{ 0x581c, 0x0b }, { 0x581d, 0x14 }, { 0x581e, 0x28 }, { 0x581f, 0x23 },
{ 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a },
{ 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f },
{ 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582a, 0x8f }, { 0x582b, 0x9e },
{ 0x582c, 0x8f }, { 0x582d, 0x9f }, { 0x582e, 0x4f }, { 0x582f, 0x87 },
{ 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f },
{ 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf },
{ 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583a, 0x9f }, { 0x583b, 0x7f },
{ 0x583c, 0x5f },
/* Y Gamma */
{ 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e },
{ 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 },
{ 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548a, 0xa4 }, { 0x548b, 0xb1 },
{ 0x548c, 0xc6 }, { 0x548d, 0xd8 }, { 0x548e, 0xe9 },
/* UV Gamma */
{ 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 },
{ 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 },
{ 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549a, 0x02 }, { 0x549b, 0xeb },
{ 0x549c, 0x02 }, { 0x549d, 0xa0 }, { 0x549e, 0x02 }, { 0x549f, 0x67 },
{ 0x54a0, 0x02 }, { 0x54a1, 0x3b }, { 0x54a2, 0x02 }, { 0x54a3, 0x18 },
{ 0x54a4, 0x01 }, { 0x54a5, 0xe7 }, { 0x54a6, 0x01 }, { 0x54a7, 0xc3 },
{ 0x54a8, 0x01 }, { 0x54a9, 0x94 }, { 0x54aa, 0x01 }, { 0x54ab, 0x72 },
{ 0x54ac, 0x01 }, { 0x54ad, 0x57 },
/* AWB */
{ OV9740_AWB_CTRL00, 0xf0 },
{ OV9740_AWB_CTRL01, 0x00 },
{ OV9740_AWB_CTRL02, 0x41 },
{ OV9740_AWB_CTRL03, 0x42 },
{ OV9740_AWB_ADV_CTRL01, 0x8a },
{ OV9740_AWB_ADV_CTRL02, 0x61 },
{ OV9740_AWB_ADV_CTRL03, 0xce },
{ OV9740_AWB_ADV_CTRL04, 0xa8 },
{ OV9740_AWB_ADV_CTRL05, 0x17 },
{ OV9740_AWB_ADV_CTRL06, 0x1f },
{ OV9740_AWB_ADV_CTRL07, 0x27 },
{ OV9740_AWB_ADV_CTRL08, 0x41 },
{ OV9740_AWB_ADV_CTRL09, 0x34 },
{ OV9740_AWB_ADV_CTRL10, 0xf0 },
{ OV9740_AWB_ADV_CTRL11, 0x10 },
{ OV9740_AWB_CTRL0F, 0xff },
{ OV9740_AWB_CTRL10, 0x00 },
{ OV9740_AWB_CTRL11, 0xff },
{ OV9740_AWB_CTRL12, 0x00 },
{ OV9740_AWB_CTRL13, 0xff },
{ OV9740_AWB_CTRL14, 0x00 },
/* CIP */
{ 0x530d, 0x12 },
/* CMX */
{ 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 },
{ 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 },
{ 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538a, 0x00 }, { 0x538b, 0x20 },
{ 0x538c, 0x00 }, { 0x538d, 0x00 }, { 0x538e, 0x00 }, { 0x538f, 0x16 },
{ 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 },
{ 0x5394, 0x18 },
/* 50/60 Detection */
{ 0x3c0a, 0x9c }, { 0x3c0b, 0x3f },
/* Output Select */
{ OV9740_IO_OUTPUT_SEL01, 0x00 },
{ OV9740_IO_OUTPUT_SEL02, 0x00 },
{ OV9740_IO_CREL00, 0x00 },
{ OV9740_IO_CREL01, 0x00 },
{ OV9740_IO_CREL02, 0x00 },
/* AWB Control */
{ OV9740_AWB_MANUAL_CTRL, 0x00 },
/* Analog Control */
{ OV9740_ANALOG_CTRL03, 0xaa },
{ OV9740_ANALOG_CTRL32, 0x2f },
{ OV9740_ANALOG_CTRL20, 0x66 },
{ OV9740_ANALOG_CTRL21, 0xc0 },
{ OV9740_ANALOG_CTRL31, 0x52 },
{ OV9740_ANALOG_CTRL33, 0x50 },
{ OV9740_ANALOG_CTRL30, 0xca },
{ OV9740_ANALOG_CTRL04, 0x0c },
{ OV9740_ANALOG_CTRL01, 0x40 },
{ OV9740_ANALOG_CTRL02, 0x16 },
{ OV9740_ANALOG_CTRL10, 0xa1 },
{ OV9740_ANALOG_CTRL12, 0x24 },
{ OV9740_ANALOG_CTRL22, 0x9f },
{ OV9740_ANALOG_CTRL15, 0xf0 },
/* Sensor Control */
{ OV9740_SENSOR_CTRL03, 0x42 },
{ OV9740_SENSOR_CTRL04, 0x10 },
{ OV9740_SENSOR_CTRL05, 0x45 },
{ OV9740_SENSOR_CTRL07, 0x14 },
/* Timing Control */
{ OV9740_TIMING_CTRL33, 0x04 },
{ OV9740_TIMING_CTRL35, 0x02 },
{ OV9740_TIMING_CTRL19, 0x6e },
{ OV9740_TIMING_CTRL17, 0x94 },
/* AEC/AGC Control */
{ OV9740_AEC_ENABLE, 0x10 },
{ OV9740_GAIN_CEILING_01, 0x00 },
{ OV9740_GAIN_CEILING_02, 0x7f },
{ OV9740_AEC_HI_THRESHOLD, 0xa0 },
{ OV9740_AEC_3A1A, 0x05 },
{ OV9740_AEC_CTRL1B_WPT2, 0x50 },
{ OV9740_AEC_CTRL0F_WPT, 0x50 },
{ OV9740_AEC_CTRL10_BPT, 0x4c },
{ OV9740_AEC_CTRL1E_BPT2, 0x4c },
{ OV9740_AEC_LO_THRESHOLD, 0x26 },
/* BLC Control */
{ OV9740_BLC_AUTO_ENABLE, 0x45 },
{ OV9740_BLC_MODE, 0x18 },
/* DVP Control */
{ OV9740_DVP_VSYNC_CTRL02, 0x04 },
{ OV9740_DVP_VSYNC_MODE, 0x00 },
{ OV9740_DVP_VSYNC_CTRL06, 0x08 },
/* PLL Setting */
{ OV9740_PLL_MODE_CTRL01, 0x20 },
{ OV9740_PRE_PLL_CLK_DIV, 0x03 },
{ OV9740_PLL_MULTIPLIER, 0x4c },
{ OV9740_VT_SYS_CLK_DIV, 0x01 },
{ OV9740_VT_PIX_CLK_DIV, 0x08 },
{ OV9740_PLL_CTRL3010, 0x01 },
{ OV9740_VFIFO_CTRL00, 0x82 },
/* Timing Setting */
/* VTS */
{ OV9740_FRM_LENGTH_LN_HI, 0x03 },
{ OV9740_FRM_LENGTH_LN_LO, 0x07 },
/* HTS */
{ OV9740_LN_LENGTH_PCK_HI, 0x06 },
{ OV9740_LN_LENGTH_PCK_LO, 0x62 },
/* MIPI Control */
{ OV9740_MIPI_CTRL00, 0x44 }, /* 0x64 for discontinuous clk */
{ OV9740_MIPI_3837, 0x01 },
{ OV9740_MIPI_CTRL01, 0x0f },
{ OV9740_MIPI_CTRL03, 0x05 },
{ OV9740_MIPI_CTRL05, 0x10 },
{ OV9740_VFIFO_RD_CTRL, 0x16 },
{ OV9740_MIPI_CTRL_3012, 0x70 },
{ OV9740_SC_CMMM_MIPI_CTR, 0x01 },
/* YUYV order */
{ OV9740_ISP_CTRL19, 0x02 },
};
static u32 ov9740_codes[] = {
MEDIA_BUS_FMT_YUYV8_2X8,
};
/* read a register */
static int ov9740_reg_read(struct i2c_client *client, u16 reg, u8 *val)
{
int ret;
struct i2c_msg msg[] = {
{
.addr = client->addr,
.flags = 0,
.len = 2,
.buf = (u8 *)&reg,
},
{
.addr = client->addr,
.flags = I2C_M_RD,
.len = 1,
.buf = val,
},
};
reg = swab16(reg);
ret = i2c_transfer(client->adapter, msg, 2);
if (ret < 0) {
dev_err(&client->dev, "Failed reading register 0x%04x!\n", reg);
return ret;
}
return 0;
}
/* write a register */
static int ov9740_reg_write(struct i2c_client *client, u16 reg, u8 val)
{
struct i2c_msg msg;
struct {
u16 reg;
u8 val;
} __packed buf;
int ret;
reg = swab16(reg);
buf.reg = reg;
buf.val = val;
msg.addr = client->addr;
msg.flags = 0;
msg.len = 3;
msg.buf = (u8 *)&buf;
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_err(&client->dev, "Failed writing register 0x%04x!\n", reg);
return ret;
}
return 0;
}
/* Read a register, alter its bits, write it back */
static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset)
{
u8 val;
int ret;
ret = ov9740_reg_read(client, reg, &val);
if (ret < 0) {
dev_err(&client->dev,
"[Read]-Modify-Write of register 0x%04x failed!\n",
reg);
return ret;
}
val |= set;
val &= ~unset;
ret = ov9740_reg_write(client, reg, val);
if (ret < 0) {
dev_err(&client->dev,
"Read-Modify-[Write] of register 0x%04x failed!\n",
reg);
return ret;
}
return 0;
}
static int ov9740_reg_write_array(struct i2c_client *client,
const struct ov9740_reg *regarray,
int regarraylen)
{
int i;
int ret;
for (i = 0; i < regarraylen; i++) {
ret = ov9740_reg_write(client,
regarray[i].reg, regarray[i].val);
if (ret < 0)
return ret;
}
return 0;
}
/* Start/Stop streaming from the device */
static int ov9740_s_stream(struct v4l2_subdev *sd, int enable)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov9740_priv *priv = to_ov9740(sd);
int ret;
/* Program orientation register. */
if (priv->flag_vflip)
ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x2, 0);
else
ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x2);
if (ret < 0)
return ret;
if (priv->flag_hflip)
ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x1, 0);
else
ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x1);
if (ret < 0)
return ret;
if (enable) {
dev_dbg(&client->dev, "Enabling Streaming\n");
/* Start Streaming */
ret = ov9740_reg_write(client, OV9740_MODE_SELECT, 0x01);
} else {
dev_dbg(&client->dev, "Disabling Streaming\n");
/* Software Reset */
ret = ov9740_reg_write(client, OV9740_SOFTWARE_RESET, 0x01);
if (!ret)
/* Setting Streaming to Standby */
ret = ov9740_reg_write(client, OV9740_MODE_SELECT,
0x00);
}
priv->current_enable = enable;
return ret;
}
/* select nearest higher resolution for capture */
static void ov9740_res_roundup(u32 *width, u32 *height)
{
/* Width must be a multiple of 4 pixels. */
*width = ALIGN(*width, 4);
/* Max resolution is 1280x720 (720p). */
if (*width > OV9740_MAX_WIDTH)
*width = OV9740_MAX_WIDTH;
if (*height > OV9740_MAX_HEIGHT)
*height = OV9740_MAX_HEIGHT;
}
/* Setup registers according to resolution and color encoding */
static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height)
{
u32 x_start;
u32 y_start;
u32 x_end;
u32 y_end;
bool scaling = false;
u32 scale_input_x;
u32 scale_input_y;
int ret;
if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT))
scaling = true;
/*
* Try to use as much of the sensor area as possible when supporting
* smaller resolutions. Depending on the aspect ratio of the
* chosen resolution, we can either use the full width of the sensor,
* or the full height of the sensor (or both if the aspect ratio is
* the same as 1280x720.
*/
if ((OV9740_MAX_WIDTH * height) > (OV9740_MAX_HEIGHT * width)) {
scale_input_x = (OV9740_MAX_HEIGHT * width) / height;
scale_input_y = OV9740_MAX_HEIGHT;
} else {
scale_input_x = OV9740_MAX_WIDTH;
scale_input_y = (OV9740_MAX_WIDTH * height) / width;
}
/* These describe the area of the sensor to use. */
x_start = (OV9740_MAX_WIDTH - scale_input_x) / 2;
y_start = (OV9740_MAX_HEIGHT - scale_input_y) / 2;
x_end = x_start + scale_input_x - 1;
y_end = y_start + scale_input_y - 1;
ret = ov9740_reg_write(client, OV9740_X_ADDR_START_HI, x_start >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_X_ADDR_START_LO, x_start & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_HI, y_start >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_LO, y_start & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_X_ADDR_END_HI, x_end >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_X_ADDR_END_LO, x_end & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_HI, y_end >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_LO, y_end & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_HI, width >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_LO, width & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_HI, height >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_LO, height & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL1E, scale_input_x >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL1F, scale_input_x & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL20, scale_input_y >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL21, scale_input_y & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_HI,
(scale_input_x - width) >> 8);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_LO,
(scale_input_x - width) & 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL00, 0xff);
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL01, 0xef |
(scaling << 4));
if (ret)
goto done;
ret = ov9740_reg_write(client, OV9740_ISP_CTRL03, 0xff);
done:
return ret;
}
/* set the format we will capture in */
static int ov9740_s_fmt(struct v4l2_subdev *sd,
struct v4l2_mbus_framefmt *mf)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov9740_priv *priv = to_ov9740(sd);
int ret;
ret = ov9740_reg_write_array(client, ov9740_defaults,
ARRAY_SIZE(ov9740_defaults));
if (ret < 0)
return ret;
ret = ov9740_set_res(client, mf->width, mf->height);
if (ret < 0)
return ret;
priv->current_mf = *mf;
return ret;
}
static int ov9740_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct v4l2_mbus_framefmt *mf = &format->format;
if (format->pad)
return -EINVAL;
ov9740_res_roundup(&mf->width, &mf->height);
mf->field = V4L2_FIELD_NONE;
mf->code = MEDIA_BUS_FMT_YUYV8_2X8;
mf->colorspace = V4L2_COLORSPACE_SRGB;
if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
return ov9740_s_fmt(sd, mf);
cfg->try_fmt = *mf;
return 0;
}
static int ov9740_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
if (code->pad || code->index >= ARRAY_SIZE(ov9740_codes))
return -EINVAL;
code->code = ov9740_codes[code->index];
return 0;
}
static int ov9740_get_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_selection *sel)
{
if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
return -EINVAL;
switch (sel->target) {
case V4L2_SEL_TGT_CROP_BOUNDS:
case V4L2_SEL_TGT_CROP:
sel->r.left = 0;
sel->r.top = 0;
sel->r.width = OV9740_MAX_WIDTH;
sel->r.height = OV9740_MAX_HEIGHT;
return 0;
default:
return -EINVAL;
}
}
/* Set status of additional camera capabilities */
static int ov9740_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct ov9740_priv *priv =
container_of(ctrl->handler, struct ov9740_priv, hdl);
switch (ctrl->id) {
case V4L2_CID_VFLIP:
priv->flag_vflip = ctrl->val;
break;
case V4L2_CID_HFLIP:
priv->flag_hflip = ctrl->val;
break;
default:
return -EINVAL;
}
return 0;
}
static int ov9740_s_power(struct v4l2_subdev *sd, int on)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
struct ov9740_priv *priv = to_ov9740(sd);
int ret;
if (on) {
ret = soc_camera_power_on(&client->dev, ssdd, priv->clk);
if (ret < 0)
return ret;
if (priv->current_enable) {
ov9740_s_fmt(sd, &priv->current_mf);
ov9740_s_stream(sd, 1);
}
} else {
if (priv->current_enable) {
ov9740_s_stream(sd, 0);
priv->current_enable = true;
}
soc_camera_power_off(&client->dev, ssdd, priv->clk);
}
return 0;
}
#ifdef CONFIG_VIDEO_ADV_DEBUG
static int ov9740_get_register(struct v4l2_subdev *sd,
struct v4l2_dbg_register *reg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
int ret;
u8 val;
if (reg->reg & ~0xffff)
return -EINVAL;
reg->size = 2;
ret = ov9740_reg_read(client, reg->reg, &val);
if (ret)
return ret;
reg->val = (__u64)val;
return ret;
}
static int ov9740_set_register(struct v4l2_subdev *sd,
const struct v4l2_dbg_register *reg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
if (reg->reg & ~0xffff || reg->val & ~0xff)
return -EINVAL;
return ov9740_reg_write(client, reg->reg, reg->val);
}
#endif
static int ov9740_video_probe(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct ov9740_priv *priv = to_ov9740(sd);
u8 modelhi, modello;
int ret;
ret = ov9740_s_power(&priv->subdev, 1);
if (ret < 0)
return ret;
/*
* check and show product ID and manufacturer ID
*/
ret = ov9740_reg_read(client, OV9740_MODEL_ID_HI, &modelhi);
if (ret < 0)
goto done;
ret = ov9740_reg_read(client, OV9740_MODEL_ID_LO, &modello);
if (ret < 0)
goto done;
priv->model = (modelhi << 8) | modello;
ret = ov9740_reg_read(client, OV9740_REVISION_NUMBER, &priv->revision);
if (ret < 0)
goto done;
ret = ov9740_reg_read(client, OV9740_MANUFACTURER_ID, &priv->manid);
if (ret < 0)
goto done;
ret = ov9740_reg_read(client, OV9740_SMIA_VERSION, &priv->smiaver);
if (ret < 0)
goto done;
if (priv->model != 0x9740) {
ret = -ENODEV;
goto done;
}
dev_info(&client->dev, "ov9740 Model ID 0x%04x, Revision 0x%02x, Manufacturer 0x%02x, SMIA Version 0x%02x\n",
priv->model, priv->revision, priv->manid, priv->smiaver);
ret = v4l2_ctrl_handler_setup(&priv->hdl);
done:
ov9740_s_power(&priv->subdev, 0);
return ret;
}
/* Request bus settings on camera side */
static int ov9740_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config *cfg)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
V4L2_MBUS_DATA_ACTIVE_HIGH;
cfg->type = V4L2_MBUS_PARALLEL;
cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
return 0;
}
static const struct v4l2_subdev_video_ops ov9740_video_ops = {
.s_stream = ov9740_s_stream,
.g_mbus_config = ov9740_g_mbus_config,
};
static const struct v4l2_subdev_core_ops ov9740_core_ops = {
.s_power = ov9740_s_power,
#ifdef CONFIG_VIDEO_ADV_DEBUG
.g_register = ov9740_get_register,
.s_register = ov9740_set_register,
#endif
};
static const struct v4l2_subdev_pad_ops ov9740_pad_ops = {
.enum_mbus_code = ov9740_enum_mbus_code,
.get_selection = ov9740_get_selection,
.set_fmt = ov9740_set_fmt,
};
static const struct v4l2_subdev_ops ov9740_subdev_ops = {
.core = &ov9740_core_ops,
.video = &ov9740_video_ops,
.pad = &ov9740_pad_ops,
};
static const struct v4l2_ctrl_ops ov9740_ctrl_ops = {
.s_ctrl = ov9740_s_ctrl,
};
/*
* i2c_driver function
*/
static int ov9740_probe(struct i2c_client *client,
const struct i2c_device_id *did)
{
struct ov9740_priv *priv;
struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
int ret;
if (!ssdd) {
dev_err(&client->dev, "Missing platform_data for driver\n");
return -EINVAL;
}
priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
v4l2_i2c_subdev_init(&priv->subdev, client, &ov9740_subdev_ops);
v4l2_ctrl_handler_init(&priv->hdl, 13);
v4l2_ctrl_new_std(&priv->hdl, &ov9740_ctrl_ops,
V4L2_CID_VFLIP, 0, 1, 1, 0);
v4l2_ctrl_new_std(&priv->hdl, &ov9740_ctrl_ops,
V4L2_CID_HFLIP, 0, 1, 1, 0);
priv->subdev.ctrl_handler = &priv->hdl;
if (priv->hdl.error)
return priv->hdl.error;
priv->clk = v4l2_clk_get(&client->dev, "mclk");
if (IS_ERR(priv->clk)) {
ret = PTR_ERR(priv->clk);
goto eclkget;
}
ret = ov9740_video_probe(client);
if (ret < 0) {
v4l2_clk_put(priv->clk);
eclkget:
v4l2_ctrl_handler_free(&priv->hdl);
}
return ret;
}
static int ov9740_remove(struct i2c_client *client)
{
struct ov9740_priv *priv = i2c_get_clientdata(client);
v4l2_clk_put(priv->clk);
v4l2_device_unregister_subdev(&priv->subdev);
v4l2_ctrl_handler_free(&priv->hdl);
return 0;
}
static const struct i2c_device_id ov9740_id[] = {
{ "ov9740", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ov9740_id);
static struct i2c_driver ov9740_i2c_driver = {
.driver = {
.name = "ov9740",
},
.probe = ov9740_probe,
.remove = ov9740_remove,
.id_table = ov9740_id,
};
module_i2c_driver(ov9740_i2c_driver);
MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV9740");
MODULE_AUTHOR("Andrew Chew <achew@nvidia.com>");
MODULE_LICENSE("GPL v2");

View File

@ -1,107 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* SoC-camera Media Bus API extensions
*
* Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*/
#ifndef SOC_MEDIABUS_H
#define SOC_MEDIABUS_H
#include <linux/videodev2.h>
#include <linux/v4l2-mediabus.h>
/**
* enum soc_mbus_packing - data packing types on the media-bus
* @SOC_MBUS_PACKING_NONE: no packing, bit-for-bit transfer to RAM, one
* sample represents one pixel
* @SOC_MBUS_PACKING_2X8_PADHI: 16 bits transferred in 2 8-bit samples, in the
* possibly incomplete byte high bits are padding
* @SOC_MBUS_PACKING_2X8_PADLO: as above, but low bits are padding
* @SOC_MBUS_PACKING_EXTEND16: sample width (e.g., 10 bits) has to be extended
* to 16 bits
* @SOC_MBUS_PACKING_VARIABLE: compressed formats with variable packing
* @SOC_MBUS_PACKING_1_5X8: used for packed YUV 4:2:0 formats, where 4
* pixels occupy 6 bytes in RAM
* @SOC_MBUS_PACKING_EXTEND32: sample width (e.g., 24 bits) has to be extended
* to 32 bits
*/
enum soc_mbus_packing {
SOC_MBUS_PACKING_NONE,
SOC_MBUS_PACKING_2X8_PADHI,
SOC_MBUS_PACKING_2X8_PADLO,
SOC_MBUS_PACKING_EXTEND16,
SOC_MBUS_PACKING_VARIABLE,
SOC_MBUS_PACKING_1_5X8,
SOC_MBUS_PACKING_EXTEND32,
};
/**
* enum soc_mbus_order - sample order on the media bus
* @SOC_MBUS_ORDER_LE: least significant sample first
* @SOC_MBUS_ORDER_BE: most significant sample first
*/
enum soc_mbus_order {
SOC_MBUS_ORDER_LE,
SOC_MBUS_ORDER_BE,
};
/**
* enum soc_mbus_layout - planes layout in memory
* @SOC_MBUS_LAYOUT_PACKED: color components packed
* @SOC_MBUS_LAYOUT_PLANAR_2Y_U_V: YUV components stored in 3 planes (4:2:2)
* @SOC_MBUS_LAYOUT_PLANAR_2Y_C: YUV components stored in a luma and a
* chroma plane (C plane is half the size
* of Y plane)
* @SOC_MBUS_LAYOUT_PLANAR_Y_C: YUV components stored in a luma and a
* chroma plane (C plane is the same size
* as Y plane)
*/
enum soc_mbus_layout {
SOC_MBUS_LAYOUT_PACKED = 0,
SOC_MBUS_LAYOUT_PLANAR_2Y_U_V,
SOC_MBUS_LAYOUT_PLANAR_2Y_C,
SOC_MBUS_LAYOUT_PLANAR_Y_C,
};
/**
* struct soc_mbus_pixelfmt - Data format on the media bus
* @fourcc: Fourcc code, that will be obtained if the data is
* stored in memory in the following way:
* @packing: Type of sample-packing, that has to be used
* @order: Sample order when storing in memory
* @bits_per_sample: How many bits the bridge has to sample
*/
struct soc_mbus_pixelfmt {
u32 fourcc;
enum soc_mbus_packing packing;
enum soc_mbus_order order;
enum soc_mbus_layout layout;
u8 bits_per_sample;
};
/**
* struct soc_mbus_lookup - Lookup FOURCC IDs by mediabus codes for pass-through
* @code: mediabus pixel-code
* @fmt: pixel format description
*/
struct soc_mbus_lookup {
u32 code;
struct soc_mbus_pixelfmt fmt;
};
const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc(
u32 code,
const struct soc_mbus_lookup *lookup,
int n);
const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc(
u32 code);
s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf);
s32 soc_mbus_image_size(const struct soc_mbus_pixelfmt *mf,
u32 bytes_per_line, u32 height);
int soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf,
unsigned int *numerator, unsigned int *denominator);
unsigned int soc_mbus_config_compatible(const struct v4l2_mbus_config *cfg,
unsigned int flags);
#endif