mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2025-01-09 22:50:41 +00:00
MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB
Add several missing RDMSRs for IDE and USB are missing to avoid the agressive modification of the high 32 bits of the MSR. Without this patch some usb devices may fail after printing "reset ehci host ....." when reading the partition information. Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Zhang Le <r0bertz@gentoo.org> Cc: Hu Hongbing <huhb@lemote.com> Patchwork: http://patchwork.linux-mips.org/patch/1250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
e1df057df8
commit
f18b2f67ea
@ -49,6 +49,8 @@ void pci_ehci_write_reg(int reg, u32 value)
|
||||
lo |= SOFT_BAR_EHCI_FLAG;
|
||||
_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
|
||||
} else if ((value & 0x01) == 0x00) {
|
||||
_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
|
||||
|
||||
value &= 0xfffffff0;
|
||||
|
@ -51,6 +51,7 @@ void pci_ide_write_reg(int reg, u32 value)
|
||||
lo |= SOFT_BAR_IDE_FLAG;
|
||||
_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
|
||||
} else if (value & 0x01) {
|
||||
_rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo);
|
||||
lo = (value & 0xfffffff0) | 0x1;
|
||||
_wrmsr(IDE_MSR_REG(IDE_IO_BAR), hi, lo);
|
||||
|
||||
@ -65,19 +66,30 @@ void pci_ide_write_reg(int reg, u32 value)
|
||||
_rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
|
||||
lo |= 0x01;
|
||||
_wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
|
||||
} else
|
||||
} else {
|
||||
_rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo);
|
||||
}
|
||||
break;
|
||||
case PCI_IDE_DTC_REG:
|
||||
_rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo);
|
||||
break;
|
||||
case PCI_IDE_CAST_REG:
|
||||
_rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo);
|
||||
break;
|
||||
case PCI_IDE_ETC_REG:
|
||||
_rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo);
|
||||
break;
|
||||
case PCI_IDE_PM_REG:
|
||||
_rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo);
|
||||
break;
|
||||
default:
|
||||
|
@ -49,6 +49,8 @@ void pci_ohci_write_reg(int reg, u32 value)
|
||||
lo |= SOFT_BAR_OHCI_FLAG;
|
||||
_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
|
||||
} else if ((value & 0x01) == 0x00) {
|
||||
_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
|
||||
lo = value;
|
||||
_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
|
||||
|
||||
value &= 0xfffffff0;
|
||||
|
Loading…
x
Reference in New Issue
Block a user