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media: dt-bindings: media: nxp, imx8mq-vpu: Split G1 and G2 nodes

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The G1 and G2 are independent and separate decoder blocks
that are enabled by the vpu-blk-ctrl power-domain controller,
which now has a proper driver.

Because these blocks only share the power-domain, and can be
independently fused out, update the bindings to support separate
nodes for the G1 and G2 decoders with vpu-blk-ctrl power-domain
support.

The new DT + old kernel isn't a supported configuration.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Adam Ford 2022-01-25 18:11:22 +01:00 committed by Mauro Carvalho Chehab
parent cf4a3ab598
commit f3116f2e52
1 changed files with 27 additions and 38 deletions
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65
Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
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@ -15,33 +15,20 @@ description:
properties:
compatible:
const: nxp,imx8mq-vpu
oneOf:
- const: nxp,imx8mq-vpu
deprecated: true
- const: nxp,imx8mq-vpu-g1
- const: nxp,imx8mq-vpu-g2
reg:
maxItems: 3
reg-names:
items:
- const: g1
- const: g2
- const: ctrl
maxItems: 1
interrupts:
maxItems: 2
interrupt-names:
items:
- const: g1
- const: g2
maxItems: 1
clocks:
maxItems: 3
clock-names:
items:
- const: g1
- const: g2
- const: bus
maxItems: 1
power-domains:
maxItems: 1
@ -49,31 +36,33 @@ properties:
required:
- compatible
- reg
- reg-names
- interrupts
- interrupt-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/power/imx8mq-power.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
vpu: video-codec@38300000 {
compatible = "nxp,imx8mq-vpu";
reg = <0x38300000 0x10000>,
<0x38310000 0x10000>,
<0x38320000 0x10000>;
reg-names = "g1", "g2", "ctrl";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "g1", "g2";
clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
<&clk IMX8MQ_CLK_VPU_G2_ROOT>,
<&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
clock-names = "g1", "g2", "bus";
power-domains = <&pgc_vpu>;
vpu_g1: video-codec@38300000 {
compatible = "nxp,imx8mq-vpu-g1";
reg = <0x38300000 0x10000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
};
- |
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/power/imx8mq-power.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
vpu_g2: video-codec@38300000 {
compatible = "nxp,imx8mq-vpu-g2";
reg = <0x38310000 0x10000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
};