198227 Commits

Author SHA1 Message Date
Nathan Chancellor
db88697968 x86/speculation: Use DECLARE_PER_CPU for x86_spec_ctrl_current
Clang warns:

  arch/x86/kernel/cpu/bugs.c:58:21: error: section attribute is specified on redeclared variable [-Werror,-Wsection]
  DEFINE_PER_CPU(u64, x86_spec_ctrl_current);
                      ^
  arch/x86/include/asm/nospec-branch.h:283:12: note: previous declaration is here
  extern u64 x86_spec_ctrl_current;
             ^
  1 error generated.

The declaration should be using DECLARE_PER_CPU instead so all
attributes stay in sync.

Cc: stable@vger.kernel.org
Fixes: fc02735b14ff ("KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-07-14 14:52:43 -07:00
Linus Torvalds
2eb5866cac ARM fixes for 5.19:
- quieten the spectre-bhb prints
 - mark flattened device tree sections as shareable
 - remove some obsolete CPU domain code and help text
 - fix thumb unaligned access abort emulation
 - fix amba_device_add() refcount underflow
 - fix literal placement
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAmLQD6IACgkQ9OeQG+St
 rGQI2Q//dYODqrByRkrS8uKpriP0CPZcEB3o1ZWioa/CpM+4aoPptqb9nOa2c0Xx
 LvBhL6k+fBJ8WCWlAJ50aIbcOwqSSzgf4EQMJo6Cc33vQi2alBLhL66ULF1rpQYm
 2V7YRwtid/pRyP8LXaWdy/RbRvcXn5xF7cCvlMrOoZQ7nyloIT3nf0XydgoVn+xo
 lbfFdfPT18HQtUOiCSOGdI0pV1QEakMB4eJ9haZHak4l/XXBTRIg8PAxk1C8DfxZ
 aLfeI6VfCKLJ5q273QP9hK+Wu+L1xYK5siad1gm2AAfXW+OsNH7rR0VCMCSb6t+h
 bN9hvf0iNo/MtTH3PPbOK8kL48PSjARXAJp8MTcJLGAT5BozsvKkpCoT1C/7/uBv
 wPeTaAVMe69gNeK6TCkbnIL8C5p9errBsRRQ6YW7u4M1Z1DFFj5YdSmB+RSvKEr6
 otvY68BPzZSZxzGXo1sFV+LLjZPUV6RvpOUY2d/aTTTyK8HHaHHLXIV1KyP+c9he
 HS+gxDciQe795wOQd5aRqEjGZbdh0aq6OjckAc36YeQwGnk0xXYG8irCPpTB58+q
 X7rme9U1zm3WUwbbA5ndrOjGvk6Jz6cjsAWWIX5l7i1EtcB8qzo/+/1KaWdfL5Bw
 2MAH0djeFAJIh7Yq9R+JMrF0POUpdCp6c+xAyyTj8/1JFkm84XU=
 =g/12
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:

 - quieten the spectre-bhb prints

 - mark flattened device tree sections as shareable

 - remove some obsolete CPU domain code and help text

 - fix thumb unaligned access abort emulation

 - fix amba_device_add() refcount underflow

 - fix literal placement

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 9208/1: entry: add .ltorg directive to keep literals in range
  ARM: 9207/1: amba: fix refcount underflow if amba_device_add() fails
  ARM: 9214/1: alignment: advance IT state after emulating Thumb instruction
  ARM: 9213/1: Print message about disabled Spectre workarounds only once
  ARM: 9212/1: domain: Modify Kconfig help text
  ARM: 9211/1: domain: drop modify_domain()
  ARM: 9210/1: Mark the FDT_FIXED sections as shareable
  ARM: 9209/1: Spectre-BHB: avoid pr_info() every time a CPU comes out of idle
2022-07-14 12:08:59 -07:00
Guenter Roeck
097da1a44d um: Replace to_phys() and to_virt() with less generic function names
The UML function names to_virt() and to_phys() are exposed by UML
headers, and are very generic and may be defined by drivers.  As it
turns out, commit 9409c9b6709e ("pmem: refactor pmem_clear_poison()")
did exactly that.

This results in build errors such as the following when trying to build
um:allmodconfig:

  drivers/nvdimm/pmem.c: In function ‘pmem_dax_zero_page_range’:
  ./arch/um/include/asm/page.h:105:20: error: too few arguments to function ‘to_phys’
    105 | #define __pa(virt) to_phys((void *) (unsigned long) (virt))
        |                    ^~~~~~~

Use less generic function names for the um specific to_phys() and
to_virt() functions to fix the problem and to avoid similar problems in
the future.

Fixes: 9409c9b6709e ("pmem: refactor pmem_clear_poison()")
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-07-14 11:57:27 -07:00
Ard Biesheuvel
29589ca09a ARM: 9208/1: entry: add .ltorg directive to keep literals in range
LKP reports a build issue on Clang, related to a literal load of
__current issued through the ldr_va macro. This turns out to be due to
the fact that group relocations are disabled when CONFIG_COMPILE_TEST=y,
which means that the ldr_va macro resolves to a pair of LDR
instructions, the first one being a literal load issued too far from its
literal pool.

Due to the introduction of a couple of new uses of this macro in commit
508074607c7b95b2 ("ARM: 9195/1: entry: avoid explicit literal loads"),
the literal pools end up getting rearranged in a way that causes the
literal for __current to go out of range. Let's fix this up by putting a
.ltorg directive in a suitable place in the code.

Link: https://lore.kernel.org/all/202205290805.1vZLAr36-lkp@intel.com/

Fixes: 508074607c7b95b2 ("ARM: 9195/1: entry: avoid explicit literal loads")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-14 13:19:51 +01:00
Linus Torvalds
0d8ba24e72 Just when you thought that all the speculation bugs were addressed and
solved and the nightmare is complete, here's the next one: speculating
 after RET instructions and leaking privileged information using the now
 pretty much classical covert channels.
 
 It is called RETBleed and the mitigation effort and controlling
 functionality has been modelled similar to what already existing
 mitigations provide.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmLNdDYACgkQEsHwGGHe
 VUrNAw/+OTFF7md0+17Ju6vvagc/nXfUxk/r0lWU9/KzbRXvPTZdPKTW4NN5c0IS
 VnogyUGFFpzU3dKU2os9ejTD4kHNx0oLuBfQt4w7t4qR+g3+nAH0ywNjH/N1VTJt
 iDpww7CxqloV+i9RCsWV+zQPMPfc2VMUhe6xqNB2CgEDrruzFrDASZR6zzarsKxY
 x4rwHn0ZkV7zNJfcNpV2323qktqHgBtAFf7GlZK8hBsgsiSk+xDk9CODkfxfWIV7
 o4BNvNmaUKDJL51hpuzvIzYwDSiRO5AXdjxHG/0CHc3r3dtA6Xt1elHbERAyUMuM
 P+6XievP5ZV/xXXjoZ5Vla67o3bbGKmTo2WluvVGeg8ahzQEwyPGqeXn77hk+of+
 BtasZyLgfdwSeWExxp0n5Nhh972TMpy5K4gqOFXcxvPSuTl6tTw77F1u0UQLaVVH
 QzHNu+RO/2iQ/P30cOM11IbZ9sfcBOj+5mjfoDoR4qCtoCQfyfHK+HlwXjZ+uk98
 xU/FnQbOKPRVxiyCVhrbKFxjW7iL7AIb0nRgxHzGGoIJ6A71Tbwa/5gGakE7WEBz
 e7ce8NW2JFucGBFYyiBab6I6fB7lbvmqbNPerYEVoU5YxZkMu+xxyToqBnsyPfHZ
 lxgEGREUaY8aZmGDfrD9EYyhhtQU/MwdpN+FY3xXQdUJkvkNaLg=
 =0Ca0
 -----END PGP SIGNATURE-----

Merge tag 'x86_bugs_retbleed' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull lockdep fix for x86 retbleed from Borislav Petkov:

 - Fix lockdep complaint for __static_call_fixup()

* tag 'x86_bugs_retbleed' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/static_call: Serialize __static_call_fixup() properly
2022-07-12 08:40:09 -07:00
Thomas Gleixner
c27c753ea6 x86/static_call: Serialize __static_call_fixup() properly
__static_call_fixup() invokes __static_call_transform() without holding
text_mutex, which causes lockdep to complain in text_poke_bp().

Adding the proper locking cures that, but as this is either used during
early boot or during module finalizing, it's not required to use
text_poke_bp(). Add an argument to __static_call_transform() which tells
it to use text_poke_early() for it.

Fixes: ee88d363d156 ("x86,static_call: Use alternative RET encoding")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
2022-07-12 14:23:32 +02:00
Linus Torvalds
ce114c8668 Just when you thought that all the speculation bugs were addressed and
solved and the nightmare is complete, here's the next one: speculating
 after RET instructions and leaking privileged information using the now
 pretty much classical covert channels.
 
 It is called RETBleed and the mitigation effort and controlling
 functionality has been modelled similar to what already existing
 mitigations provide.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmLKqAgACgkQEsHwGGHe
 VUoM5w/8CSvwPZ3otkhmu8MrJPtWc7eLDPjYN4qQP+19e+bt094MoozxeeWG2wmp
 hkDJAYHT2Oik/qDuEdhFgNYwS7XGgbV3Py3B8syO4//5SD5dkOSG+QqFXvXMdFri
 YsVqqNkjJOWk/YL9Ql5RS/xQewsrr0OqEyWWocuI6XAvfWV4kKvlRSd+6oPqtZEO
 qYlAHTXElyIrA/gjmxChk1HTt5HZtK3uJLf4twNlUfzw7LYFf3+sw3bdNuiXlyMr
 WcLXMwGpS0idURwP3mJa7JRuiVBzb4+kt8mWwWqA02FkKV45FRRRFhFUsy667r00
 cdZBaWdy+b7dvXeliO3FN/x1bZwIEUxmaNy1iAClph4Ifh0ySPUkxAr8EIER7YBy
 bstDJEaIqgYg8NIaD4oF1UrG0ZbL0ImuxVaFdhG1hopQsh4IwLSTLgmZYDhfn/0i
 oSqU0Le+A7QW9s2A2j6qi7BoAbRW+gmBuCgg8f8ECYRkFX1ZF6mkUtnQxYrU7RTq
 rJWGW9nhwM9nRxwgntZiTjUUJ2HtyXEgYyCNjLFCbEBfeG5QTg7XSGFhqDbgoymH
 85vsmSXYxgTgQ/kTW7Fs26tOqnP2h1OtLJZDL8rg49KijLAnISClEgohYW01CWQf
 ZKMHtz3DM0WBiLvSAmfGifScgSrLB5AjtvFHT0hF+5/okEkinVk=
 =09fW
 -----END PGP SIGNATURE-----

Merge tag 'x86_bugs_retbleed' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 retbleed fixes from Borislav Petkov:
 "Just when you thought that all the speculation bugs were addressed and
  solved and the nightmare is complete, here's the next one: speculating
  after RET instructions and leaking privileged information using the
  now pretty much classical covert channels.

  It is called RETBleed and the mitigation effort and controlling
  functionality has been modelled similar to what already existing
  mitigations provide"

* tag 'x86_bugs_retbleed' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (54 commits)
  x86/speculation: Disable RRSBA behavior
  x86/kexec: Disable RET on kexec
  x86/bugs: Do not enable IBPB-on-entry when IBPB is not supported
  x86/entry: Move PUSH_AND_CLEAR_REGS() back into error_entry
  x86/bugs: Add Cannon lake to RETBleed affected CPU list
  x86/retbleed: Add fine grained Kconfig knobs
  x86/cpu/amd: Enumerate BTC_NO
  x86/common: Stamp out the stepping madness
  KVM: VMX: Prevent RSB underflow before vmenter
  x86/speculation: Fill RSB on vmexit for IBRS
  KVM: VMX: Fix IBRS handling after vmexit
  KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS
  KVM: VMX: Convert launched argument to flags
  KVM: VMX: Flatten __vmx_vcpu_run()
  objtool: Re-add UNWIND_HINT_{SAVE_RESTORE}
  x86/speculation: Remove x86_spec_ctrl_mask
  x86/speculation: Use cached host SPEC_CTRL value for guest entry/exit
  x86/speculation: Fix SPEC_CTRL write on SMT state change
  x86/speculation: Fix firmware entry SPEC_CTRL handling
  x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n
  ...
2022-07-11 18:15:25 -07:00
Linus Torvalds
8e59a6a7a4 Mainly MM fixes. About half for issues which were introduced after 5.18
and the remainder for longer-term issues.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQTTMBEPP41GrTpTJgfdBJ7gKXxAjgUCYsxt9wAKCRDdBJ7gKXxA
 jnjWAQD6ts4tgsX+hQ5lrZjWRvYIxH/I4jbtxyMyhc+iKarotAD+NILVgrzIvr0v
 ijlA4LLtmdhN1UWdSomUm3bZVn6n+QA=
 =1375
 -----END PGP SIGNATURE-----

Merge tag 'mm-hotfixes-stable-2022-07-11' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm

Pull hotfixes from Andrew Morton:
 "Mainly MM fixes. About half for issues which were introduced after
  5.18 and the remainder for longer-term issues"

* tag 'mm-hotfixes-stable-2022-07-11' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
  mm: split huge PUD on wp_huge_pud fallback
  nilfs2: fix incorrect masking of permission flags for symlinks
  mm/rmap: fix dereferencing invalid subpage pointer in try_to_migrate_one()
  riscv/mm: fix build error while PAGE_TABLE_CHECK enabled without MMU
  Documentation: highmem: use literal block for code example in highmem.h comment
  mm: sparsemem: fix missing higher order allocation splitting
  mm/damon: use set_huge_pte_at() to make huge pte old
  sh: convert nommu io{re,un}map() to static inline functions
  mm: userfaultfd: fix UFFDIO_CONTINUE on fallocated shmem pages
2022-07-11 12:49:56 -07:00
Linus Torvalds
74a0032b85 - Prepare for and clear .brk early in order to address XenPV guests
failures where the hypervisor verifies page tables and uninitialized
 data in that range leads to bogus failures in those checks
 
 - Add any potential setup_data entries supplied at boot to the identity
 pagetable mappings to prevent kexec kernel boot failures. Usually, this
 is not a problem for the normal kernel as those mappings are part of
 the initially mapped 2M pages but if kexec gets to allocate the second
 kernel somewhere else, those setup_data entries need to be mapped there
 too.
 
 - Fix objtool not to discard text references from the __tracepoints
 section so that ENDBR validation still works
 
 - Correct the setup_data types limit as it is user-visible, before 5.19
 releases
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmLKpf8ACgkQEsHwGGHe
 VUrc5w/8DIVLQ8w+Balf2TGfp5Sl3mPkg+eoARH29qtXhvVBs5KJB9sbT1IGnxao
 nE4yNeiIKhH5SEd17l11E7eWuUtNgZENLsUb3aiAdsItNS+MzOWQuEOPbnAwgJmk
 oKdxiI1SHiVoPy5KVXOcyAS90PSJIkhhxwgR5MInGdmpSUzEFsx5SY82ZfOjOkZU
 L7zCsJzeDfhJdWiR4N0MXWRaFbIvRxI1uXyqgv+Lo6JK5l8dyUUSEdWyLUqZ7E4M
 GFo6LwR3lskQM2bE9vBWS0h1X00d5oDMzfono8kZzRGA/11plZHRI007PCez8yZh
 4sUnnxsfCy2YF8/8hs4IhrHZdcWW9XoN4gTUsjD0wekGTHhOEqu5qpAnVSrXbvvM
 ZfPF8vM+DLPTWQqAT0a4aj1vd1RflDIQPSXKDzJDjeF49zouAj1ae/3KSOYJDzN9
 V6NGiKBnzj1rbtm0+8jOsTQusmh/oDage7uLlmel3hTfNOc2Ay0LXrJWcvqhj66V
 4CtCd12sLeavin+mGptni6lXbsue61EolRtH44RvZJsXLVY8iclM4onl728xOrxj
 CBtJo6bd3oQYy0SQsysXGDVR7BSXtwAYfArYR8BrMTtgHxuyULt/BDoew4r7XADB
 Xxz7ADJZ3DI3Gqza5H6r89Tj6Oi3yXiBWUVUNXFCMYc6ZrqvZc0=
 =tOvF
 -----END PGP SIGNATURE-----

Merge tag 'x86_urgent_for_v5.19_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

 - Prepare for and clear .brk early in order to address XenPV guests
   failures where the hypervisor verifies page tables and uninitialized
   data in that range leads to bogus failures in those checks

 - Add any potential setup_data entries supplied at boot to the identity
   pagetable mappings to prevent kexec kernel boot failures. Usually,
   this is not a problem for the normal kernel as those mappings are
   part of the initially mapped 2M pages but if kexec gets to allocate
   the second kernel somewhere else, those setup_data entries need to be
   mapped there too.

 - Fix objtool not to discard text references from the __tracepoints
   section so that ENDBR validation still works

 - Correct the setup_data types limit as it is user-visible, before 5.19
   releases

* tag 'x86_urgent_for_v5.19_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/boot: Fix the setup data types max limit
  x86/ibt, objtool: Don't discard text references from tracepoint section
  x86/compressed/64: Add identity mappings for setup_data entries
  x86: Fix .brk attribute in linker script
  x86: Clear .brk area at early boot
  x86/xen: Use clear_bss() for Xen PV guests
2022-07-10 08:43:52 -07:00
Borislav Petkov
cb8a4beac3 x86/boot: Fix the setup data types max limit
Commit in Fixes forgot to change the SETUP_TYPE_MAX definition which
contains the highest valid setup data type.

Correct that.

Fixes: 5ea98e01ab52 ("x86/boot: Add Confidential Computing type to setup_data")
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/ddba81dd-cc92-699c-5274-785396a17fb5@zytor.com
2022-07-10 11:17:40 +02:00
Linus Torvalds
d9cdc3b125 powerpc fixes for 5.19 #5
- On Power8 bare metal, fix creation of RNG platform devices, which are needed
    for the /dev/hwrng driver to probe correctly.
 
 Thanks to: Jason A. Donenfeld, Sachin Sant.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmLJSdATHG1wZUBlbGxl
 cm1hbi5pZC5hdQAKCRBR6+o8yOGlgDIzEACy0D2CLdJq1YSvjVfuTbon6WpzUkBq
 5ld1cIst+tLkmq9ixpwaGe+x0/7eELRL5/yfdp1/cFTLirKX1fJOlM2/P52Q+ehN
 DOJfSlDLBHP+os4klKw1g3HrbyP5IBLL0Up6fiebd83SpRHHQ8gmANlfb0KZH5MD
 mUH33cE0egSqkZmTIeMW5cCOq9tnppaM/2CFl5ijxXs5xdJodZAR1HV6uhfxhf0N
 Gqj2O44VVHyckMEVrdd2NmqXeOufWCObGAI/4WYVAijMyyewMnJDnTpso5ZBcgGv
 Y2cX5kCdN1D6rfBEKqTVkECt+Q340KbB86kIJqnPuc7T7ay7Ky4mfVOTRF2EXDQs
 mc0+MUTn1W0ydEuktO2A8lXN/3y/Y4S3SzkPDPKCLJ0+iKMx5Hij6aBqyV+gxyBp
 oc7XC4VCMNChnpxgqVzEuweTUf/3YiEDI0pQqG7pt2E/SLFoi98r4T3OH23PjdWM
 13HjilUFKVD4DNWSLCtdS9+TksvYirL7SiRhqL6x1e1qHKsvWaNwP346kEmKG5Gl
 sls152oyiNrLLiIZucuzLsJthlqJIWH+r5GNBtvxx/TO8i7O82c24wyohJm+U4lt
 liwyPQtudDTnPkA4fbTevNqQlPRMXv1/w5B2LMfJiLmbbh0fVHWaU7beHwyDji73
 xF4zYtzEp4zmIQ==
 =rqGK
 -----END PGP SIGNATURE-----

Merge tag 'powerpc-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fix from Michael Ellerman:

 - On Power8 bare metal, fix creation of RNG platform devices, which are
   needed for the /dev/hwrng driver to probe correctly.

Thanks to Jason A. Donenfeld, and Sachin Sant.

* tag 'powerpc-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/powernv: delay rng platform device creation until later in boot
2022-07-09 10:34:08 -07:00
Pawan Gupta
4ad3278df6 x86/speculation: Disable RRSBA behavior
Some Intel processors may use alternate predictors for RETs on
RSB-underflow. This condition may be vulnerable to Branch History
Injection (BHI) and intramode-BTI.

Kernel earlier added spectre_v2 mitigation modes (eIBRS+Retpolines,
eIBRS+LFENCE, Retpolines) which protect indirect CALLs and JMPs against
such attacks. However, on RSB-underflow, RET target prediction may
fallback to alternate predictors. As a result, RET's predicted target
may get influenced by branch history.

A new MSR_IA32_SPEC_CTRL bit (RRSBA_DIS_S) controls this fallback
behavior when in kernel mode. When set, RETs will not take predictions
from alternate predictors, hence mitigating RETs as well. Support for
this is enumerated by CPUID.7.2.EDX[RRSBA_CTRL] (bit2).

For spectre v2 mitigation, when a user selects a mitigation that
protects indirect CALLs and JMPs against BHI and intramode-BTI, set
RRSBA_DIS_S also to protect RETs for RSB-underflow case.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2022-07-09 13:12:45 +02:00
Konrad Rzeszutek Wilk
697977d841 x86/kexec: Disable RET on kexec
All the invocations unroll to __x86_return_thunk and this file
must be PIC independent.

This fixes kexec on 64-bit AMD boxes.

  [ bp: Fix 32-bit build. ]

Reported-by: Edward Tran <edward.tran@oracle.com>
Reported-by: Awais Tanveer <awais.tanveer@oracle.com>
Suggested-by: Ankur Arora <ankur.a.arora@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2022-07-09 13:12:32 +02:00
Linus Torvalds
525496a030 ACPI fixes for 5.19-rc6
- Prevent _CPC from being used if the platform firmware does not
    confirm CPPC v2 support via _OSC (Mario Limonciello).
 
  - Allow systems with X86_FEATURE_CPPC set to use _CPC even if CPPC
    support cannot be agreed on via _OSC (Mario Limonciello).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmLIgTwSHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxmDAP/1OEgChbdJNvhg7no4BHEwSyuArAVcRD
 +D5bCiPq8x5dSNke3BrN4n789fhsHphXucqI5yTq7lX1AonyO1EHkc+oG+EGrZ+8
 dyw+6Nx4WdJkOLKrEwQm3QQYuBK/k4pCUwhWBBg5FEsn4QldBE2pzEC8aP7gNgN6
 gAxs+6nC7r/9fMoRo8+SG9Xrr1FH1mddru4WTp6croLNrlLVXTaoAHwXMB4qk8in
 JC8bvfnWSWXn05fvJ+nYf8wb93tjBsuyx/Om7kmP7V1WT30fidv+BdP50x6kFq9/
 nE0iTAAgqiO1SpRpUHfYc63GUvBC9d9ZUsbSyT7fMEqZCqLRsKukUA5xFxgQORBi
 fKWVVSjOaQUFk0eeivdqWTgpaIRkjxVCmLFxGN/vY3T1pqAmJIdoY5x7ZzxuOrBW
 6h1zOT0Qm9LURrlnXhcFHXALXFAGVpYCoP4X0PhNi9fZCSrjraG77dar0fj5KgHv
 pUnLTL1qHxrzX/Ax7LJ/Usc+mKO8s/Wd790CvtFElHIsH5p7Bx/l3BDdQHbGK2l2
 ToO9WQQCumccXs6SHCVYQJIH1pr0UIB2X15FNrmLVem8WkEBFJ7DwrZ/nitenOV3
 c9BsQr+rJ3s9S9aSYvIAadurPzC6x5lKu0GKMUfM2GUl/vVcFrzkzlAATD467/IC
 Z7gsfL1UtOwx
 =yWsx
 -----END PGP SIGNATURE-----

Merge tag 'acpi-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI fixes from Rafael Wysocki:
 "These fix two recent regressions related to CPPC support.

  Specifics:

   - Prevent _CPC from being used if the platform firmware does not
     confirm CPPC v2 support via _OSC (Mario Limonciello)

   - Allow systems with X86_FEATURE_CPPC set to use _CPC even if CPPC
     support cannot be agreed on via _OSC (Mario Limonciello)"

* tag 'acpi-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported
  ACPI: CPPC: Only probe for _CPC if CPPC v2 is acked
2022-07-08 13:05:56 -07:00
Thadeu Lima de Souza Cascardo
2259da159f x86/bugs: Do not enable IBPB-on-entry when IBPB is not supported
There are some VM configurations which have Skylake model but do not
support IBPB. In those cases, when using retbleed=ibpb, userspace is going
to be killed and kernel is going to panic.

If the CPU does not support IBPB, warn and proceed with the auto option. Also,
do not fallback to IBPB on AMD/Hygon systems if it is not supported.

Fixes: 3ebc17006888 ("x86/bugs: Add retbleed=ibpb")
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2022-07-08 12:50:52 +02:00
Linus Torvalds
e8a4e1c1bb LoongArch fixes for v5.19-rc6
-----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCAA0FiEEzOlt8mkP+tbeiYy5AoYrw/LiJnoFAmLG0Z0WHGNoZW5odWFj
 YWlAa2VybmVsLm9yZwAKCRAChivD8uImem8AD/wK4n00XDJDxadGfO7/NOmKCJfx
 vnd1qjih9GK4/V/8HFPYSI0i9K2OoNFjo6ZmdczoWC/VU+9xepPrX385t2nxVLX/
 tw9Nvi+J8wxEb1mhYX3nDExMV8FTli648wSVVAx3v906ZapQ7/MJ/gjdVlLVKgeT
 hCdY6YXF6Oqgxy0XGs4fgvAbO2kt60eenyJ+q85S4sfWDxWXpiI+5pNKlxufmdue
 H5v+lGvriXTIIF/1oONKt6PP5L0waNNs1mX1x3sBfaGbpCY//U4jnQXcXr2qQBfv
 10zXnhPKRQUngI3PKpjunp+d22h/W3IVcZNStlmfNeOhFEu3R+4j64vAkb8egdhn
 WrSfu4mdFwIAQfhWB7XJJISDnuODtHtqVTX30HqSzNeI29nMrKanf5VS9YaYo+Y9
 IY0hdOgTWEGayguHYEvBZYcX5v7k6LJpGdm0szrs7BsLBupM4x01RmL7rzAIcLI3
 9Nhq4fA3JMkkfPef8mgQ8bkKBV6NfO8ip7Tux4KyI+uT24SgyR/DxvMXMNpFfZRj
 qEdbVnuon2qNi/GA26e4Uvm8WxH70ulnftUY+rO+zQU/Vi4z1nlrp+IupLErmtGE
 CVYG5uLAHRTh7A0wxkjfrgBm9s0BA9HSDf9w5CDZU5hqThuJR7dipb5w3G/m+OnX
 KJdz1BgS7ow87/NkIA==
 =hQVB
 -----END PGP SIGNATURE-----

Merge tag 'loongarch-fixes-5.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch fixes from Huacai Chen:
 "A fix for tinyconfig build error, a fix for section mismatch warning,
  and two cleanups of obsolete code"

* tag 'loongarch-fixes-5.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: Fix section mismatch warning
  LoongArch: Fix build errors for tinyconfig
  LoongArch: Remove obsolete mentions of vcsr
  LoongArch: Drop these obsolete selects in Kconfig
2022-07-07 10:41:27 -07:00
Peter Zijlstra
2c08b9b38f x86/entry: Move PUSH_AND_CLEAR_REGS() back into error_entry
Commit

  ee774dac0da1 ("x86/entry: Move PUSH_AND_CLEAR_REGS out of error_entry()")

moved PUSH_AND_CLEAR_REGS out of error_entry, into its own function, in
part to avoid calling error_entry() for XenPV.

However, commit

  7c81c0c9210c ("x86/entry: Avoid very early RET")

had to change that because the 'ret' was too early and moved it into
idtentry, bloating the text size, since idtentry is expanded for every
exception vector.

However, with the advent of xen_error_entry() in commit

  d147553b64bad ("x86/xen: Add UNTRAIN_RET")

it became possible to remove PUSH_AND_CLEAR_REGS from idtentry, back
into *error_entry().

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
2022-07-07 13:39:42 +02:00
Pawan Gupta
f54d45372c x86/bugs: Add Cannon lake to RETBleed affected CPU list
Cannon lake is also affected by RETBleed, add it to the list.

Fixes: 6ad0ad2bf8a6 ("x86/bugs: Report Intel retbleed vulnerability")
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2022-07-07 12:33:53 +02:00
Tiezhu Yang
f0fbe652e8 LoongArch: Fix section mismatch warning
init_numa_memory() is annotated __init and not used by any module,
thus don't export it.

Remove not needed EXPORT_SYMBOL for init_numa_memory() to fix the
following section mismatch warning:

  MODPOST vmlinux.symvers
WARNING: modpost: vmlinux.o(___ksymtab+init_numa_memory+0x0): Section mismatch in reference
from the variable __ksymtab_init_numa_memory to the function .init.text:init_numa_memory()
The symbol init_numa_memory is exported and annotated __init
Fix this by removing the __init annotation of init_numa_memory or drop the export.

This is build on Linux 5.19-rc4.

Fixes: d4b6f1562a3c ("LoongArch: Add Non-Uniform Memory Access (NUMA) support")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2022-07-07 17:41:01 +08:00
Huacai Chen
e6ee90233e LoongArch: Fix build errors for tinyconfig
Building loongarch:tinyconfig fails with the following error.

./arch/loongarch/include/asm/page.h: In function 'pfn_valid':
./arch/loongarch/include/asm/page.h:42:32: error: 'PHYS_OFFSET' undeclared

Add the missing include file and fix succeeding vdso errors.

Fixes: 09cfefb7fa70 ("LoongArch: Add memory management")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2022-07-07 17:41:01 +08:00
Qi Hu
112380996a LoongArch: Remove obsolete mentions of vcsr
The `vcsr` only exists in the old hardware design, it isn't used in any
shipped hardware from Loongson-3A5000 on. Both scalar FP and LSX/LASX
instructions use the `fcsr` as their control and status registers now.
For example, the RM control bit in fcsr0 is shared by FP, LSX and LASX
instructions.

Particularly, fcsr16 to fcsr31 are reserved for LSX/LASX now, access to
these registers has no visible effect if LSX/LASX is enabled, and will
cause SXD/ASXD exceptions if LSX/LASX is not enabled.

So, mentions of vcsr are obsolete in the first place (it was just used
for debugging), let's remove them.

Reviewed-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Qi Hu <huqi@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2022-07-07 17:41:01 +08:00
Lukas Bulwahn
7fd6ef61a5 LoongArch: Drop these obsolete selects in Kconfig
Commit fa96b57c1490 ("LoongArch: Add build infrastructure") adds the new
file arch/loongarch/Kconfig.

As the work on LoongArch was probably quite some time under development,
various config symbols have changed and disappeared from the time of
initial writing of the Kconfig file and its inclusion in the repository.

The following four commits:

  commit c126a53c2760 ("arch: remove GENERIC_FIND_FIRST_BIT entirely")
  commit 140c8180eb7c ("arch: remove HAVE_COPY_THREAD_TLS")
  commit aca52c398389 ("mm: remove CONFIG_HAVE_MEMBLOCK")
  commit 3f08a302f533 ("mm: remove CONFIG_HAVE_MEMBLOCK_NODE_MAP option")

remove the mentioned config symbol, and enable the intended setup by
default without configuration.

Drop these obsolete selects in loongarch's Kconfig.

Reviewed-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2022-07-07 17:41:01 +08:00
Ard Biesheuvel
e5c46fde75 ARM: 9214/1: alignment: advance IT state after emulating Thumb instruction
After emulating a misaligned load or store issued in Thumb mode, we have
to advance the IT state by hand, or it will get out of sync with the
actual instruction stream, which means we'll end up applying the wrong
condition code to subsequent instructions. This might corrupt the
program state rather catastrophically.

So borrow the it_advance() helper from the probing code, and use it on
CPSR if the emulated instruction is Thumb.

Cc: <stable@vger.kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-06 22:44:49 +01:00
Dmitry Osipenko
e4ced82deb ARM: 9213/1: Print message about disabled Spectre workarounds only once
Print the message about disabled Spectre workarounds only once. The
message is printed each time CPU goes out from idling state on NVIDIA
Tegra boards, causing storm in KMSG that makes system unusable.

Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-06 22:44:49 +01:00
Linus Walleij
2bf6204240 ARM: 9212/1: domain: Modify Kconfig help text
After the removal of set_fs() the reference to set_fs() is stale.
Alter the helptext to reflect what the config option really does.

Fixes: 8ac6f5d7f84b ("ARM: 9113/1: uaccess: remove set_fs() implementation")
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-06 22:44:49 +01:00
Linus Walleij
cc45b83638 ARM: 9211/1: domain: drop modify_domain()
This function/macro isn't used anywhere in the kernel.
The only user was set_fs() and was deleted in the set_fs()
removal patch set.

Fixes: 8ac6f5d7f84b ("ARM: 9113/1: uaccess: remove set_fs() implementation")
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-06 22:44:49 +01:00
Zhen Lei
598f0a99fa ARM: 9210/1: Mark the FDT_FIXED sections as shareable
commit 7a1be318f579 ("ARM: 9012/1: move device tree mapping out of linear
region") use FDT_FIXED_BASE to map the whole FDT_FIXED_SIZE memory area
which contains fdt. But it only reserves the exact physical memory that
fdt occupied. Unfortunately, this mapping is non-shareable. An illegal or
speculative read access can bring the RAM content from non-fdt zone into
cache, PIPT makes it to be hit by subsequently read access through
shareable mapping(such as linear mapping), and the cache consistency
between cores is lost due to non-shareable property.

|<---------FDT_FIXED_SIZE------>|
|                               |
 -------------------------------
| <non-fdt> | <fdt> | <non-fdt> |
 -------------------------------

1. CoreA read <non-fdt> through MT_ROM mapping, the old data is loaded
   into the cache.
2. CoreB write <non-fdt> to update data through linear mapping. CoreA
   received the notification to invalid the corresponding cachelines, but
   the property non-shareable makes it to be ignored.
3. CoreA read <non-fdt> through linear mapping, cache hit, the old data
   is read.

To eliminate this risk, add a new memory type MT_MEMORY_RO. Compared to
MT_ROM, it is shareable and non-executable.

Here's an example:
  list_del corruption. prev->next should be c0ecbf74, but was c08410dc
  kernel BUG at lib/list_debug.c:53!
  ... ...
  PC is at __list_del_entry_valid+0x58/0x98
  LR is at __list_del_entry_valid+0x58/0x98
  psr: 60000093
  sp : c0ecbf30  ip : 00000000  fp : 00000001
  r10: c08410d0  r9 : 00000001  r8 : c0825e0c
  r7 : 20000013  r6 : c08410d0  r5 : c0ecbf74  r4 : c0ecbf74
  r3 : c0825d08  r2 : 00000000  r1 : df7ce6f4  r0 : 00000044
  ... ...
  Stack: (0xc0ecbf30 to 0xc0ecc000)
  bf20:                                     c0ecbf74 c0164fd0 c0ecbf70 c0165170
  bf40: c0eca000 c0840c00 c0840c00 c0824500 c0825e0c c0189bbc c088f404 60000013
  bf60: 60000013 c0e85100 000004ec 00000000 c0ebcdc0 c0ecbf74 c0ecbf74 c0825d08
  ... ...                                           <  next     prev  >
  (__list_del_entry_valid) from (__list_del_entry+0xc/0x20)
  (__list_del_entry) from (finish_swait+0x60/0x7c)
  (finish_swait) from (rcu_gp_kthread+0x560/0xa20)
  (rcu_gp_kthread) from (kthread+0x14c/0x15c)
  (kthread) from (ret_from_fork+0x14/0x24)

The faulty list node to be deleted is a local variable, its address is
c0ecbf74. The dumped stack shows that 'prev' = c0ecbf74, but its value
before lib/list_debug.c:53 is c08410dc. A large amount of printing results
in swapping out the cacheline containing the old data(MT_ROM mapping is
read only, so the cacheline cannot be dirty), and the subsequent dump
operation obtains new data from the DDR.

Fixes: 7a1be318f579 ("ARM: 9012/1: move device tree mapping out of linear region")
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-06 22:44:48 +01:00
Ard Biesheuvel
0609e20024 ARM: 9209/1: Spectre-BHB: avoid pr_info() every time a CPU comes out of idle
Jon reports that the Spectre-BHB init code is filling up the kernel log
with spurious notifications about which mitigation has been enabled,
every time any CPU comes out of a low power state.

Given that Spectre-BHB mitigations are system wide, only a single
mitigation can be enabled, and we already print an error if two types of
CPUs coexist in a single system that require different Spectre-BHB
mitigations.

This means that the pr_info() that describes the selected mitigation
does not need to be emitted for each CPU anyway, and so we can simply
emit it only once.

In order to clarify the above in the log message, update it to describe
that the selected mitigation will be enabled on all CPUs, including ones
that are unaffected. If another CPU comes up later that is affected and
requires a different mitigation, we report an error as before.

Fixes: b9baf5c8c5c3 ("ARM: Spectre-BHB workaround")
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-07-06 22:44:48 +01:00
Linus Torvalds
9f09069cde OpenRISC fixes for 5.19-rc5
Fixups for OpenRISC found during recent testing:
  - An OpenRISC irqchip fix to stop acking level interrupts which was
    causing issues on SMP platforms.
  - A comment typo fix in our unwinder code.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmLFiUMACgkQw7McLV5m
 J+RIvRAAg3Aru9TPDSqL5/NS2AF+sJAJLBuG0FXNSvVl5xSKsZZ/cVcFHx2vK0U3
 UMoVnmKTuNIFF47HnkOZ6yCseM06OYWzQREyS203zvVqUjjR1tVfz0uX9p9gGxio
 wFai3YNBH923dfLE9M2BpGvpKVWbD5zrZlCu+3Br1kfFxZ+B0PQECqZlXhrqIKx0
 7IRrV3N/lPfvZY45/cROofQNaGG71Z/DhdHy6XL/CMCeAyRcSJCM5kcWmjPKGefO
 ZYjaypid78EQwf0hDGMrP/BmBmErYxIrbUoqKslPhLifYfdK0EaNE7nQqKENu99G
 igXNhn5akoBIxczakTTlK69R9DecYsu4gzRfEaqsBwpJXS4Ndq2MdN1cozZTB0Zp
 lAkFFXR0EqwxSaF8qF7FhStRj+luT+dl3BKJqwQPYoohNEC4Z8VCm9VZJJpkLt2N
 hX+SD/wLUg1Yay7orSdAD/R7M9lypFgV3fpjtjtJcZR5EE70R69Rp6h7cci7XaM+
 pe9lMeTRQsqiNq2QZHPFN7RVLMs+pgwEJdUOmXsrEC+arpQCEMnREsnHOeSQxckx
 DZf7wMkx2c4VcSRaxmkIKfz6iWnqscOkkBkzrakcPBoBMs5kv1VXRqBlOxwtkt00
 m8seJg+n9agg7kynIqARqffEJESTy2RQhjuvQVw3nkKGQvsmays=
 =Uug/
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of https://github.com/openrisc/linux

Pull OpenRISC fixes from Stafford Horne:
 "Fixups for OpenRISC found during recent testing:

   - An OpenRISC irqchip fix to stop acking level interrupts which was
     causing issues on SMP platforms

   - A comment typo fix in our unwinder code"

* tag 'for-linus' of https://github.com/openrisc/linux:
  openrisc: unwinder: Fix grammar issue in comment
  irqchip: or1k-pic: Undefine mask_ack for level triggered hardware
2022-07-06 10:10:26 -07:00
Michael Roth
b57feed2cc x86/compressed/64: Add identity mappings for setup_data entries
The decompressed kernel initially relies on the identity map set up by
the boot/compressed kernel for accessing things like boot_params. With
the recent introduction of SEV-SNP support, the decompressed kernel
also needs to access the setup_data entries pointed to by
boot_params->hdr.setup_data.

This can lead to a crash in the kexec kernel during early boot due to
these entries not currently being included in the initial identity map,
see thread at Link below.

Include mappings for the setup_data entries in the initial identity map.

  [ bp: Massage commit message and use a helper var for better readability. ]

Fixes: b190a043c49a ("x86/sev: Add SEV-SNP feature detection/setup")
Reported-by: Jun'ichi Nomura <junichi.nomura@nec.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/TYCPR01MB694815CD815E98945F63C99183B49@TYCPR01MB6948.jpnprd01.prod.outlook.com
2022-07-06 11:23:39 +02:00
Mario Limonciello
8b356e536e ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported
commit 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all and
when CPPC_LIB is supported") added support for claiming to
support CPPC in _OSC on non-Intel platforms.

This unfortunately caused a regression on a vartiety of AMD
platforms in the field because a number of AMD platforms don't set
the `_OSC` bit 5 or 6 to indicate CPPC or CPPC v2 support.

As these AMD platforms already claim CPPC support via a dedicated
MSR from `X86_FEATURE_CPPC`, use this enable this feature rather
than requiring the `_OSC` on platforms with a dedicated MSR.

If there is additional breakage on the shared memory designs also
missing this _OSC, additional follow up changes may be needed.

Fixes: 72f2ecb7ece7 ("Set CPPC _OSC bits for all and when CPPC_LIB is supported")
Reported-by: Perry Yuan <perry.yuan@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-07-05 20:36:11 +02:00
Linus Torvalds
e35e5b6f69 xen: security patches for v5.19
-----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRTLbB6QfY48x44uB6AXGG7T9hjvgUCYr64gAAKCRCAXGG7T9hj
 vhx7AQChLGeEpu/4W47ielRG5c2HEg9g36LnRNZA9CyUqWPzPwD7B5LbAbY6gIM2
 8rNbFXQZVbqRTNb82IQlNWbZK5IV9gU=
 =Mee5
 -----END PGP SIGNATURE-----

Merge tag 'xsa-5.19-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip

Pull xen security fixes from Juergen Gross:

 - XSA-403 (4 patches for blkfront and netfront drivers):

   Linux Block and Network PV device frontends don't zero memory regions
   before sharing them with the backend (CVE-2022-26365,
   CVE-2022-33740). Additionally the granularity of the grant table
   doesn't allow sharing less than a 4K page, leading to unrelated data
   residing in the same 4K page as data shared with a backend being
   accessible by such backend (CVE-2022-33741, CVE-2022-33742).

 - XSA-405 (1 patch for netfront driver, only 5.10 and newer):

   While adding logic to support XDP (eXpress Data Path), a code label
   was moved in a way allowing for SKBs having references (pointers)
   retained for further processing to nevertheless be freed.

 - XSA-406 (1 patch for Arm specific dom0 code):

   When mapping pages of guests on Arm, dom0 is using an rbtree to keep
   track of the foreign mappings.

   Updating of that rbtree is not always done completely with the
   related lock held, resulting in a small race window, which can be
   used by unprivileged guests via PV devices to cause inconsistencies
   of the rbtree. These inconsistencies can lead to Denial of Service
   (DoS) of dom0, e.g. by causing crashes or the inability to perform
   further mappings of other guests' memory pages.

* tag 'xsa-5.19-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  xen/arm: Fix race in RB-tree based P2M accounting
  xen-netfront: restore __skb_queue_tail() positioning in xennet_get_responses()
  xen/blkfront: force data bouncing when backend is untrusted
  xen/netfront: force data bouncing when backend is untrusted
  xen/netfront: fix leaking data in shared pages
  xen/blkfront: fix leaking data in shared pages
2022-07-05 09:18:32 -07:00
Linus Torvalds
c1084b6c56 ARM: SoC fixes for v5.19, part 2
Another set of minor patches for Arm DTS files and soc specific drivers:
 
  - More reference counting bug fixes for DT nodes, and other
    trivial code fixes
 
  - Multiple code fixes for the Arm SCMI firmware driver to improve
    compatibility with firmware implementations.
 
  - A patch series for at91 to address power management issues from
    using the wrong DT compatible properties.
 
  - A series of patches to fix pad settings for NXP imx8mp to leave the
    configuration untouched from the boot loader
 
  - Additional DT fixes for qualcomm and NXP platforms
 
  - A boot time fix for stm32mp15 DT
 
  - Konrad Dybcio becomes an additional reviewer for the Qualcomm
    platforms
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLDCBUACgkQmmx57+YA
 GNnWoRAAkyuPRlFCOz7Ul5XcywCpNfeqBnHyCs+s1zASK5N00OIEA0knxmk+HEbo
 NLELeH8yHAPVOgjT4J2FSB756QPq7zOs8LjcGTxYwPbAxxBAHKtbVujh56UMxg19
 zhIE99WyGhF8rkwciHelTsHRdWdFcVEy1NCdxJSsH5SW2EQZiMsOWT7uRIe8xBFH
 XIXOmLAwNGvFVLKI+43ZQZFErZd2wFDv6oZ8eIrLAr0I2A7/ak66DKEzT7a7EcdU
 ozzcxi64QqDHcTHQGGGCx3qFIqkPs/qKOY4kweNnEqjzu9pQyiZxw+tBCFOu/EyB
 FgSsZy7qvT/lsl34Ty07Mu4Ztf41KfJqtq1h71YHwgD1vV17FZHHg5SNH+FctIgH
 t4DkisiJ6nKNB1czEq4YjYqlxt2UECmdOypLlZSGbjvip/TWnxEO7dm13nv9jO2I
 wnTLUbq03ZG3ijW72f8hFkBi8JsXUVed5OJ99f8CzOOOFuzmuraWNzKSKtcV7vqJ
 rLilZEu+LFmY+qt6ZemANz+V9oMM3WfOJocFQWGCgT+jwwNcIdmyB1EFChocamDG
 nBphxXgFepGj5sStimy/b20QkU2kyQpZCd0VUKwbvMqTqp0Tk1BceP/WLKmgQLjY
 dp8a9dunazGRKlzztZRqUIwVRY/bjszPpVby/BQzwdoOIVkKg94=
 =5KYh
 -----END PGP SIGNATURE-----

Merge tag 'soc-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Another set of minor patches for Arm DTS files and soc specific
  drivers:

   - More reference counting bug fixes for DT nodes, and other trivial
     code fixes

   - Multiple code fixes for the Arm SCMI firmware driver to improve
     compatibility with firmware implementations.

   - A patch series for at91 to address power management issues from
     using the wrong DT compatible properties.

   - A series of patches to fix pad settings for NXP imx8mp to leave the
     configuration untouched from the boot loader

   - Additional DT fixes for qualcomm and NXP platforms

   - A boot time fix for stm32mp15 DT

   - Konrad Dybcio becomes an additional reviewer for the Qualcomm
     platforms"

* tag 'soc-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits)
  soc: qcom: smem: use correct format characters
  ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
  ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
  ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
  ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
  ARM: dts: stm32: fix pwr regulators references to use scmi
  soc: ixp4xx/npe: Fix unused match warning
  ARM: at91: pm: Mark at91_pm_secure_init as __init
  ARM: at91: fix soc detection for SAM9X60 SiPs
  ARM: dts: at91: sama5d2_icp: fix eeprom compatibles
  ARM: dts: at91: sam9x60ek: fix eeprom compatible and size
  ARM: at91: pm: use proper compatibles for sama7g5's rtc and rtt
  ARM: at91: pm: use proper compatibles for sam9x60's rtc and rtt
  ARM: at91: pm: use proper compatible for sama5d2's rtc
  arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo
  firmware: arm_scmi: Remove usage of the deprecated ida_simple_xxx API
  firmware: arm_scmi: Fix response size warning for OPTEE transport
  arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings
  arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settings
  arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings
  ...
2022-07-04 10:41:59 -07:00
Arnd Bergmann
c0d1a7bd65 STM32 DT fixes for v5.19, round 2
Highlights:
 -----------
 
  -Fixes STM32MP15:
   - Add missing usbh clock and fix clk order for usbh to avoid PLL
     issue.
   - Fix SCMI version: use scmi regulator and update missing SCMI
     clocks to be able to correcly boot.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmLCmuAdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIXZQBAAoX68LeCnEUxX92ww
 2nwZppOCMIIt93s60V66spqA6v3NNvUH/uRfK+yZrZbMsRcUTz4iSMHfTDpcjquK
 GCOobqjSwnxfIWbAcNzVaiCLApHND42eOnGegjip88qcF9xyiOUul0g3IlVZ1/0G
 QJBur3ULDYudBodssn52XrHrOD1gnq+QcBN5LnIfu2oz/CDWSOotR5weZR88OA5O
 1JI63nDQkIDVg2e40/SF1X1E8GZ65oaP4Cedkc9yi7Gxw44rFkVZKH7Km/4yzVgR
 5OfMXoq9Dp4gDPBdxrhVVvKYDl1mKF0H9n5xRx4vvvPFAGkX5R6rnoRii4VXYbrl
 7YSbCNh3SjJM7COenxck9TWOm6OO+6JiQWpl3cvi4HaPhKsBbXBZzQEmWZUxzhxd
 MCxmUQUxvBw/BjGMoW1HczZjxCzCaDwuKldvye3RvKErMwuWq3+PtucBMfxUtsSf
 dxj87BYFAW7jax0GN3Je7exT4BO4p/SEJ2bS/x9uZKwSQTwl7w3TFKyr7moj51T7
 H+1WOxkaQ0xG9H7Dqxol0vGD8DPsLNiXFQj0+aP8QXHWoBQEH2Loolh0WGMbTVrN
 OP+HP8OyuiKsKA3mM1aUSg4UFUaK4feaf3l75VxISYOpUwa3fK/WgCfhQgbZDGjy
 HGaRbvlgws9c8c81QGUIGsVDdWU=
 =JpmO
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLC3R8ACgkQmmx57+YA
 GNnHrhAAnZLp1j5NQU/Sk464ilb9sqA2fDqLyQb+IEtO4rMa/ggd22mngCSTYa26
 hPTKAvAoNgmydLT3MMF7xozRUa865HlGx3sU+pRPT9DSkOxmagOEe8J5ZNTIYkAw
 nA10scojdly7DYRzBt1kFve5C3rjA2QS1A/kuSVSQKUBl7EbjcC3YjVALvnPoe+K
 vAVYU1Ol74hDLOPIG4miitFe8AqInbLkSnJ9KXPmSjZ2JwiGY0ppGoVK+FnT+fTp
 WDF4pqo91OUzQO19luvzPvnwgn6OK22GeCq/Q6g94RvhMpY63QgUJAC9LvJrCUVz
 tGztEWuVvEK7ExnxuasBhRl2EDA7A8ajRU3GocgUFmf5seB92+03JBv1HzkOJ+rb
 tJhprp8HAHHjyn+V7AAph2QRfWq4oegjkFY5DaVQPkwvN4uEVcJihKZYqHCE8P2z
 fdlDab82RO7+XUDUa/qsWQZ0UVxqI/AHnxbFn5EaW4j2RDBaV2E0dXSNiKlKnbM/
 uPaZNNuw5Jv67VpL+GFMiBQcq7kHd3EqLmSnaTo/AjVEcMosJx8uFIHUJpoKdrSg
 NGPwRHfx0Jesy+93sGT54XjdfCYXiSa3mZuZX/FQl8Fu7/UIVTmRiYOlyonh0aFk
 Yg6rYgbQKjRdwcpFuatWdefr7tRzDMNJ0d+6r2nzrpydvDgATr0=
 =FqVy
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/fixes

STM32 DT fixes for v5.19, round 2

Highlights:
-----------

 -Fixes STM32MP15:
  - Add missing usbh clock and fix clk order for usbh to avoid PLL
    issue.
  - Fix SCMI version: use scmi regulator and update missing SCMI
    clocks to be able to correcly boot.

* tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
  ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
  ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
  ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
  ARM: dts: stm32: fix pwr regulators references to use scmi

Link: https://lore.kernel.org/r/1259e082-a3a4-96a5-ec9c-05dbb893a746@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04 14:29:19 +02:00
Jason A. Donenfeld
8875028265 powerpc/powernv: delay rng platform device creation until later in boot
The platform device for the rng must be created much later in boot.
Otherwise it tries to connect to a parent that doesn't yet exist,
resulting in this splat:

  [    0.000478] kobject: '(null)' ((____ptrval____)): is not initialized, yet kobject_get() is being called.
  [    0.002925] [c000000002a0fb30] [c00000000073b0bc] kobject_get+0x8c/0x100 (unreliable)
  [    0.003071] [c000000002a0fba0] [c00000000087e464] device_add+0xf4/0xb00
  [    0.003194] [c000000002a0fc80] [c000000000a7f6e4] of_device_add+0x64/0x80
  [    0.003321] [c000000002a0fcb0] [c000000000a800d0] of_platform_device_create_pdata+0xd0/0x1b0
  [    0.003476] [c000000002a0fd00] [c00000000201fa44] pnv_get_random_long_early+0x240/0x2e4
  [    0.003623] [c000000002a0fe20] [c000000002060c38] random_init+0xc0/0x214

This patch fixes the issue by doing the platform device creation inside
of machine_subsys_initcall.

Fixes: f3eac426657d ("powerpc/powernv: wire up rng during setup_arch")
Cc: stable@vger.kernel.org
Reported-by: Sachin Sant <sachinp@linux.ibm.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Tested-by: Sachin Sant <sachinp@linux.ibm.com>
[mpe: Change "of node" to "platform device" in change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220630121654.1939181-1-Jason@zx2c4.com
2022-07-04 21:11:47 +10:00
Fabrice Gasnier
1d0c1aadf1 ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
The USBH composed of EHCI and OHCI controllers needs the PHY clock to be
initialized first, before enabling (gating) them. The reverse is also
required when going to suspend.
So, add USBPHY clock as 1st entry in both controllers, so the USBPHY PLL
gets enabled 1st upon controller init. Upon suspend/resume, this also makes
the clock to be disabled/re-enabled in the correct order.
This fixes some IRQ storm conditions seen when going to low-power, due to
PHY PLL being disabled before all clocks are cleanly gated.

Fixes: 949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c")
Fixes: db7be2cb87ae ("ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04 09:10:24 +02:00
Gabriel Fernandez
bf74181e75 ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
Delete the node fixed clock managed by secure world with SCMI.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04 09:10:24 +02:00
Gabriel Fernandez
cfd7ea394c ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
LSE clock is provided by SCMI.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04 09:10:24 +02:00
Gabriel Fernandez
78ece8cce1 ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
The peripheral clock of CEC is not LSE but CEC.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04 09:10:24 +02:00
Etienne Carriere
a34b42f869 ARM: dts: stm32: fix pwr regulators references to use scmi
Fixes stm32mp15*-scmi DTS files introduced in [1] to also access PWR
regulators through SCMI service. This is needed since enabling secure
only access to RCC clock and reset controllers also enables secure
access only on PWR voltage regulators reg11, reg18 and usb33 hence
these must also be accessed through SCMI Voltage Domain protocol.
This change applies on commit [2] that already corrects issues from
commit [1].

Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link: [1] https://lore.kernel.org/linux-arm-kernel/20220422150952.20587-7-alexandre.torgue@foss.st.com
Link: [2] https://lore.kernel.org/linux-arm-kernel/20220613071920.5463-1-alexandre.torgue@foss.st.com
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04 09:10:24 +02:00
YueHaibing
34c0a5b04d riscv/mm: fix build error while PAGE_TABLE_CHECK enabled without MMU
mm/page_table_check.c: In function `__page_table_check_pte_clear':
mm/page_table_check.c:148:6: error: implicit declaration of function `pte_user_accessible_page'; did you mean `user_access_save'? [-Werror=implicit-function-declaration]
  if (pte_user_accessible_page(pte)) {
      ^~~~~~~~~~~~~~~~~~~~~~~~
      user_access_save

ARCH_SUPPORTS_PAGE_TABLE_CHECK should only enabled with MMU.

Link: https://lkml.kernel.org/r/20220624085236.18544-1-yuehaibing@huawei.com
Fixes: 3fee229a8eb9 ("riscv/mm: enable ARCH_SUPPORTS_PAGE_TABLE_CHECK")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Pasha Tatashin <pasha.tatashin@soleen.com>
Cc: Tong Tiangen <tongtiangen@huawei.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-07-03 15:42:32 -07:00
Geert Uytterhoeven
d684e0a52d sh: convert nommu io{re,un}map() to static inline functions
Recently, nommu iounmap() was converted from a static inline function to a
macro again, basically reverting commit 4580ba4ad2e6b8dd ("sh: Convert
iounmap() macros to inline functions").  With -Werror, this leads to build
failures like:

    drivers/iio/adc/xilinx-ams.c: In function `ams_iounmap_ps':
    drivers/iio/adc/xilinx-ams.c:1195:14: error: unused variable `ams' [-Werror=unused-variable]
     1195 |  struct ams *ams = data;
	  |              ^~~

Fix this by replacing the macros for ioremap() and iounmap() by static
inline functions, based on <asm-generic/io.h>.

Link: https://lkml.kernel.org/r/8d1b1766260961799b04035e7bc39a7f59729f72.1655708312.git.geert+renesas@glider.be
Fixes: 13f1fc870dd74713 ("sh: move the ioremap implementation out of line")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-07-03 15:42:32 -07:00
Arnd Bergmann
7ecd8a7af3 Qualcomm ARM64 DT fixes for v5.19
This removes duplicate includes in the sc7180-trogdor files, which
 accidentally ended up disabling nodes intended to be enabled.
 
 It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's
 interconnects property is updated to match the #interconnect-cells,
 avoiding sync_state issues and the GIC ITS is defined, to correct the
 references from the PCIe nodes. On SDM845 the display subsystem's AHB
 clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2
 are correctly specified.
 
 Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLBBmobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FuvsQAKP6BXA5FQ13nHdfFh38
 kgNdw93SIn49MW7jxHbnYRXxxW0j1SxxipQAZmlfChE3qptfjzaQcdtN/AboNLi8
 sBT03vjoMPysoe9aLOEY3BLCsM/qB3AiP5jXEahu8P3RbU6cY69W8mUEoZhzBi3H
 Cow0g0zg37R48W7DZkh+B0rDzFk48TGzbnrBCwrJ4PF3cciNVKZOWmBMA3Vm0741
 vckIU1WCff3v56ZyAusv4wmDBq5Y0K5/PCx4xz3qoFXBXoH27I0XxywXgbb2tmtH
 MqxeOjS+hwJePW3dqMs2h09z0Uf5NT2cgoobCMkNOl3j/0Dwrn0zINRxBVNCLVDq
 h084fcFxKqQWWbN+SDO5QUIyPgAs/XVyG8nzEXE19XftOIu9NGfTBOYZZ2kWGZCM
 IJIFfvxm6Xh73dd0afDRRMbxZrpLaBrq0vz4jF3A3Ycs7r5JEgsz18H1yo/YzGX0
 sXlTdTBUEaHZnfhQNfsNdVXaFcXWu0gLmH/sh7nRd++9Gl4d0r0Ro9Q/ZYfThsRI
 vWQWuhLq15JL2c/qGxK/BTHIdN/+d4v3pr5CirM+ijKUZjzyAsB6e6i6gf4WNEUi
 EdDf3Sj7IWOIAx4/80Xg+r+4MfCW5ZWKGSxIlpYFX83bSh2uM2Zopjiwg1qxw70k
 RgtLmTxsC22YnwWcks49OjWV
 =sObb
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLB/d8ACgkQmmx57+YA
 GNniWw/+NMqJ3hrizjmDS3sk2feWr6fU96gGYZ8myD/Qkw/5Kx3tOztf6mvU2SHm
 SGWyhIT72SalATxyH0EDzrx8UG/wcdXXN/3xwTnLS5BtwgqdjcltV33zD3WvcQVu
 Waswso1ULQH9NyWib+1aB5fFGJNUMtqWvGLBUJO2gQNphojTpICdHJKbe8B/VzXY
 z5n/3yOiaoOdpjy2p65Fi6LTlEmeZY5NtiZL5aIw83728eJILcLmX0vjtuGvG3df
 qp8HmFDhTYimQVqQC9bhG84lQSyGsos8/4ntxiYZddgL1ukmRRFb8ZAk9Vbvqkb8
 8RK8v7J75uKFF0SIQ8j0OOHN/J7SrrTCuvUlE+pjL+HpTFMwJm+wlPAvPUZl3Szg
 nMIExwZHklnzkW+mqTeQGm/RFzErAXPARuu4pmgy+6J01Az29qNq5S7TiszxKbSm
 cTPaPZCNLvAAHsZ4VudG6wzT56QB8NEv6ktvKELQ+e74x9AYe+unn3Url1vCTir6
 QjT/A3EoPf8bMQJAJNXMDOThVU7RNBEvi1kli8H6vGqvnTCedRCovso/ntAyvyF3
 dTV1CHIjVo9f/LN8TrxBIj2mUl4u0dGT5JCtQXWqJNKprkrXLOdH7I5DsVwAcJkY
 pWWpf8Nr1yMWSBa2gRs5zhR9dq0xJK8HX3+E5OfbN5Wum7AKrkw=
 =+pwl
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM64 DT fixes for v5.19

This removes duplicate includes in the sc7180-trogdor files, which
accidentally ended up disabling nodes intended to be enabled.

It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's
interconnects property is updated to match the #interconnect-cells,
avoiding sync_state issues and the GIC ITS is defined, to correct the
references from the PCIe nodes. On SDM845 the display subsystem's AHB
clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2
are correctly specified.

Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC.

* tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo
  MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support
  arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node
  arm64: dts: qcom: sm8450 add ITS device tree node
  arm64: dts: qcom: msm8994: Fix CPU6/7 reg values
  arm64: dts: qcom: sm8450: fix interconnects property of UFS node
  arm64: dts: qcom: Remove duplicate sc7180-trogdor include on lazor/homestar

Link: https://lore.kernel.org/r/20220703030208.408109-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-03 22:36:47 +02:00
Linus Torvalds
34074da542 parisc architecture fixes for kernel v5.19-rc5:
Two important fixes for bugs in code which was added in kernel v5.18:
 
 * Fix userspace signal failures on 32-bit kernel due to a bug in vDSO
 
 * Fix 32-bit load-word unalignment exception handler which returned
   wrong values
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCYsB3CwAKCRD3ErUQojoP
 Xym6AQDs4E/8udjG/VXF9cvhgP54/6P6a6CL2W0eX5LXqolSPAD+POqsShLkq4PN
 ynJa2BXRYi/YV21TKXj2MySsntfTpQQ=
 =xrkt
 -----END PGP SIGNATURE-----

Merge tag 'for-5.19/parisc-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux

Pull parisc architecture fixes from Helge Deller:
 "Two important fixes for bugs in code which was added in 5.18:

   - Fix userspace signal failures on 32-bit kernel due to a bug in vDSO

   - Fix 32-bit load-word unalignment exception handler which returned
     wrong values"

* tag 'for-5.19/parisc-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: Fix vDSO signal breakage on 32-bit kernel
  parisc/unaligned: Fix emulate_ldw() breakage
2022-07-02 10:23:36 -07:00
Helge Deller
aa78fa905b parisc: Fix vDSO signal breakage on 32-bit kernel
Addition of vDSO support for parisc in kernel v5.18 suddenly broke glibc
signal testcases on a 32-bit kernel.

The trampoline code (sigtramp.S) which is mapped into userspace includes
an offset to the context data on the stack, which is used by gdb and
glibc to get access to registers.

In a 32-bit kernel we used by mistake the offset into the compat context
(which is valid on a 64-bit kernel only) instead of the offset into the
"native" 32-bit context.

Reported-by: John David Anglin <dave.anglin@bell.net>
Tested-by: John David Anglin <dave.anglin@bell.net>
Fixes: 	df24e1783e6e ("parisc: Add vDSO support")
CC: stable@vger.kernel.org # 5.18
Signed-off-by: Helge Deller <deller@gmx.de>
2022-07-02 18:36:58 +02:00
Linus Torvalds
5411de0733 powerpc fixes for 5.19 #4
- Fix BPF uapi confusion about the correct type of bpf_user_pt_regs_t.
 
  - Fix virt_addr_valid() when memory is hotplugged above the boot-time high_memory value.
 
  - Fix a bug in 64-bit Book3E map_kernel_page() which would incorrectly allocate a PMD
    page at PUD level.
 
  - Fix a couple of minor issues found since we enabled KASAN for 64-bit Book3S.
 
 Thanks to: Aneesh Kumar K.V, Cédric Le Goater, Christophe Leroy, Kefeng Wang, Liam
 Howlett, Nathan Lynch, Naveen N. Rao.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmLAH8gTHG1wZUBlbGxl
 cm1hbi5pZC5hdQAKCRBR6+o8yOGlgP2XD/0d4n4PBQ0NnhetD62HoEYQplYNapgi
 B2sIfaYlDPC22NW23idOTCQF17HWVMDlWx+4wpqQrzC2YCJyzgt7/zALncwCnEiB
 LO0cCPqP4mS2FkYsAzpPnON6akLt60vYAuGa5qpH9IKVgZ4awak0IDSbxiODLrbQ
 q5KhE03GtasHevCOg9xrDXd2KkcTFVGy7LAfoubK0uBq8nLOrCPGFm5X9sJtlbtM
 S9TMGd51zWyOy2weNA26npO/MMEI6/ljXn7Kn8M2EfkmIdIxaZSluFa2OSJsEFXH
 x4Dr2Ex9iPwtD+mE1Z4uA3+8EnvSbtZgL/BfoqB2wlwLrEWZH9D/Hs2ZwrbsbKEW
 WDBma/MUYL1hGCW3msjUGxT8dInaYzF5Z8sUimqpVy9HGIQXNza1lmh0kkrfpHSZ
 2SeR/ThO9YsCUNJqDBVBcMvA1tRNB/NrwCXoDUNBTW9/In0WkHr+Lo5Du81AMhcW
 QjKHqnYv9UwBZHU7sqQE3HkxsY1JEA84bN6IRB/CE8sM3xRrDGDJaZVwCPpgDxT4
 LfADCoySDfNOUml4640Bsde9/T6SRgjgzEkmGVkMqap38YaHZquPjYNYyzJG596w
 SKvhpARwMQkpHPGOiM+VQznuXVaItmBZt8gb6E0CEQhyGtRn+RyAIIkGu+UTEzhQ
 ZiTzwLOrtszp3g==
 =l3Rj
 -----END PGP SIGNATURE-----

Merge tag 'powerpc-5.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:

 - Fix BPF uapi confusion about the correct type of bpf_user_pt_regs_t.

 - Fix virt_addr_valid() when memory is hotplugged above the boot-time
   high_memory value.

 - Fix a bug in 64-bit Book3E map_kernel_page() which would incorrectly
   allocate a PMD page at PUD level.

 - Fix a couple of minor issues found since we enabled KASAN for 64-bit
   Book3S.

Thanks to Aneesh Kumar K.V, Cédric Le Goater, Christophe Leroy, Kefeng
Wang, Liam Howlett, Nathan Lynch, and Naveen N. Rao.

* tag 'powerpc-5.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/memhotplug: Add add_pages override for PPC
  powerpc/bpf: Fix use of user_pt_regs in uapi
  powerpc/prom_init: Fix kernel config grep
  powerpc/book3e: Fix PUD allocation size in map_kernel_page()
  powerpc/xive/spapr: correct bitmap allocation size
2022-07-02 09:11:44 -07:00
Arnd Bergmann
f99d621133 Amlogic ARM mach-meson changes for v5.20:
- Fix refcount leak in meson_smp_prepare_cpus
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmK+qtQACgkQd9zb2sjI
 SdF/kg/+LpX3K2+BDqTWQEUFBAci+HOzy1UmJomPziwZlKNn/R8ZuLljOWDIvSGQ
 1NmuA4vEgRj6IfBg1qP3PSYcmgaDqpVm9OcDGcrvD5hiT30AQr3mraoWQqcsL1pQ
 3p5cGK4gbJBhUELQwQM0lzkuTdPbHxhpHD7GheF6YNsu+iXw/8ML9/fMiabJzDQj
 V+V9/zKSLZGoSio9Y8HdD1Y1S6dTqojnSpmAeUMRlNA6gvuOOOqhDek5AbETUP6U
 +DCdEiOchGbc3My8nOV2pFmt2IGP9KcYzrLhIYD/fyF676Z/P/AGR2UU6v1fZP2s
 dX4cxqq/luyNiwPbos6P1ecBVDypnJ+9jAoDmywlZs8GM6mDWeyyYq6o8OrRrJkC
 /7qjg066CoTtdWSp8wNpu2cHsXVmwJTZGyO1domQWPjTzT3zvCmZZ4s475pw+2z8
 4H+RUG/h9egyV2HR/D/xeksONxjxcG27gK9dp5D9fCOg2h8FwGNndY1EPqhaHLwy
 YZ/KZ5j8t81m3rUJ6U8tu3ttaL5h9iGDaMsoaLHlDjO35jtNpJn9Re2EsSgzjFAp
 qtoGM6cYj8oT8CLxAaKRaTksJlpCrnH/2SP2cSqN7jqrReecY6D+a5K2T2Xiacu+
 vCjcZTxoi8LI56ZXOUfhMDGw67Jm+gJ1WxdJ5wd522AqtPsJgGI=
 =C61q
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK/WMEACgkQmmx57+YA
 GNn/wg//V2/Aw3B9j/ZArRXZ/vbVFumX9bWOwk4EwckaaVLa3z1jqM3Tap3nsrQ2
 RfEsdpQ0WFnVNaap3I2nIqLwHX5Q0GvO3+mpwMDhF3h1RuAqbcGqdp2fwi/nWS5P
 lXapWLT0866XWxR/g1k6olYuK5EiFq3FFSeHMvBZZY/Aw42Giu4jaB3LKOivJ6kA
 Vo1dx66LORH8zbgR+UWs5+ggb+ZMWhzKgvFUNMN5y7xfoqtXka4IDuGjCe+arcPE
 wKqWC3Z1878w7NsZOV/GptzTaPy6IXRnvesKSHRCb84AHLosIQo7GwDGxURUe7T6
 CJzIZVb2swUP7TBXGLE2mXCNfmpL5VFBws0uVKkfwW0joaj9wQZ62J5HOO0ElXyL
 46NkfWgYY4UYSkaCwm35BEDyip4o5ZsdUCmSnKPS4Dh2cIz/Gy2fFWj//C+rraVw
 tKUzSMfIOaOuISOUfhJp+AJslgByPp+Xbu5yH1MfoBuyOUHIezkeoxTgs4QV1OUG
 U0TkF9m3Q0rQ4Xu9upWFokL8FeVvS2lto87BNOS6etATK4BCDrrDE3xeFFUQ48LS
 MhuRzDgfYigYIYJFXKcxBudQ876oLU+/zWfW8YJtup/QSKkQz6nDrY/WIoCQbbQg
 FdhYGgewMzXo7pPYnM6nmoCGnbETB6TE2dXLgaKZHyGqEhz92oU=
 =erid
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-arm-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/fixes

Amlogic ARM mach-meson changes for v5.20:
- Fix refcount leak in meson_smp_prepare_cpus

* tag 'amlogic-arm-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: meson: Fix refcount leak in meson_smp_prepare_cpus

Link: https://lore.kernel.org/r/cbf6bcb5-c7be-40fe-4436-4578c9d6c532@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01 22:27:45 +02:00
Linus Torvalds
d0f67adb79 arm64 fix: restore TLB invalidation for the 'break-before-make' rule on
contiguous ptes (missed in a recent clean-up).
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmK/L6kACgkQa9axLQDI
 XvGmfw//VXSwUarnSbiu54MiJ7jMFW5pf08La1u8dol7O8pN9c1sWn7QDMj6JyN5
 KJx4DInPsDkEKX9ZK8HEVXCixg0c2Kfml5y1tCWNtIX3etX5AHc2eRUTp1dy6e96
 f+e5lKGayI9gGJmKQFvKfofjienDHtp9UDNqYDmUljhJQ0kAGbI8pUawFC243UAo
 DWEuTytm08DBn5vSAxumNQyrvSoYdyzkKpaESO2s9x4/BY6iWFqDmYdA7BdySKmC
 ZLShCpHatz4/BdwqLjMpefjWYz0BJZGffIv+9fU0cvvwoVsB5BWdO6JR7b4Xktfi
 coYbRGtsBvQClmtH7jCKQBwomyYxNIJW6i0zlVS5nKRrbIwsa9K0yaG2rIX6zxZ1
 z2xqpBZcJpRBuHwVMs2Zfyvy5LPpVQptN0YxBv6orAVGamyBfKF9MLqFnr1giHXi
 q/Ryx6GsCM15TQrJLxV0lq72lBF6PhXerQ9flXa1TCktKf2Zpdnh0xBoWQEw/Jiz
 mzROq1zBDPJEz/MmN1BPR1cQTFDGa4VHVl+F3s0Q5ZATVPAuQDbltU5OQTQCiBdg
 J54qgjvN+rDczJTulHJlquwmBI9OIz6pVfeutHlW1YNF3iZFg1bGgUSCcOrD54Xm
 2bxNKn1Q+Intky0d84k5Af7CDiUrCMRbfLCDhM09XgDYE2yCxts=
 =aTjQ
 -----END PGP SIGNATURE-----

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fix from Catalin Marinas:
 "Restore TLB invalidation for the 'break-before-make' rule on
  contiguous ptes (missed in a recent clean-up)"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: hugetlb: Restore TLB invalidation for BBM on contiguous ptes
2022-07-01 11:23:21 -07:00
Linus Torvalds
cec84e7547 s390 updates for 5.19-rc5
- Fix purgatory build process so bin2c tool does not get built
   unnecessarily and the Makefile is more consistent with other
   architectures.
 
 - Return earlier simple design of arch_get_random_seed_long|int()
   and arch_get_random_long|int() callbacks as result of changes
   in generic RNG code.
 
 - Fix minor comment typos and spelling mistakes.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQQrtrZiYVkVzKQcYivNdxKlNrRb8AUCYr63pxccYWdvcmRlZXZA
 bGludXguaWJtLmNvbQAKCRDNdxKlNrRb8FgXAQCWbdCbbMkkFJzqNa8zz0m6NrWe
 81G58wQN2qrZMl9NnQD+IyYAEI59j72LG/yPAfBr2QKfqLb2ufIwH9Z6FA408QE=
 =evBx
 -----END PGP SIGNATURE-----

Merge tag 's390-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux

Pull s390 fixes from Alexander Gordeev:

 - Fix purgatory build process so bin2c tool does not get built
   unnecessarily and the Makefile is more consistent with other
   architectures.

 - Return earlier simple design of arch_get_random_seed_long|int() and
   arch_get_random_long|int() callbacks as result of changes in generic
   RNG code.

 - Fix minor comment typos and spelling mistakes.

* tag 's390-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  s390/qdio: Fix spelling mistake
  s390/sclp: Fix typo in comments
  s390/archrandom: simplify back to earlier design and initialize earlier
  s390/purgatory: remove duplicated build rule of kexec-purgatory.o
  s390/purgatory: hard-code obj-y in Makefile
  s390: remove unneeded 'select BUILD_BIN2C'
2022-07-01 11:19:14 -07:00
Will Deacon
4109823037 arm64: hugetlb: Restore TLB invalidation for BBM on contiguous ptes
Commit fb396bb459c1 ("arm64/hugetlb: Drop TLB flush from get_clear_flush()")
removed TLB invalidation from get_clear_flush() [now get_clear_contig()]
on the basis that the core TLB invalidation code is aware of hugetlb
mappings backed by contiguous page-table entries and will cover the
correct virtual address range.

However, this change also resulted in the TLB invalidation being removed
from the "break" step in the break-before-make (BBM) sequence used
internally by huge_ptep_set_{access_flags,wrprotect}(), therefore
making the BBM sequence unsafe irrespective of later invalidation.

Although the architecture is desperately unclear about how exactly
contiguous ptes should be updated in a live page-table, restore TLB
invalidation to our BBM sequence under the assumption that BBM is the
right thing to be doing in the first place.

Fixes: fb396bb459c1 ("arm64/hugetlb: Drop TLB flush from get_clear_flush()")
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Steve Capper <steve.capper@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Kravetz <mike.kravetz@oracle.com>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20220629095349.25748-1-will@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2022-07-01 18:29:26 +01:00