Instruction format RSY_RDRU is a duplicate of RSY_RURD2. Use the latter,
as it follows the s390-specific conventions for instruction format
naming used in binutils.
Reviewed-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
Over the course of CPU generations a few instructions got extended,
changing their base mnemonic, while keeping the former as an extended
mnemonic. Update the instruction mnemonics in the disassembler to their
latest base mnemonic as documented in the latest IBM z/Architecture
Principles of Operation specification [1].
With the IBM z14 the base mnemonics of the following vector instructions
have been changed:
- Vector FP Load Lengthened (VFLL)
- Vector FP Load Rounded (VFLR)
With Message-Security-Assist Extension 5 Perform Pseudorandom Number
Operation (PPNO) has been renamed to Perform Random Number Operation
(PRNO).
With Vector Enhancements Facility 2 the base mnemonics of the following
vector instructions have been changed:
- Vector FP Convert from Fixed (VCFPS)
- Vector FP Convert from Logical (VCFPL)
- Vector FP Convert to Fixed (VCSFP)
- Vector FP Convert to Logical (VCLFP)
[1] IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16,
https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf
Acked-by: Vasily Gorbik <gor@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
Sync with binutils: update opcode table to reflect the
instruction format update of the lpswey instruction, and
add the qpaci instruction.
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Sync with binutils and add a couple of missing instructions.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
The current way of adding new instructions to the opcode tables is
painful and error prone. Therefore add, similar to binutils, a text
file which contains all opcodes and the corresponding mnemonics and
instruction formats.
A small gen_opcode_table tool then generates a header file with the
required enums and opcode table initializers at the prepare step of
the kernel build.
This way only a simple text file has to be maintained, which can be
rather easily extended.
Unlike before where there were plenty of opcode tables and a large
switch statement to find the correct opcode table, there is now only
one opcode table left which contains all instructions. A second opcode
offset table now contains offsets within the opcode table to find
instructions which have the same opcode prefix. In order to save space
all 1-byte opcode instructions are grouped together at the end of the
opcode table. This is also quite similar to like it was before.
In addition also move and change code and definitions within the
disassembler. As a side effect this reduces the size required for the
code and opcode tables by ~1.5k.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
