Commit Graph

8 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
c4f16e96d8 memory: samsung: exynos5422-dmc: Do not ignore return code of regmap_read()
Check for regmap_read() return code before using the read value in
following write in exynos5_switch_timing_regs().  Pass reading error
code to the callers.

This does not introduce proper error handling for such failed reads (and
obviously regmap_write() error is still ignored) because the driver
ignored this in all places.  Therefor it only fixes reported issue while
matching current driver coding style:

       drivers/memory/samsung/exynos5422-dmc.c: In function 'exynos5_switch_timing_regs':
    >> drivers/memory/samsung/exynos5422-dmc.c:216:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable]

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-24 09:42:44 +02:00
Bernard Zhao
108c31e775 memory: samsung: exynos5422-dmc: Reduce protected code area in IRQ handler
Speed-up a bit this IRQ processing as there is no need to protect
return value or printing.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Acked-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-12 15:11:47 +02:00
Bernard Zhao
4bff7214d2 memory: samsung: exynos5422-dmc: Fix tFAW timings alignment
Aligning of tFAW timing with standard was using wrong argument as
minimum acceptable value.  This could lead to wrong timing if provided
timings and clock period do not match the standard.

Fixes: 6e7674c3c6 ("memory: Add DMC driver for Exynos5422")
Cc: <stable@vger.kernel.org>
Signed-off-by: Bernard Zhao <bernard@vivo.com>
Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-05-08 16:46:41 +02:00
Yangtao Li
5383953f1c memory: samsung: exynos5422-dmc: Convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Acked-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-30 18:33:15 +01:00
Lukasz Luba
bbf918863e memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters
Introduce a new interrupt driven mechanism for managing speed of the
memory controller. The interrupts are generated due to performance
counters overflow. The performance counters might track memory reads,
writes, transfers, page misses, etc. In the basic algorithm tracking
read transfers and calculating memory pressure should be enough to skip
polling mode in devfreq.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-02 19:37:37 +02:00
Lukasz Luba
d51e6a69f4 memory: samsung: exynos5422-dmc: Fix kfree() of devm-allocated memory and missing static
Fix issues captured by static checkers: use of kfree() on
resource-managed memory and missing 'static' in the private function.

Fixes Smatch warning:
    drivers/memory/samsung/exynos5422-dmc.c:272
        exynos5_init_freq_table() warn: passing devm_ allocated variable to kfree. 'dmc->opp'

Fixes Sparse warning:
    drivers/memory/samsung/exynos5422-dmc.c:736:1:
        warning: symbol 'exynos5_dmc_align_init_freq' was not declared.

Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00
Colin Ian King
7a5a687ec3 memory: samsung: exynos5422-dmc: Fix spelling mistake "counld" -> "could"
There is a spelling mistake in a dev_err message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00
Lukasz Luba
6e7674c3c6 memory: Add DMC driver for Exynos5422
Add driver for Exynos5422 Dynamic Memory Controller.  The driver
provides support for dynamic frequency and voltage scaling for DMC and
DRAM.  It supports changing timings of DRAM running with different
frequency.  There is also an algorithm to calculate timings based on
memory description provided in DT.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-01 20:28:38 +02:00