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cbc29538db
The LTC4282 hot swap controller allows a board to be safely inserted and removed from a live backplane. Using one or more external N-channel pass transistors, board supply voltage and inrush current are ramped up at an adjustable rate. An I2C interface and onboard ADC allows for monitoring of board current, voltage, power, energy and fault status. Signed-off-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20240129-b4-ltc4282-support-v4-3-fe75798164cc@analog.com [groeck: clamp value range in ltc4282_write_voltage_byte_cached()] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
134 lines
5.2 KiB
ReStructuredText
134 lines
5.2 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0-only
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Kernel drivers ltc4282
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==========================================
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Supported chips:
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* Analog Devices LTC4282
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Prefix: 'ltc4282'
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Addresses scanned: - I2C 0x40 - 0x5A (7-bit)
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Addresses scanned: - I2C 0x80 - 0xB4 with a step of 2 (8-bit)
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Datasheet:
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https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
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Author: Nuno Sá <nuno.sa@analog.com>
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Description
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___________
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The LTC4282 hot swap controller allows a board to be safely inserted and removed
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from a live backplane. Using one or more external N-channel pass transistors,
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board supply voltage and inrush current are ramped up at an adjustable rate. An
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I2C interface and onboard ADC allows for monitoring of board current, voltage,
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power, energy and fault status. The device features analog foldback current
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limiting and supply monitoring for applications from 2.9V to 33V. Dual 12V gate
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drive allows high power applications to either share safe operating area across
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parallel MOSFETs or support a 2-stage start-up that first charges the load
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capacitance followed by enabling a low on-resistance path to the load. The
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LTC4282 is well suited to high power applications because the precise monitoring
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capability and accurate current limiting reduce the extremes in which both loads
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and power supplies must safely operate. Non-volatile configuration allows for
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flexibility in the autonomous generation of alerts and response to faults.
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Sysfs entries
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_____________
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The following attributes are supported. Limits are read-write and all the other
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attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling
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one disables the other and disabling one enables the other.
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======================= ==========================================
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in0_input Output voltage (mV).
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in0_min Undervoltage threshold
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in0_max Overvoltage threshold
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in0_lowest Lowest measured voltage
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in0_highest Highest measured voltage
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in0_reset_history Write 1 to reset in0 history.
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Also clears fet bad and short fault logs.
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in0_min_alarm Undervoltage alarm
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in0_max_alarm Overvoltage alarm
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in0_enable Enable/Disable VSOURCE monitoring
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in0_fault Failure in the MOSFETs. Either bad or shorted FET.
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in0_label Channel label (VSOURCE)
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in1_input Input voltage (mV).
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in1_min Undervoltage threshold
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in1_max Overvoltage threshold
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in1_lowest Lowest measured voltage
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in1_highest Highest measured voltage
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in1_reset_history Write 1 to reset in1 history.
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Also clears over/undervoltage fault logs.
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in1_min_alarm Undervoltage alarm
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in1_max_alarm Overvoltage alarm
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in1_lcrit_alarm Critical Undervoltage alarm
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in1_crit_alarm Critical Overvoltage alarm
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in1_enable Enable/Disable VDD monitoring
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in1_label Channel label (VDD)
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in2_input GPIO voltage (mV)
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in2_min Undervoltage threshold
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in2_max Overvoltage threshold
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in2_lowest Lowest measured voltage
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in2_highest Highest measured voltage
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in2_reset_history Write 1 to reset in2 history
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in2_min_alarm Undervoltage alarm
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in2_max_alarm Overvoltage alarm
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in2_label Channel label (VGPIO)
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curr1_input Sense current (mA)
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curr1_min Undercurrent threshold
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curr1_max Overcurrent threshold
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curr1_lowest Lowest measured current
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curr1_highest Highest measured current
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curr1_reset_history Write 1 to reset curr1 history.
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Also clears overcurrent fault logs.
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curr1_min_alarm Undercurrent alarm
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curr1_max_alarm Overcurrent alarm
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curr1_crit_alarm Critical Overcurrent alarm
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curr1_label Channel label (ISENSE)
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power1_input Power (in uW)
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power1_min Low power threshold
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power1_max High power threshold
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power1_input_lowest Historical minimum power use
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power1_input_highest Historical maximum power use
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power1_reset_history Write 1 to reset power1 history.
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Also clears power bad fault logs.
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power1_min_alarm Low power alarm
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power1_max_alarm High power alarm
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power1_label Channel label (Power)
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energy1_input Measured energy over time (in microJoule)
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energy1_enable Enable/Disable Energy accumulation
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======================= ==========================================
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DebugFs entries
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_______________
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The chip also has a fault log register where failures can be logged. Hence,
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as these are logging events, we give access to them in debugfs. Note that
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even if some failure is detected in these logs, it does necessarily mean
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that the failure is still present. As mentioned in the proper Sysfs entries,
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these logs can be cleared by writing in the proper reset_history attribute.
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.. warning:: The debugfs interface is subject to change without notice
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and is only available when the kernel is compiled with
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``CONFIG_DEBUG_FS`` defined.
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``/sys/kernel/debug/ltc4282-hwmon[X]/``
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contains the following attributes:
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======================= ==========================================
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power1_bad_fault_log Set to 1 by a power1 bad fault occurring.
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in0_fet_short_fault_log Set to 1 when the ADC detects a FET-short fault.
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in0_fet_bad_fault_log Set to 1 when a FET-BAD fault occurs.
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in1_crit_fault_log Set to 1 by a VDD overvoltage fault occurring.
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in1_lcrit_fault_log Set to 1 by a VDD undervoltage fault occurring.
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curr1_crit_fault_log Set to 1 by an overcurrent fault occurring.
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======================= ==========================================
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