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Add support to the FPGA manager for programming Lattice ECP5 FPGA over slave SPI sysCONFIG interface. sysCONFIG interface core functionality is separate from both ECP5 and SPI specifics, so support for other FPGAs with different port types can be added in the future. Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20221025053947.2737-2-i.bornyakov@metrotek.ru [yilun.xu@intel.com: remove redundant blank line after kmemdup] Signed-off-by: Xu Yilun <yilun.xu@intel.com>
40 lines
1.4 KiB
C
40 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LATTICE_SYSCONFIG_H
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#define __LATTICE_SYSCONFIG_H
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#define SYSCONFIG_ISC_ENABLE {0xC6, 0x00, 0x00, 0x00}
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#define SYSCONFIG_ISC_DISABLE {0x26, 0x00, 0x00, 0x00}
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#define SYSCONFIG_ISC_ERASE {0x0E, 0x01, 0x00, 0x00}
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#define SYSCONFIG_LSC_READ_STATUS {0x3C, 0x00, 0x00, 0x00}
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#define SYSCONFIG_LSC_CHECK_BUSY {0xF0, 0x00, 0x00, 0x00}
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#define SYSCONFIG_LSC_REFRESH {0x79, 0x00, 0x00, 0x00}
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#define SYSCONFIG_LSC_INIT_ADDR {0x46, 0x00, 0x00, 0x00}
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#define SYSCONFIG_LSC_BITSTREAM_BURST {0x7a, 0x00, 0x00, 0x00}
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#define SYSCONFIG_STATUS_DONE BIT(8)
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#define SYSCONFIG_STATUS_BUSY BIT(12)
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#define SYSCONFIG_STATUS_FAIL BIT(13)
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#define SYSCONFIG_STATUS_ERR GENMASK(25, 23)
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#define SYSCONFIG_POLL_INTERVAL_US 30
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#define SYSCONFIG_POLL_BUSY_TIMEOUT_US 1000000
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#define SYSCONFIG_POLL_GPIO_TIMEOUT_US 100000
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struct sysconfig_priv {
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struct gpio_desc *program;
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struct gpio_desc *init;
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struct gpio_desc *done;
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struct device *dev;
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int (*command_transfer)(struct sysconfig_priv *priv, const void *tx_buf,
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size_t tx_len, void *rx_buf, size_t rx_len);
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int (*bitstream_burst_write_init)(struct sysconfig_priv *priv);
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int (*bitstream_burst_write)(struct sysconfig_priv *priv,
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const char *tx_buf, size_t tx_len);
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int (*bitstream_burst_write_complete)(struct sysconfig_priv *priv);
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};
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int sysconfig_probe(struct sysconfig_priv *priv);
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#endif /* __LATTICE_SYSCONFIG_H */
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