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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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71b405b184
The SoundWire specification did not clearly require that ports could use all Lanes. Some SoundWire/SDCA peripheral adopters added restrictions on which lanes can be used by what port, and the DisCo for SoundWire 2.1 specification added a 'lane-list' property to model this hardware limitation. When not specified, the ports can use all Lanes. Otherwise, the 'lane-list' indicates which Lanes can be used, sorted by order of preference (most-preferred-first). This patch only reads the properties, the use of this property will come at a later time with multi-lane support. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20241003070650.62787-15-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
492 lines
13 KiB
C
492 lines
13 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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// Copyright(c) 2015-17 Intel Corporation.
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/*
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* MIPI Discovery And Configuration (DisCo) Specification for SoundWire
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* specifies properties to be implemented for SoundWire Masters and Slaves.
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* The DisCo spec doesn't mandate these properties. However, SDW bus cannot
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* work without knowing these values.
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*
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* The helper functions read the Master and Slave properties. Implementers
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* of Master or Slave drivers can use any of the below three mechanisms:
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* a) Use these APIs here as .read_prop() callback for Master and Slave
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* b) Implement own methods and set those as .read_prop(), but invoke
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* APIs in this file for generic read and override the values with
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* platform specific data
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* c) Implement ones own methods which do not use anything provided
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* here
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*/
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#include <linux/device.h>
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#include <linux/property.h>
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#include <linux/mod_devicetable.h>
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#include <linux/soundwire/sdw.h>
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#include "bus.h"
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static bool mipi_fwnode_property_read_bool(const struct fwnode_handle *fwnode,
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const char *propname)
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{
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int ret;
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u8 val;
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if (!fwnode_property_present(fwnode, propname))
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return false;
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ret = fwnode_property_read_u8_array(fwnode, propname, &val, 1);
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if (ret < 0)
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return false;
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return !!val;
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}
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static bool mipi_device_property_read_bool(const struct device *dev,
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const char *propname)
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{
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return mipi_fwnode_property_read_bool(dev_fwnode(dev), propname);
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}
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/**
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* sdw_master_read_prop() - Read Master properties
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* @bus: SDW bus instance
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*/
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int sdw_master_read_prop(struct sdw_bus *bus)
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{
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struct sdw_master_prop *prop = &bus->prop;
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struct fwnode_handle *link;
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const char *scales_prop;
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char name[32];
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int nval;
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int ret;
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int i;
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device_property_read_u32(bus->dev,
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"mipi-sdw-sw-interface-revision",
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&prop->revision);
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/* Find master handle */
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snprintf(name, sizeof(name),
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"mipi-sdw-link-%d-subproperties", bus->link_id);
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link = device_get_named_child_node(bus->dev, name);
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if (!link) {
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dev_err(bus->dev, "Master node %s not found\n", name);
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return -EIO;
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}
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if (mipi_fwnode_property_read_bool(link,
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"mipi-sdw-clock-stop-mode0-supported"))
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prop->clk_stop_modes |= BIT(SDW_CLK_STOP_MODE0);
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if (mipi_fwnode_property_read_bool(link,
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"mipi-sdw-clock-stop-mode1-supported"))
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prop->clk_stop_modes |= BIT(SDW_CLK_STOP_MODE1);
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fwnode_property_read_u32(link,
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"mipi-sdw-max-clock-frequency",
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&prop->max_clk_freq);
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nval = fwnode_property_count_u32(link, "mipi-sdw-clock-frequencies-supported");
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if (nval > 0) {
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prop->num_clk_freq = nval;
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prop->clk_freq = devm_kcalloc(bus->dev, prop->num_clk_freq,
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sizeof(*prop->clk_freq),
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GFP_KERNEL);
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if (!prop->clk_freq) {
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fwnode_handle_put(link);
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return -ENOMEM;
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}
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ret = fwnode_property_read_u32_array(link,
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"mipi-sdw-clock-frequencies-supported",
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prop->clk_freq, prop->num_clk_freq);
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if (ret < 0)
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return ret;
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}
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/*
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* Check the frequencies supported. If FW doesn't provide max
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* freq, then populate here by checking values.
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*/
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if (!prop->max_clk_freq && prop->clk_freq) {
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prop->max_clk_freq = prop->clk_freq[0];
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for (i = 1; i < prop->num_clk_freq; i++) {
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if (prop->clk_freq[i] > prop->max_clk_freq)
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prop->max_clk_freq = prop->clk_freq[i];
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}
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}
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scales_prop = "mipi-sdw-supported-clock-scales";
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nval = fwnode_property_count_u32(link, scales_prop);
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if (nval == 0) {
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scales_prop = "mipi-sdw-supported-clock-gears";
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nval = fwnode_property_count_u32(link, scales_prop);
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}
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if (nval > 0) {
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prop->num_clk_gears = nval;
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prop->clk_gears = devm_kcalloc(bus->dev, prop->num_clk_gears,
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sizeof(*prop->clk_gears),
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GFP_KERNEL);
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if (!prop->clk_gears) {
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fwnode_handle_put(link);
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return -ENOMEM;
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}
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ret = fwnode_property_read_u32_array(link,
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scales_prop,
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prop->clk_gears,
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prop->num_clk_gears);
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if (ret < 0)
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return ret;
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}
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fwnode_property_read_u32(link, "mipi-sdw-default-frame-rate",
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&prop->default_frame_rate);
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fwnode_property_read_u32(link, "mipi-sdw-default-frame-row-size",
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&prop->default_row);
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fwnode_property_read_u32(link, "mipi-sdw-default-frame-col-size",
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&prop->default_col);
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prop->dynamic_frame = mipi_fwnode_property_read_bool(link,
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"mipi-sdw-dynamic-frame-shape");
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fwnode_property_read_u32(link, "mipi-sdw-command-error-threshold",
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&prop->err_threshold);
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fwnode_handle_put(link);
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return 0;
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}
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EXPORT_SYMBOL(sdw_master_read_prop);
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static int sdw_slave_read_dp0(struct sdw_slave *slave,
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struct fwnode_handle *port,
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struct sdw_dp0_prop *dp0)
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{
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int nval;
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int ret;
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fwnode_property_read_u32(port, "mipi-sdw-port-max-wordlength",
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&dp0->max_word);
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fwnode_property_read_u32(port, "mipi-sdw-port-min-wordlength",
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&dp0->min_word);
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nval = fwnode_property_count_u32(port, "mipi-sdw-port-wordlength-configs");
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if (nval > 0) {
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dp0->num_words = nval;
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dp0->words = devm_kcalloc(&slave->dev,
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dp0->num_words, sizeof(*dp0->words),
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GFP_KERNEL);
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if (!dp0->words)
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return -ENOMEM;
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ret = fwnode_property_read_u32_array(port,
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"mipi-sdw-port-wordlength-configs",
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dp0->words, dp0->num_words);
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if (ret < 0)
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return ret;
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}
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dp0->BRA_flow_controlled = mipi_fwnode_property_read_bool(port,
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"mipi-sdw-bra-flow-controlled");
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dp0->simple_ch_prep_sm = mipi_fwnode_property_read_bool(port,
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"mipi-sdw-simplified-channel-prepare-sm");
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dp0->imp_def_interrupts = mipi_fwnode_property_read_bool(port,
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"mipi-sdw-imp-def-dp0-interrupts-supported");
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nval = fwnode_property_count_u32(port, "mipi-sdw-lane-list");
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if (nval > 0) {
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dp0->num_lanes = nval;
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dp0->lane_list = devm_kcalloc(&slave->dev,
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dp0->num_lanes, sizeof(*dp0->lane_list),
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GFP_KERNEL);
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if (!dp0->lane_list)
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return -ENOMEM;
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ret = fwnode_property_read_u32_array(port,
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"mipi-sdw-lane-list",
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dp0->lane_list, dp0->num_lanes);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int sdw_slave_read_dpn(struct sdw_slave *slave,
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struct sdw_dpn_prop *dpn, int count, int ports,
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char *type)
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{
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struct fwnode_handle *node;
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u32 bit, i = 0;
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unsigned long addr;
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char name[40];
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int nval;
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int ret;
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addr = ports;
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/* valid ports are 1 to 14 so apply mask */
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addr &= GENMASK(14, 1);
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for_each_set_bit(bit, &addr, 32) {
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snprintf(name, sizeof(name),
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"mipi-sdw-dp-%d-%s-subproperties", bit, type);
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dpn[i].num = bit;
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node = device_get_named_child_node(&slave->dev, name);
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if (!node) {
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dev_err(&slave->dev, "%s dpN not found\n", name);
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return -EIO;
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}
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fwnode_property_read_u32(node, "mipi-sdw-port-max-wordlength",
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&dpn[i].max_word);
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fwnode_property_read_u32(node, "mipi-sdw-port-min-wordlength",
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&dpn[i].min_word);
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nval = fwnode_property_count_u32(node, "mipi-sdw-port-wordlength-configs");
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if (nval > 0) {
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dpn[i].num_words = nval;
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dpn[i].words = devm_kcalloc(&slave->dev,
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dpn[i].num_words,
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sizeof(*dpn[i].words),
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GFP_KERNEL);
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if (!dpn[i].words) {
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fwnode_handle_put(node);
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return -ENOMEM;
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}
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ret = fwnode_property_read_u32_array(node,
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"mipi-sdw-port-wordlength-configs",
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dpn[i].words, dpn[i].num_words);
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if (ret < 0)
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return ret;
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}
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fwnode_property_read_u32(node, "mipi-sdw-data-port-type",
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&dpn[i].type);
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fwnode_property_read_u32(node,
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"mipi-sdw-max-grouping-supported",
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&dpn[i].max_grouping);
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dpn[i].simple_ch_prep_sm = mipi_fwnode_property_read_bool(node,
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"mipi-sdw-simplified-channelprepare-sm");
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fwnode_property_read_u32(node,
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"mipi-sdw-port-channelprepare-timeout",
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&dpn[i].ch_prep_timeout);
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fwnode_property_read_u32(node,
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"mipi-sdw-imp-def-dpn-interrupts-supported",
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&dpn[i].imp_def_interrupts);
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fwnode_property_read_u32(node, "mipi-sdw-min-channel-number",
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&dpn[i].min_ch);
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fwnode_property_read_u32(node, "mipi-sdw-max-channel-number",
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&dpn[i].max_ch);
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nval = fwnode_property_count_u32(node, "mipi-sdw-channel-number-list");
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if (nval > 0) {
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dpn[i].num_channels = nval;
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dpn[i].channels = devm_kcalloc(&slave->dev,
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dpn[i].num_channels,
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sizeof(*dpn[i].channels),
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GFP_KERNEL);
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if (!dpn[i].channels) {
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fwnode_handle_put(node);
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return -ENOMEM;
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}
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ret = fwnode_property_read_u32_array(node,
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"mipi-sdw-channel-number-list",
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dpn[i].channels, dpn[i].num_channels);
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if (ret < 0)
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return ret;
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}
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nval = fwnode_property_count_u32(node, "mipi-sdw-channel-combination-list");
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if (nval > 0) {
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dpn[i].num_ch_combinations = nval;
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dpn[i].ch_combinations = devm_kcalloc(&slave->dev,
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dpn[i].num_ch_combinations,
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sizeof(*dpn[i].ch_combinations),
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GFP_KERNEL);
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if (!dpn[i].ch_combinations) {
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fwnode_handle_put(node);
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return -ENOMEM;
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}
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ret = fwnode_property_read_u32_array(node,
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"mipi-sdw-channel-combination-list",
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dpn[i].ch_combinations,
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dpn[i].num_ch_combinations);
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if (ret < 0)
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return ret;
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}
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fwnode_property_read_u32(node,
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"mipi-sdw-modes-supported", &dpn[i].modes);
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fwnode_property_read_u32(node, "mipi-sdw-max-async-buffer",
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&dpn[i].max_async_buffer);
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dpn[i].block_pack_mode = mipi_fwnode_property_read_bool(node,
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"mipi-sdw-block-packing-mode");
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fwnode_property_read_u32(node, "mipi-sdw-port-encoding-type",
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&dpn[i].port_encoding);
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nval = fwnode_property_count_u32(node, "mipi-sdw-lane-list");
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if (nval > 0) {
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dpn[i].num_lanes = nval;
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dpn[i].lane_list = devm_kcalloc(&slave->dev,
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dpn[i].num_lanes, sizeof(*dpn[i].lane_list),
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GFP_KERNEL);
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if (!dpn[i].lane_list)
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return -ENOMEM;
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ret = fwnode_property_read_u32_array(node,
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"mipi-sdw-lane-list",
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dpn[i].lane_list, dpn[i].num_lanes);
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if (ret < 0)
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return ret;
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}
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fwnode_handle_put(node);
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i++;
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}
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return 0;
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}
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/**
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* sdw_slave_read_prop() - Read Slave properties
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* @slave: SDW Slave
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*/
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int sdw_slave_read_prop(struct sdw_slave *slave)
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{
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struct sdw_slave_prop *prop = &slave->prop;
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struct device *dev = &slave->dev;
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struct fwnode_handle *port;
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int nval;
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int ret;
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device_property_read_u32(dev, "mipi-sdw-sw-interface-revision",
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&prop->mipi_revision);
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prop->wake_capable = mipi_device_property_read_bool(dev,
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"mipi-sdw-wake-up-unavailable");
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prop->wake_capable = !prop->wake_capable;
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prop->test_mode_capable = mipi_device_property_read_bool(dev,
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"mipi-sdw-test-mode-supported");
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prop->clk_stop_mode1 = false;
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if (mipi_device_property_read_bool(dev,
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"mipi-sdw-clock-stop-mode1-supported"))
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prop->clk_stop_mode1 = true;
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prop->simple_clk_stop_capable = mipi_device_property_read_bool(dev,
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"mipi-sdw-simplified-clockstopprepare-sm-supported");
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device_property_read_u32(dev, "mipi-sdw-clockstopprepare-timeout",
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&prop->clk_stop_timeout);
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ret = device_property_read_u32(dev, "mipi-sdw-peripheral-channelprepare-timeout",
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&prop->ch_prep_timeout);
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if (ret < 0)
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device_property_read_u32(dev, "mipi-sdw-slave-channelprepare-timeout",
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&prop->ch_prep_timeout);
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device_property_read_u32(dev,
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"mipi-sdw-clockstopprepare-hard-reset-behavior",
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&prop->reset_behave);
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prop->high_PHY_capable = mipi_device_property_read_bool(dev,
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"mipi-sdw-highPHY-capable");
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prop->paging_support = mipi_device_property_read_bool(dev,
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"mipi-sdw-paging-support");
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prop->bank_delay_support = mipi_device_property_read_bool(dev,
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"mipi-sdw-bank-delay-support");
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device_property_read_u32(dev,
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"mipi-sdw-port15-read-behavior", &prop->p15_behave);
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device_property_read_u32(dev, "mipi-sdw-master-count",
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&prop->master_count);
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device_property_read_u32(dev, "mipi-sdw-source-port-list",
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&prop->source_ports);
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device_property_read_u32(dev, "mipi-sdw-sink-port-list",
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&prop->sink_ports);
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device_property_read_u32(dev, "mipi-sdw-sdca-interrupt-register-list",
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&prop->sdca_interrupt_register_list);
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prop->commit_register_supported = mipi_device_property_read_bool(dev,
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"mipi-sdw-commit-register-supported");
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/*
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* Read dp0 properties - we don't rely on the 'mipi-sdw-dp-0-supported'
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* property since the 'mipi-sdw-dp0-subproperties' property is logically
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* equivalent.
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*/
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port = device_get_named_child_node(dev, "mipi-sdw-dp-0-subproperties");
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if (!port) {
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dev_dbg(dev, "DP0 node not found!!\n");
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} else {
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prop->dp0_prop = devm_kzalloc(&slave->dev,
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sizeof(*prop->dp0_prop),
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GFP_KERNEL);
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if (!prop->dp0_prop) {
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fwnode_handle_put(port);
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return -ENOMEM;
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}
|
|
|
|
sdw_slave_read_dp0(slave, port, prop->dp0_prop);
|
|
|
|
fwnode_handle_put(port);
|
|
}
|
|
|
|
/*
|
|
* Based on each DPn port, get source and sink dpn properties.
|
|
* Also, some ports can operate as both source or sink.
|
|
*/
|
|
|
|
/* Allocate memory for set bits in port lists */
|
|
nval = hweight32(prop->source_ports);
|
|
prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
|
|
sizeof(*prop->src_dpn_prop),
|
|
GFP_KERNEL);
|
|
if (!prop->src_dpn_prop)
|
|
return -ENOMEM;
|
|
|
|
/* Read dpn properties for source port(s) */
|
|
sdw_slave_read_dpn(slave, prop->src_dpn_prop, nval,
|
|
prop->source_ports, "source");
|
|
|
|
nval = hweight32(prop->sink_ports);
|
|
prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
|
|
sizeof(*prop->sink_dpn_prop),
|
|
GFP_KERNEL);
|
|
if (!prop->sink_dpn_prop)
|
|
return -ENOMEM;
|
|
|
|
/* Read dpn properties for sink port(s) */
|
|
sdw_slave_read_dpn(slave, prop->sink_dpn_prop, nval,
|
|
prop->sink_ports, "sink");
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(sdw_slave_read_prop);
|