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8238b45798
There are several places in the kernel where wait_on_bit is not followed by a memory barrier (for example, in drivers/md/dm-bufio.c:new_read). On architectures with weak memory ordering, it may happen that memory accesses that follow wait_on_bit are reordered before wait_on_bit and they may return invalid data. Fix this class of bugs by introducing a new function "test_bit_acquire" that works like test_bit, but has acquire memory ordering semantics. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Acked-by: Will Deacon <will@kernel.org> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
158 lines
4.7 KiB
C
158 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file provides wrappers with sanitizer instrumentation for non-atomic
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* bit operations.
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*
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* To use this functionality, an arch's bitops.h file needs to define each of
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* the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
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* arch___set_bit(), etc.).
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*/
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#ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H
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#define _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H
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#include <linux/instrumented.h>
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/**
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* ___set_bit - Set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike set_bit(), this function is non-atomic. If it is called on the same
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static __always_inline void
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___set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___set_bit(nr, addr);
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}
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/**
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* ___clear_bit - Clears a bit in memory
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* @nr: the bit to clear
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* @addr: the address to start counting from
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*
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* Unlike clear_bit(), this function is non-atomic. If it is called on the same
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static __always_inline void
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___clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___clear_bit(nr, addr);
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}
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/**
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* ___change_bit - Toggle a bit in memory
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* @nr: the bit to change
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* @addr: the address to start counting from
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*
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* Unlike change_bit(), this function is non-atomic. If it is called on the same
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static __always_inline void
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___change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___change_bit(nr, addr);
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}
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static __always_inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)
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{
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if (IS_ENABLED(CONFIG_KCSAN_ASSUME_PLAIN_WRITES_ATOMIC)) {
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/*
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* We treat non-atomic read-write bitops a little more special.
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* Given the operations here only modify a single bit, assuming
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* non-atomicity of the writer is sufficient may be reasonable
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* for certain usage (and follows the permissible nature of the
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* assume-plain-writes-atomic rule):
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* 1. report read-modify-write races -> check read;
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* 2. do not report races with marked readers, but do report
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* races with unmarked readers -> check "atomic" write.
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*/
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kcsan_check_read(addr + BIT_WORD(nr), sizeof(long));
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/*
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* Use generic write instrumentation, in case other sanitizers
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* or tools are enabled alongside KCSAN.
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*/
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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} else {
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instrument_read_write(addr + BIT_WORD(nr), sizeof(long));
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}
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}
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/**
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* ___test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static __always_inline bool
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___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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__instrument_read_write_bitop(nr, addr);
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return arch___test_and_set_bit(nr, addr);
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}
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/**
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* ___test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static __always_inline bool
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___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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__instrument_read_write_bitop(nr, addr);
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return arch___test_and_clear_bit(nr, addr);
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}
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/**
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* ___test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static __always_inline bool
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___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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__instrument_read_write_bitop(nr, addr);
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return arch___test_and_change_bit(nr, addr);
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}
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/**
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* _test_bit - Determine whether a bit is set
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static __always_inline bool
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_test_bit(unsigned long nr, const volatile unsigned long *addr)
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{
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instrument_atomic_read(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_bit(nr, addr);
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}
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/**
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* _test_bit_acquire - Determine, with acquire semantics, whether a bit is set
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static __always_inline bool
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_test_bit_acquire(unsigned long nr, const volatile unsigned long *addr)
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{
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instrument_atomic_read(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_bit_acquire(nr, addr);
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}
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#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H */
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