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0b87a9fd67
GS101's Connectivity Peripheral blocks (peric0/1 blocks) which include the I3C and USI (I2C, SPI, UART) only allow 32-bit register accesses. Instead of specifying the reg-io-width = 4 everywhere, for each node, the requirement should be deduced from the compatible. Infer UPIO_MEM32 iotype from the "google,gs101-uart" compatible. Update the uart info name to be GS101 specific in order to differentiate from the other exynos platforms. All the other settings are not changed. exynos_fifoszdt_serial_drv_data was replaced by gs101_serial_drv_data because the iotype restriction is gs101 specific and there was no other user of exynos_fifoszdt_serial_drv_data. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240119104526.1221243-5-tudor.ambarus@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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| .. | ||
| hvc | ||
| ipwireless | ||
| serdev | ||
| serial | ||
| vt | ||
| amiserial.c | ||
| ehv_bytechan.c | ||
| goldfish.c | ||
| Kconfig | ||
| Makefile | ||
| mips_ejtag_fdc.c | ||
| moxa.c | ||
| mxser.c | ||
| n_gsm.c | ||
| n_hdlc.c | ||
| n_null.c | ||
| n_tty.c | ||
| nozomi.c | ||
| pty.c | ||
| rpmsg_tty.c | ||
| synclink_gt.c | ||
| sysrq.c | ||
| tty_audit.c | ||
| tty_baudrate.c | ||
| tty_buffer.c | ||
| tty_io.c | ||
| tty_ioctl.c | ||
| tty_jobctrl.c | ||
| tty_ldisc.c | ||
| tty_ldsem.c | ||
| tty_mutex.c | ||
| tty_port.c | ||
| tty.h | ||
| ttynull.c | ||
| vcc.c | ||