Jesse Brandeburg
2ce9047f5d
e1000: add mmiowb() for IA64 to sync tail writes
...
IA64 SMP systems were seeing TX issues with multiple cpu's attempting
to write tail registers unordered. This mmiowb() fixes the issue.
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
2006-12-02 00:11:59 -05:00
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