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df1acfd0a5
Convert the Qualcomm IPQ8064 TLMM block bindings from text to yaml dt schema format. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/20240709162009.5166-3-rayyan.ansari@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
109 lines
2.9 KiB
YAML
109 lines
2.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,ipq8064-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. IPQ8064 TLMM block
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description: |
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Top Level Mode Multiplexer pin controller in Qualcomm IPQ8064 SoC.
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allOf:
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- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
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properties:
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compatible:
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const: qcom,ipq8064-pinctrl
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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gpio-reserved-ranges: true
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-ipq8064-tlmm-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-ipq8064-tlmm-state"
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additionalProperties: false
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$defs:
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qcom-ipq8064-tlmm-state:
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
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unevaluatedProperties: false
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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oneOf:
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- pattern: "^gpio([0-9]|[1-5][0-9]|6[0-8])$"
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- enum: [ sdc3_clk, sdc3_cmd, sdc3_data ]
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minItems: 1
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maxItems: 36
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function:
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description:
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Specify the alternative function to be configured for the specified
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pins.
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enum: [ mdio, mi2s, pdm, ssbi, spmi, audio_pcm, gpio, gsbi1, gsbi2, gsbi4, gsbi5,
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gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6, gsbi7, nss_spi, sdc1,
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spdif, nand, tsif1, tsif2, usb_fs_n, usb_fs, usb2_hsic, rgmii2, sata,
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pcie1_rst, pcie1_prsnt, pcie1_pwren_n, pcie1_pwren, pcie1_pwrflt,
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pcie1_clk_req, pcie2_rst, pcie2_prsnt, pcie2_pwren_n, pcie2_pwren,
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pcie2_pwrflt, pcie2_clk_req, pcie3_rst, pcie3_prsnt, pcie3_pwren_n,
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pcie3_pwren, pcie3_pwrflt, pcie3_clk_req, ps_hold ]
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required:
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- pins
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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tlmm: pinctrl@800000 {
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compatible = "qcom,ipq8064-pinctrl";
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reg = <0x00800000 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&tlmm 0 0 69>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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uart-state {
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rx-pins {
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pins = "gpio19";
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function = "gsbi5";
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bias-pull-up;
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};
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tx-pins {
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pins = "gpio18";
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function = "gsbi5";
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bias-disable;
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};
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};
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};
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