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1a8009e108
Add bindings for the MediaTek External Memory Interface Interconnect, which providers support system bandwidth requirements through Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware. This adds bindings for MediaTek MT8183 and MT8195 SoCs. Note that this is modeled as a subnode of DVFSRC for multiple reasons: - Some SoCs have more than one interconnect on the DVFSRC (and two different kinds of EMI interconnect, and also a SMI interconnect); - Some boards will want to not enable the interconnect driver because some of those are not battery powered (so they just keep the knobs at full thrust from the bootloader and never care scaling busses); - Some DVFSRC interconnect features may depend on firmware. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240610085735.147134-3-angelogioacchino.delregno@collabora.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
24 lines
624 B
C
24 lines
624 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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* Copyright (c) 2024 Collabora Ltd.
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* AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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*/
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#ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8183_H
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#define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8183_H
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#define SLAVE_DDR_EMI 0
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#define MASTER_MCUSYS 1
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#define MASTER_MFG 2
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#define MASTER_MMSYS 3
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#define MASTER_MM_VPU 4
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#define MASTER_MM_DISP 5
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#define MASTER_MM_VDEC 6
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#define MASTER_MM_VENC 7
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#define MASTER_MM_CAM 8
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#define MASTER_MM_IMG 9
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#define MASTER_MM_MDP 10
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#endif
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