Pranjal Ramajor Asha Kanojiya 566fc96198 accel/qaic: Add mhi_qaic_cntl ... Some of the MHI channels for an AIC100 device need to be routed to userspace so that userspace can communicate directly with QSM. The MHI bus does not support this, and while the WWAN subsystem does (for the same reasons), AIC100 is not a WWAN device. Also, MHI is not something that other accelerators are expected to share, thus an accel subsystem function that meets this usecase is unlikely. Create a QAIC specific MHI userspace shim that exposes these channels. Start with QAIC_SAHARA which is required to boot AIC100 and is consumed by the kickstart application as documented in aic100.rst Each AIC100 instance (currently, up to 16) in a system will create a chardev for QAIC_SAHARA. This chardev will be found as /dev/<mhi instance>_QAIC_SAHARA For example - /dev/mhi0_QAIC_SAHARA Signed-off-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Carl Vanderlip <quic_carlv@quicinc.com> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Acked-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1679932497-30277-7-git-send-email-quic_jhugo@quicinc.com		2023-04-06 08:23:03 +02:00
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mhi_controller.c	accel/qaic: Add MHI controller	2023-04-06 08:23:03 +02:00
mhi_controller.h	accel/qaic: Add MHI controller	2023-04-06 08:23:03 +02:00
mhi_qaic_ctrl.c	accel/qaic: Add mhi_qaic_cntl	2023-04-06 08:23:03 +02:00
mhi_qaic_ctrl.h	accel/qaic: Add mhi_qaic_cntl	2023-04-06 08:23:03 +02:00
qaic_control.c	accel/qaic: Add control path	2023-04-06 08:23:03 +02:00
qaic_data.c	accel/qaic: Add datapath	2023-04-06 08:23:03 +02:00
qaic_drv.c
qaic.h